Linux Kernel  3.7.1
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irq.c
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1 /*
2  * Copyright IBM Corp. 2004, 2011
3  * Author(s): Martin Schwidefsky <[email protected]>,
4  * Holger Smolinski <[email protected]>,
5  * Thomas Spatzier <[email protected]>,
6  *
7  * This file contains interrupt related functions.
8  */
9 
10 #include <linux/kernel_stat.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/proc_fs.h>
14 #include <linux/profile.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/ftrace.h>
18 #include <linux/errno.h>
19 #include <linux/slab.h>
20 #include <linux/cpu.h>
21 #include <asm/irq_regs.h>
22 #include <asm/cputime.h>
23 #include <asm/lowcore.h>
24 #include <asm/irq.h>
25 #include "entry.h"
26 
27 struct irq_class {
28  char *name;
29  char *desc;
30 };
31 
32 static const struct irq_class intrclass_names[] = {
33  [EXTERNAL_INTERRUPT] = {.name = "EXT"},
34  [IO_INTERRUPT] = {.name = "I/O"},
35  [EXTINT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
36  [EXTINT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
37  [EXTINT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
38  [EXTINT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
39  [EXTINT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
40  [EXTINT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
41  [EXTINT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
42  [EXTINT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
43  [EXTINT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
44  [EXTINT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
45  [EXTINT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
46  [EXTINT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
47  [EXTINT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
48  [IOINT_CIO] = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
49  [IOINT_QAI] = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
50  [IOINT_DAS] = {.name = "DAS", .desc = "[I/O] DASD"},
51  [IOINT_C15] = {.name = "C15", .desc = "[I/O] 3215"},
52  [IOINT_C70] = {.name = "C70", .desc = "[I/O] 3270"},
53  [IOINT_TAP] = {.name = "TAP", .desc = "[I/O] Tape"},
54  [IOINT_VMR] = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
55  [IOINT_LCS] = {.name = "LCS", .desc = "[I/O] LCS"},
56  [IOINT_CLW] = {.name = "CLW", .desc = "[I/O] CLAW"},
57  [IOINT_CTC] = {.name = "CTC", .desc = "[I/O] CTC"},
58  [IOINT_APB] = {.name = "APB", .desc = "[I/O] AP Bus"},
59  [IOINT_ADM] = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
60  [IOINT_CSC] = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
61  [NMI_NMI] = {.name = "NMI", .desc = "[NMI] Machine Check"},
62 };
63 
64 /*
65  * show_interrupts is needed by /proc/interrupts.
66  */
67 int show_interrupts(struct seq_file *p, void *v)
68 {
69  int i = *(loff_t *) v, j;
70 
72  if (i == 0) {
73  seq_puts(p, " ");
75  seq_printf(p, "CPU%d ",j);
76  seq_putc(p, '\n');
77  }
78 
79  if (i < NR_IRQS) {
80  seq_printf(p, "%s: ", intrclass_names[i].name);
81 #ifndef CONFIG_SMP
82  seq_printf(p, "%10u ", kstat_irqs(i));
83 #else
85  seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
86 #endif
87  if (intrclass_names[i].desc)
88  seq_printf(p, " %s", intrclass_names[i].desc);
89  seq_putc(p, '\n');
90  }
92  return 0;
93 }
94 
95 /*
96  * Switch to the asynchronous interrupt stack for softirq execution.
97  */
99 {
100  unsigned long flags, old, new;
101 
102  if (in_interrupt())
103  return;
104 
105  local_irq_save(flags);
106 
107  if (local_softirq_pending()) {
108  /* Get current stack pointer. */
109  asm volatile("la %0,0(15)" : "=a" (old));
110  /* Check against async. stack address range. */
111  new = S390_lowcore.async_stack;
112  if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
113  /* Need to switch to the async. stack. */
114  new -= STACK_FRAME_OVERHEAD;
115  ((struct stack_frame *) new)->back_chain = old;
116 
117  asm volatile(" la 15,0(%0)\n"
118  " basr 14,%2\n"
119  " la 15,0(%1)\n"
120  : : "a" (new), "a" (old),
121  "a" (__do_softirq)
122  : "0", "1", "2", "3", "4", "5", "14",
123  "cc", "memory" );
124  } else {
125  /* We are already on the async stack. */
126  __do_softirq();
127  }
128  }
129 
130  local_irq_restore(flags);
131 }
132 
133 #ifdef CONFIG_PROC_FS
134 void init_irq_proc(void)
135 {
136  struct proc_dir_entry *root_irq_dir;
137 
138  root_irq_dir = proc_mkdir("irq", NULL);
139  create_prof_cpu_mask(root_irq_dir);
140 }
141 #endif
142 
143 /*
144  * ext_int_hash[index] is the list head for all external interrupts that hash
145  * to this index.
146  */
147 static struct list_head ext_int_hash[256];
148 
149 struct ext_int_info {
152  struct list_head entry;
153  struct rcu_head rcu;
154 };
155 
156 /* ext_int_hash_lock protects the handler lists for external interrupts */
157 DEFINE_SPINLOCK(ext_int_hash_lock);
158 
159 static void __init init_external_interrupts(void)
160 {
161  int idx;
162 
163  for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
164  INIT_LIST_HEAD(&ext_int_hash[idx]);
165 }
166 
167 static inline int ext_hash(u16 code)
168 {
169  return (code + (code >> 9)) & 0xff;
170 }
171 
173 {
174  struct ext_int_info *p;
175  unsigned long flags;
176  int index;
177 
178  p = kmalloc(sizeof(*p), GFP_ATOMIC);
179  if (!p)
180  return -ENOMEM;
181  p->code = code;
182  p->handler = handler;
183  index = ext_hash(code);
184 
185  spin_lock_irqsave(&ext_int_hash_lock, flags);
186  list_add_rcu(&p->entry, &ext_int_hash[index]);
187  spin_unlock_irqrestore(&ext_int_hash_lock, flags);
188  return 0;
189 }
191 
193 {
194  struct ext_int_info *p;
195  unsigned long flags;
196  int index = ext_hash(code);
197 
198  spin_lock_irqsave(&ext_int_hash_lock, flags);
199  list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
200  if (p->code == code && p->handler == handler) {
201  list_del_rcu(&p->entry);
202  kfree_rcu(p, rcu);
203  }
204  }
205  spin_unlock_irqrestore(&ext_int_hash_lock, flags);
206  return 0;
207 }
209 
211  unsigned int param32, unsigned long param64)
212 {
213  struct pt_regs *old_regs;
214  struct ext_int_info *p;
215  int index;
216 
217  old_regs = set_irq_regs(regs);
218  irq_enter();
219  if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
220  /* Serve timer interrupts first. */
222  }
224  if (ext_code.code != 0x1004)
225  __get_cpu_var(s390_idle).nohz_delay = 1;
226 
227  index = ext_hash(ext_code.code);
228  rcu_read_lock();
229  list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
230  if (likely(p->code == ext_code.code))
231  p->handler(ext_code, param32, param64);
232  rcu_read_unlock();
233  irq_exit();
234  set_irq_regs(old_regs);
235 }
236 
237 void __init init_IRQ(void)
238 {
239  init_external_interrupts();
240 }
241 
242 static DEFINE_SPINLOCK(sc_irq_lock);
243 static int sc_irq_refcount;
244 
246 {
247  spin_lock(&sc_irq_lock);
248  if (!sc_irq_refcount)
249  ctl_set_bit(0, 9);
250  sc_irq_refcount++;
251  spin_unlock(&sc_irq_lock);
252 }
254 
256 {
257  spin_lock(&sc_irq_lock);
258  sc_irq_refcount--;
259  if (!sc_irq_refcount)
260  ctl_clear_bit(0, 9);
261  spin_unlock(&sc_irq_lock);
262 }
264 
265 static DEFINE_SPINLOCK(ma_subclass_lock);
266 static int ma_subclass_refcount;
267 
269 {
270  spin_lock(&ma_subclass_lock);
271  if (!ma_subclass_refcount)
272  ctl_set_bit(0, 5);
273  ma_subclass_refcount++;
274  spin_unlock(&ma_subclass_lock);
275 }
277 
279 {
280  spin_lock(&ma_subclass_lock);
281  ma_subclass_refcount--;
282  if (!ma_subclass_refcount)
283  ctl_clear_bit(0, 5);
284  spin_unlock(&ma_subclass_lock);
285 }