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setup.c
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1 /*
2  * linux/arch/sh/boards/se/7724/setup.c
3  *
4  * Copyright (C) 2009 Renesas Solutions Corp.
5  *
6  * Kuninori Morimoto <[email protected]>
7  *
8  * This file is subject to the terms and conditions of the GNU General Public
9  * License. See the file "COPYING" in the main directory of this archive
10  * for more details.
11  */
12 
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mmc/host.h>
18 #include <linux/mmc/sh_mobile_sdhi.h>
19 #include <linux/mtd/physmap.h>
20 #include <linux/delay.h>
21 #include <linux/regulator/fixed.h>
22 #include <linux/regulator/machine.h>
23 #include <linux/smc91x.h>
24 #include <linux/gpio.h>
25 #include <linux/input.h>
26 #include <linux/input/sh_keysc.h>
27 #include <linux/usb/r8a66597.h>
28 #include <linux/sh_eth.h>
29 #include <linux/sh_intc.h>
30 #include <linux/videodev2.h>
31 #include <video/sh_mobile_lcdc.h>
32 #include <media/sh_mobile_ceu.h>
33 #include <sound/sh_fsi.h>
34 #include <sound/simple_card.h>
35 #include <asm/io.h>
36 #include <asm/heartbeat.h>
37 #include <asm/clock.h>
38 #include <asm/suspend.h>
39 #include <cpu/sh7724.h>
40 #include <mach-se/mach/se7724.h>
41 
42 /*
43  * SWx 1234 5678
44  * ------------------------------------
45  * SW31 : 1001 1100 : default
46  * SW32 : 0111 1111 : use on board flash
47  *
48  * SW41 : abxx xxxx -> a = 0 : Analog monitor
49  * 1 : Digital monitor
50  * b = 0 : VGA
51  * 1 : 720p
52  */
53 
54 /*
55  * about 720p
56  *
57  * When you use 1280 x 720 lcdc output,
58  * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
59  * and change SW41 to use 720p
60  */
61 
62 /*
63  * about sound
64  *
65  * This setup.c supports FSI slave mode.
66  * Please change J20, J21, J22 pin to 1-2 connection.
67  */
68 
69 /* Heartbeat */
70 static struct resource heartbeat_resource = {
71  .start = PA_LED,
72  .end = PA_LED,
73  .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
74 };
75 
76 static struct platform_device heartbeat_device = {
77  .name = "heartbeat",
78  .id = -1,
79  .num_resources = 1,
80  .resource = &heartbeat_resource,
81 };
82 
83 /* LAN91C111 */
84 static struct smc91x_platdata smc91x_info = {
85  .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
86 };
87 
88 static struct resource smc91x_eth_resources[] = {
89  [0] = {
90  .name = "SMC91C111" ,
91  .start = 0x1a300300,
92  .end = 0x1a30030f,
93  .flags = IORESOURCE_MEM,
94  },
95  [1] = {
96  .start = IRQ0_SMC,
97  .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
98  },
99 };
100 
101 static struct platform_device smc91x_eth_device = {
102  .name = "smc91x",
103  .num_resources = ARRAY_SIZE(smc91x_eth_resources),
104  .resource = smc91x_eth_resources,
105  .dev = {
106  .platform_data = &smc91x_info,
107  },
108 };
109 
110 /* MTD */
111 static struct mtd_partition nor_flash_partitions[] = {
112  {
113  .name = "uboot",
114  .offset = 0,
115  .size = (1 * 1024 * 1024),
116  .mask_flags = MTD_WRITEABLE, /* Read-only */
117  }, {
118  .name = "kernel",
119  .offset = MTDPART_OFS_APPEND,
120  .size = (2 * 1024 * 1024),
121  }, {
122  .name = "free-area",
123  .offset = MTDPART_OFS_APPEND,
124  .size = MTDPART_SIZ_FULL,
125  },
126 };
127 
128 static struct physmap_flash_data nor_flash_data = {
129  .width = 2,
130  .parts = nor_flash_partitions,
131  .nr_parts = ARRAY_SIZE(nor_flash_partitions),
132 };
133 
134 static struct resource nor_flash_resources[] = {
135  [0] = {
136  .name = "NOR Flash",
137  .start = 0x00000000,
138  .end = 0x01ffffff,
139  .flags = IORESOURCE_MEM,
140  }
141 };
142 
143 static struct platform_device nor_flash_device = {
144  .name = "physmap-flash",
145  .resource = nor_flash_resources,
146  .num_resources = ARRAY_SIZE(nor_flash_resources),
147  .dev = {
148  .platform_data = &nor_flash_data,
149  },
150 };
151 
152 /* LCDC */
153 static const struct fb_videomode lcdc_720p_modes[] = {
154  {
155  .name = "LB070WV1",
156  .sync = 0, /* hsync and vsync are active low */
157  .xres = 1280,
158  .yres = 720,
159  .left_margin = 220,
160  .right_margin = 110,
161  .hsync_len = 40,
162  .upper_margin = 20,
163  .lower_margin = 5,
164  .vsync_len = 5,
165  },
166 };
167 
168 static const struct fb_videomode lcdc_vga_modes[] = {
169  {
170  .name = "LB070WV1",
171  .sync = 0, /* hsync and vsync are active low */
172  .xres = 640,
173  .yres = 480,
174  .left_margin = 105,
175  .right_margin = 50,
176  .hsync_len = 96,
177  .upper_margin = 33,
178  .lower_margin = 10,
179  .vsync_len = 2,
180  },
181 };
182 
183 static struct sh_mobile_lcdc_info lcdc_info = {
184  .clock_source = LCDC_CLK_EXTERNAL,
185  .ch[0] = {
186  .chan = LCDC_CHAN_MAINLCD,
187  .fourcc = V4L2_PIX_FMT_RGB565,
188  .clock_divider = 1,
189  .panel_cfg = { /* 7.0 inch */
190  .width = 152,
191  .height = 91,
192  },
193  }
194 };
195 
196 static struct resource lcdc_resources[] = {
197  [0] = {
198  .name = "LCDC",
199  .start = 0xfe940000,
200  .end = 0xfe942fff,
201  .flags = IORESOURCE_MEM,
202  },
203  [1] = {
204  .start = evt2irq(0xf40),
205  .flags = IORESOURCE_IRQ,
206  },
207 };
208 
209 static struct platform_device lcdc_device = {
210  .name = "sh_mobile_lcdc_fb",
211  .num_resources = ARRAY_SIZE(lcdc_resources),
212  .resource = lcdc_resources,
213  .dev = {
214  .platform_data = &lcdc_info,
215  },
216 };
217 
218 /* CEU0 */
219 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
220  .flags = SH_CEU_FLAG_USE_8BIT_BUS,
221 };
222 
223 static struct resource ceu0_resources[] = {
224  [0] = {
225  .name = "CEU0",
226  .start = 0xfe910000,
227  .end = 0xfe91009f,
228  .flags = IORESOURCE_MEM,
229  },
230  [1] = {
231  .start = evt2irq(0x880),
232  .flags = IORESOURCE_IRQ,
233  },
234  [2] = {
235  /* place holder for contiguous memory */
236  },
237 };
238 
239 static struct platform_device ceu0_device = {
240  .name = "sh_mobile_ceu",
241  .id = 0, /* "ceu0" clock */
242  .num_resources = ARRAY_SIZE(ceu0_resources),
243  .resource = ceu0_resources,
244  .dev = {
245  .platform_data = &sh_mobile_ceu0_info,
246  },
247 };
248 
249 /* CEU1 */
250 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
251  .flags = SH_CEU_FLAG_USE_8BIT_BUS,
252 };
253 
254 static struct resource ceu1_resources[] = {
255  [0] = {
256  .name = "CEU1",
257  .start = 0xfe914000,
258  .end = 0xfe91409f,
259  .flags = IORESOURCE_MEM,
260  },
261  [1] = {
262  .start = evt2irq(0x9e0),
263  .flags = IORESOURCE_IRQ,
264  },
265  [2] = {
266  /* place holder for contiguous memory */
267  },
268 };
269 
270 static struct platform_device ceu1_device = {
271  .name = "sh_mobile_ceu",
272  .id = 1, /* "ceu1" clock */
273  .num_resources = ARRAY_SIZE(ceu1_resources),
274  .resource = ceu1_resources,
275  .dev = {
276  .platform_data = &sh_mobile_ceu1_info,
277  },
278 };
279 
280 /* FSI */
281 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */
282 static struct sh_fsi_platform_info fsi_info = {
283  .port_a = {
284  .flags = SH_FSI_BRS_INV,
285  },
286 };
287 
288 static struct resource fsi_resources[] = {
289  [0] = {
290  .name = "FSI",
291  .start = 0xFE3C0000,
292  .end = 0xFE3C021d,
293  .flags = IORESOURCE_MEM,
294  },
295  [1] = {
296  .start = evt2irq(0xf80),
297  .flags = IORESOURCE_IRQ,
298  },
299 };
300 
301 static struct platform_device fsi_device = {
302  .name = "sh_fsi",
303  .id = 0,
304  .num_resources = ARRAY_SIZE(fsi_resources),
305  .resource = fsi_resources,
306  .dev = {
307  .platform_data = &fsi_info,
308  },
309 };
310 
311 static struct asoc_simple_dai_init_info fsi2_ak4642_init_info = {
312  .fmt = SND_SOC_DAIFMT_LEFT_J,
313  .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
314  .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
315  .sysclk = 11289600,
316 };
317 
318 static struct asoc_simple_card_info fsi_ak4642_info = {
319  .name = "AK4642",
320  .card = "FSIA-AK4642",
321  .cpu_dai = "fsia-dai",
322  .codec = "ak4642-codec.0-0012",
323  .platform = "sh_fsi.0",
324  .codec_dai = "ak4642-hifi",
325  .init = &fsi2_ak4642_init_info,
326 };
327 
328 static struct platform_device fsi_ak4642_device = {
329  .name = "asoc-simple-card",
330  .dev = {
331  .platform_data = &fsi_ak4642_info,
332  },
333 };
334 
335 /* KEYSC in SoC (Needs SW33-2 set to ON) */
336 static struct sh_keysc_info keysc_info = {
337  .mode = SH_KEYSC_MODE_1,
338  .scan_timing = 3,
339  .delay = 50,
340  .keycodes = {
341  KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
342  KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
343  KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
344  KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
345  KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
346  KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
347  },
348 };
349 
350 static struct resource keysc_resources[] = {
351  [0] = {
352  .name = "KEYSC",
353  .start = 0x044b0000,
354  .end = 0x044b000f,
355  .flags = IORESOURCE_MEM,
356  },
357  [1] = {
358  .start = evt2irq(0xbe0),
359  .flags = IORESOURCE_IRQ,
360  },
361 };
362 
363 static struct platform_device keysc_device = {
364  .name = "sh_keysc",
365  .id = 0, /* "keysc0" clock */
366  .num_resources = ARRAY_SIZE(keysc_resources),
367  .resource = keysc_resources,
368  .dev = {
369  .platform_data = &keysc_info,
370  },
371 };
372 
373 /* SH Eth */
374 static struct resource sh_eth_resources[] = {
375  [0] = {
376  .start = SH_ETH_ADDR,
377  .end = SH_ETH_ADDR + 0x1FC,
378  .flags = IORESOURCE_MEM,
379  },
380  [1] = {
381  .start = evt2irq(0xd60),
382  .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
383  },
384 };
385 
386 static struct sh_eth_plat_data sh_eth_plat = {
387  .phy = 0x1f, /* SMSC LAN8187 */
388  .edmac_endian = EDMAC_LITTLE_ENDIAN,
389 };
390 
391 static struct platform_device sh_eth_device = {
392  .name = "sh-eth",
393  .id = 0,
394  .dev = {
395  .platform_data = &sh_eth_plat,
396  },
397  .num_resources = ARRAY_SIZE(sh_eth_resources),
398  .resource = sh_eth_resources,
399 };
400 
401 static struct r8a66597_platdata sh7724_usb0_host_data = {
402  .on_chip = 1,
403 };
404 
405 static struct resource sh7724_usb0_host_resources[] = {
406  [0] = {
407  .start = 0xa4d80000,
408  .end = 0xa4d80124 - 1,
409  .flags = IORESOURCE_MEM,
410  },
411  [1] = {
412  .start = evt2irq(0xa20),
413  .end = evt2irq(0xa20),
414  .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
415  },
416 };
417 
418 static struct platform_device sh7724_usb0_host_device = {
419  .name = "r8a66597_hcd",
420  .id = 0,
421  .dev = {
422  .dma_mask = NULL, /* not use dma */
423  .coherent_dma_mask = 0xffffffff,
424  .platform_data = &sh7724_usb0_host_data,
425  },
426  .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
427  .resource = sh7724_usb0_host_resources,
428 };
429 
430 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
431  .on_chip = 1,
432 };
433 
434 static struct resource sh7724_usb1_gadget_resources[] = {
435  [0] = {
436  .start = 0xa4d90000,
437  .end = 0xa4d90123,
438  .flags = IORESOURCE_MEM,
439  },
440  [1] = {
441  .start = evt2irq(0xa40),
442  .end = evt2irq(0xa40),
443  .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
444  },
445 };
446 
447 static struct platform_device sh7724_usb1_gadget_device = {
448  .name = "r8a66597_udc",
449  .id = 1, /* USB1 */
450  .dev = {
451  .dma_mask = NULL, /* not use dma */
452  .coherent_dma_mask = 0xffffffff,
453  .platform_data = &sh7724_usb1_gadget_data,
454  },
455  .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
456  .resource = sh7724_usb1_gadget_resources,
457 };
458 
459 /* Fixed 3.3V regulator to be used by SDHI0, SDHI1 */
460 static struct regulator_consumer_supply fixed3v3_power_consumers[] =
461 {
462  REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
463  REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
464  REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
465  REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
466 };
467 
468 static struct resource sdhi0_cn7_resources[] = {
469  [0] = {
470  .name = "SDHI0",
471  .start = 0x04ce0000,
472  .end = 0x04ce00ff,
473  .flags = IORESOURCE_MEM,
474  },
475  [1] = {
476  .start = evt2irq(0xe80),
477  .flags = IORESOURCE_IRQ,
478  },
479 };
480 
481 static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
482  .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
483  .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
484  .tmio_caps = MMC_CAP_SDIO_IRQ,
485 };
486 
487 static struct platform_device sdhi0_cn7_device = {
488  .name = "sh_mobile_sdhi",
489  .id = 0,
490  .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
491  .resource = sdhi0_cn7_resources,
492  .dev = {
493  .platform_data = &sh7724_sdhi0_data,
494  },
495 };
496 
497 static struct resource sdhi1_cn8_resources[] = {
498  [0] = {
499  .name = "SDHI1",
500  .start = 0x04cf0000,
501  .end = 0x04cf00ff,
502  .flags = IORESOURCE_MEM,
503  },
504  [1] = {
505  .start = evt2irq(0x4e0),
506  .flags = IORESOURCE_IRQ,
507  },
508 };
509 
510 static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
511  .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
512  .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
513  .tmio_caps = MMC_CAP_SDIO_IRQ,
514 };
515 
516 static struct platform_device sdhi1_cn8_device = {
517  .name = "sh_mobile_sdhi",
518  .id = 1,
519  .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
520  .resource = sdhi1_cn8_resources,
521  .dev = {
522  .platform_data = &sh7724_sdhi1_data,
523  },
524 };
525 
526 /* IrDA */
527 static struct resource irda_resources[] = {
528  [0] = {
529  .name = "IrDA",
530  .start = 0xA45D0000,
531  .end = 0xA45D0049,
532  .flags = IORESOURCE_MEM,
533  },
534  [1] = {
535  .start = evt2irq(0x480),
536  .flags = IORESOURCE_IRQ,
537  },
538 };
539 
540 static struct platform_device irda_device = {
541  .name = "sh_sir",
542  .num_resources = ARRAY_SIZE(irda_resources),
543  .resource = irda_resources,
544 };
545 
546 #include <media/ak881x.h>
547 #include <media/sh_vou.h>
548 
549 static struct ak881x_pdata ak881x_pdata = {
550  .flags = AK881X_IF_MODE_SLAVE,
551 };
552 
553 static struct i2c_board_info ak8813 = {
554  /* With open J18 jumper address is 0x21 */
555  I2C_BOARD_INFO("ak8813", 0x20),
556  .platform_data = &ak881x_pdata,
557 };
558 
559 static struct sh_vou_pdata sh_vou_pdata = {
560  .bus_fmt = SH_VOU_BUS_8BIT,
561  .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
562  .board_info = &ak8813,
563  .i2c_adap = 0,
564 };
565 
566 static struct resource sh_vou_resources[] = {
567  [0] = {
568  .start = 0xfe960000,
569  .end = 0xfe962043,
570  .flags = IORESOURCE_MEM,
571  },
572  [1] = {
573  .start = evt2irq(0x8e0),
574  .flags = IORESOURCE_IRQ,
575  },
576 };
577 
578 static struct platform_device vou_device = {
579  .name = "sh-vou",
580  .id = -1,
581  .num_resources = ARRAY_SIZE(sh_vou_resources),
582  .resource = sh_vou_resources,
583  .dev = {
584  .platform_data = &sh_vou_pdata,
585  },
586 };
587 
588 static struct platform_device *ms7724se_devices[] __initdata = {
589  &heartbeat_device,
590  &smc91x_eth_device,
591  &lcdc_device,
592  &nor_flash_device,
593  &ceu0_device,
594  &ceu1_device,
595  &keysc_device,
596  &sh_eth_device,
597  &sh7724_usb0_host_device,
598  &sh7724_usb1_gadget_device,
599  &fsi_device,
600  &fsi_ak4642_device,
601  &sdhi0_cn7_device,
602  &sdhi1_cn8_device,
603  &irda_device,
604  &vou_device,
605 };
606 
607 /* I2C device */
608 static struct i2c_board_info i2c0_devices[] = {
609  {
610  I2C_BOARD_INFO("ak4642", 0x12),
611  },
612 };
613 
614 #define EEPROM_OP 0xBA206000
615 #define EEPROM_ADR 0xBA206004
616 #define EEPROM_DATA 0xBA20600C
617 #define EEPROM_STAT 0xBA206010
618 #define EEPROM_STRT 0xBA206014
619 
620 static int __init sh_eth_is_eeprom_ready(void)
621 {
622  int t = 10000;
623 
624  while (t--) {
625  if (!__raw_readw(EEPROM_STAT))
626  return 1;
627  udelay(1);
628  }
629 
630  printk(KERN_ERR "ms7724se can not access to eeprom\n");
631  return 0;
632 }
633 
634 static void __init sh_eth_init(void)
635 {
636  int i;
637  u16 mac;
638 
639  /* check EEPROM status */
640  if (!sh_eth_is_eeprom_ready())
641  return;
642 
643  /* read MAC addr from EEPROM */
644  for (i = 0 ; i < 3 ; i++) {
645  __raw_writew(0x0, EEPROM_OP); /* read */
646  __raw_writew(i*2, EEPROM_ADR);
647  __raw_writew(0x1, EEPROM_STRT);
648  if (!sh_eth_is_eeprom_ready())
649  return;
650 
651  mac = __raw_readw(EEPROM_DATA);
652  sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
653  sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
654  }
655 }
656 
657 #define SW4140 0xBA201000
658 #define FPGA_OUT 0xBA200400
659 #define PORT_HIZA 0xA4050158
660 #define PORT_MSELCRB 0xA4050182
661 
662 #define SW41_A 0x0100
663 #define SW41_B 0x0200
664 #define SW41_C 0x0400
665 #define SW41_D 0x0800
666 #define SW41_E 0x1000
667 #define SW41_F 0x2000
668 #define SW41_G 0x4000
669 #define SW41_H 0x8000
670 
671 extern char ms7724se_sdram_enter_start;
672 extern char ms7724se_sdram_enter_end;
673 extern char ms7724se_sdram_leave_start;
674 extern char ms7724se_sdram_leave_end;
675 
676 static int __init arch_setup(void)
677 {
678  /* enable I2C device */
679  i2c_register_board_info(0, i2c0_devices,
680  ARRAY_SIZE(i2c0_devices));
681  return 0;
682 }
683 arch_initcall(arch_setup);
684 
685 static int __init devices_setup(void)
686 {
687  u16 sw = __raw_readw(SW4140); /* select camera, monitor */
688  struct clk *clk;
689  u16 fpga_out;
690 
691  /* register board specific self-refresh code */
692  sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
693  SUSP_SH_RSTANDBY,
694  &ms7724se_sdram_enter_start,
695  &ms7724se_sdram_enter_end,
696  &ms7724se_sdram_leave_start,
697  &ms7724se_sdram_leave_end);
698 
699  regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
700  ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
701 
702  /* Reset Release */
703  fpga_out = __raw_readw(FPGA_OUT);
704  /* bit4: NTSC_PDN, bit5: NTSC_RESET */
705  fpga_out &= ~((1 << 1) | /* LAN */
706  (1 << 4) | /* AK8813 PDN */
707  (1 << 5) | /* AK8813 RESET */
708  (1 << 6) | /* VIDEO DAC */
709  (1 << 7) | /* AK4643 */
710  (1 << 8) | /* IrDA */
711  (1 << 12) | /* USB0 */
712  (1 << 14)); /* RMII */
713  __raw_writew(fpga_out | (1 << 4), FPGA_OUT);
714 
715  udelay(10);
716 
717  /* AK8813 RESET */
718  __raw_writew(fpga_out | (1 << 5), FPGA_OUT);
719 
720  udelay(10);
721 
722  __raw_writew(fpga_out, FPGA_OUT);
723 
724  /* turn on USB clocks, use external clock */
725  __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
726 
727  /* Let LED9 show STATUS2 */
728  gpio_request(GPIO_FN_STATUS2, NULL);
729 
730  /* Lit LED10 show STATUS0 */
731  gpio_request(GPIO_FN_STATUS0, NULL);
732 
733  /* Lit LED11 show PDSTATUS */
734  gpio_request(GPIO_FN_PDSTATUS, NULL);
735 
736  /* enable USB0 port */
737  __raw_writew(0x0600, 0xa40501d4);
738 
739  /* enable USB1 port */
740  __raw_writew(0x0600, 0xa4050192);
741 
742  /* enable IRQ 0,1,2 */
743  gpio_request(GPIO_FN_INTC_IRQ0, NULL);
744  gpio_request(GPIO_FN_INTC_IRQ1, NULL);
745  gpio_request(GPIO_FN_INTC_IRQ2, NULL);
746 
747  /* enable SCIFA3 */
748  gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
749  gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
750  gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
751  gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
752  gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
753 
754  /* enable LCDC */
755  gpio_request(GPIO_FN_LCDD23, NULL);
756  gpio_request(GPIO_FN_LCDD22, NULL);
757  gpio_request(GPIO_FN_LCDD21, NULL);
758  gpio_request(GPIO_FN_LCDD20, NULL);
759  gpio_request(GPIO_FN_LCDD19, NULL);
760  gpio_request(GPIO_FN_LCDD18, NULL);
761  gpio_request(GPIO_FN_LCDD17, NULL);
762  gpio_request(GPIO_FN_LCDD16, NULL);
763  gpio_request(GPIO_FN_LCDD15, NULL);
764  gpio_request(GPIO_FN_LCDD14, NULL);
765  gpio_request(GPIO_FN_LCDD13, NULL);
766  gpio_request(GPIO_FN_LCDD12, NULL);
767  gpio_request(GPIO_FN_LCDD11, NULL);
768  gpio_request(GPIO_FN_LCDD10, NULL);
769  gpio_request(GPIO_FN_LCDD9, NULL);
770  gpio_request(GPIO_FN_LCDD8, NULL);
771  gpio_request(GPIO_FN_LCDD7, NULL);
772  gpio_request(GPIO_FN_LCDD6, NULL);
773  gpio_request(GPIO_FN_LCDD5, NULL);
774  gpio_request(GPIO_FN_LCDD4, NULL);
775  gpio_request(GPIO_FN_LCDD3, NULL);
776  gpio_request(GPIO_FN_LCDD2, NULL);
777  gpio_request(GPIO_FN_LCDD1, NULL);
778  gpio_request(GPIO_FN_LCDD0, NULL);
779  gpio_request(GPIO_FN_LCDDISP, NULL);
780  gpio_request(GPIO_FN_LCDHSYN, NULL);
781  gpio_request(GPIO_FN_LCDDCK, NULL);
782  gpio_request(GPIO_FN_LCDVSYN, NULL);
783  gpio_request(GPIO_FN_LCDDON, NULL);
784  gpio_request(GPIO_FN_LCDVEPWC, NULL);
785  gpio_request(GPIO_FN_LCDVCPWC, NULL);
786  gpio_request(GPIO_FN_LCDRD, NULL);
787  gpio_request(GPIO_FN_LCDLCLK, NULL);
788  __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
789 
790  /* enable CEU0 */
791  gpio_request(GPIO_FN_VIO0_D15, NULL);
792  gpio_request(GPIO_FN_VIO0_D14, NULL);
793  gpio_request(GPIO_FN_VIO0_D13, NULL);
794  gpio_request(GPIO_FN_VIO0_D12, NULL);
795  gpio_request(GPIO_FN_VIO0_D11, NULL);
796  gpio_request(GPIO_FN_VIO0_D10, NULL);
797  gpio_request(GPIO_FN_VIO0_D9, NULL);
798  gpio_request(GPIO_FN_VIO0_D8, NULL);
799  gpio_request(GPIO_FN_VIO0_D7, NULL);
800  gpio_request(GPIO_FN_VIO0_D6, NULL);
801  gpio_request(GPIO_FN_VIO0_D5, NULL);
802  gpio_request(GPIO_FN_VIO0_D4, NULL);
803  gpio_request(GPIO_FN_VIO0_D3, NULL);
804  gpio_request(GPIO_FN_VIO0_D2, NULL);
805  gpio_request(GPIO_FN_VIO0_D1, NULL);
806  gpio_request(GPIO_FN_VIO0_D0, NULL);
807  gpio_request(GPIO_FN_VIO0_VD, NULL);
808  gpio_request(GPIO_FN_VIO0_CLK, NULL);
809  gpio_request(GPIO_FN_VIO0_FLD, NULL);
810  gpio_request(GPIO_FN_VIO0_HD, NULL);
811  platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
812 
813  /* enable CEU1 */
814  gpio_request(GPIO_FN_VIO1_D7, NULL);
815  gpio_request(GPIO_FN_VIO1_D6, NULL);
816  gpio_request(GPIO_FN_VIO1_D5, NULL);
817  gpio_request(GPIO_FN_VIO1_D4, NULL);
818  gpio_request(GPIO_FN_VIO1_D3, NULL);
819  gpio_request(GPIO_FN_VIO1_D2, NULL);
820  gpio_request(GPIO_FN_VIO1_D1, NULL);
821  gpio_request(GPIO_FN_VIO1_D0, NULL);
822  gpio_request(GPIO_FN_VIO1_FLD, NULL);
823  gpio_request(GPIO_FN_VIO1_HD, NULL);
824  gpio_request(GPIO_FN_VIO1_VD, NULL);
825  gpio_request(GPIO_FN_VIO1_CLK, NULL);
826  platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
827 
828  /* KEYSC */
829  gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
830  gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
831  gpio_request(GPIO_FN_KEYIN4, NULL);
832  gpio_request(GPIO_FN_KEYIN3, NULL);
833  gpio_request(GPIO_FN_KEYIN2, NULL);
834  gpio_request(GPIO_FN_KEYIN1, NULL);
835  gpio_request(GPIO_FN_KEYIN0, NULL);
836  gpio_request(GPIO_FN_KEYOUT3, NULL);
837  gpio_request(GPIO_FN_KEYOUT2, NULL);
838  gpio_request(GPIO_FN_KEYOUT1, NULL);
839  gpio_request(GPIO_FN_KEYOUT0, NULL);
840 
841  /* enable FSI */
842  gpio_request(GPIO_FN_FSIMCKA, NULL);
843  gpio_request(GPIO_FN_FSIIASD, NULL);
844  gpio_request(GPIO_FN_FSIOASD, NULL);
845  gpio_request(GPIO_FN_FSIIABCK, NULL);
846  gpio_request(GPIO_FN_FSIIALRCK, NULL);
847  gpio_request(GPIO_FN_FSIOABCK, NULL);
848  gpio_request(GPIO_FN_FSIOALRCK, NULL);
849  gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
850 
851  /* set SPU2 clock to 83.4 MHz */
852  clk = clk_get(NULL, "spu_clk");
853  if (!IS_ERR(clk)) {
854  clk_set_rate(clk, clk_round_rate(clk, 83333333));
855  clk_put(clk);
856  }
857 
858  /* change parent of FSI A */
859  clk = clk_get(NULL, "fsia_clk");
860  if (!IS_ERR(clk)) {
861  /* 48kHz dummy clock was used to make sure 1/1 divide */
862  clk_set_rate(&sh7724_fsimcka_clk, 48000);
863  clk_set_parent(clk, &sh7724_fsimcka_clk);
864  clk_set_rate(clk, 48000);
865  clk_put(clk);
866  }
867 
868  /* SDHI0 connected to cn7 */
869  gpio_request(GPIO_FN_SDHI0CD, NULL);
870  gpio_request(GPIO_FN_SDHI0WP, NULL);
871  gpio_request(GPIO_FN_SDHI0D3, NULL);
872  gpio_request(GPIO_FN_SDHI0D2, NULL);
873  gpio_request(GPIO_FN_SDHI0D1, NULL);
874  gpio_request(GPIO_FN_SDHI0D0, NULL);
875  gpio_request(GPIO_FN_SDHI0CMD, NULL);
876  gpio_request(GPIO_FN_SDHI0CLK, NULL);
877 
878  /* SDHI1 connected to cn8 */
879  gpio_request(GPIO_FN_SDHI1CD, NULL);
880  gpio_request(GPIO_FN_SDHI1WP, NULL);
881  gpio_request(GPIO_FN_SDHI1D3, NULL);
882  gpio_request(GPIO_FN_SDHI1D2, NULL);
883  gpio_request(GPIO_FN_SDHI1D1, NULL);
884  gpio_request(GPIO_FN_SDHI1D0, NULL);
885  gpio_request(GPIO_FN_SDHI1CMD, NULL);
886  gpio_request(GPIO_FN_SDHI1CLK, NULL);
887 
888  /* enable IrDA */
889  gpio_request(GPIO_FN_IRDA_OUT, NULL);
890  gpio_request(GPIO_FN_IRDA_IN, NULL);
891 
892  /*
893  * enable SH-Eth
894  *
895  * please remove J33 pin from your board !!
896  *
897  * ms7724 board should not use GPIO_FN_LNKSTA pin
898  * So, This time PTX5 is set to input pin
899  */
900  gpio_request(GPIO_FN_RMII_RXD0, NULL);
901  gpio_request(GPIO_FN_RMII_RXD1, NULL);
902  gpio_request(GPIO_FN_RMII_TXD0, NULL);
903  gpio_request(GPIO_FN_RMII_TXD1, NULL);
904  gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
905  gpio_request(GPIO_FN_RMII_TX_EN, NULL);
906  gpio_request(GPIO_FN_RMII_RX_ER, NULL);
907  gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
908  gpio_request(GPIO_FN_MDIO, NULL);
909  gpio_request(GPIO_FN_MDC, NULL);
910  gpio_request(GPIO_PTX5, NULL);
911  gpio_direction_input(GPIO_PTX5);
912  sh_eth_init();
913 
914  if (sw & SW41_B) {
915  /* 720p */
916  lcdc_info.ch[0].lcd_modes = lcdc_720p_modes;
917  lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes);
918  } else {
919  /* VGA */
920  lcdc_info.ch[0].lcd_modes = lcdc_vga_modes;
921  lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes);
922  }
923 
924  if (sw & SW41_A) {
925  /* Digital monitor */
926  lcdc_info.ch[0].interface_type = RGB18;
927  lcdc_info.ch[0].flags = 0;
928  } else {
929  /* Analog monitor */
930  lcdc_info.ch[0].interface_type = RGB24;
931  lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
932  }
933 
934  /* VOU */
935  gpio_request(GPIO_FN_DV_D15, NULL);
936  gpio_request(GPIO_FN_DV_D14, NULL);
937  gpio_request(GPIO_FN_DV_D13, NULL);
938  gpio_request(GPIO_FN_DV_D12, NULL);
939  gpio_request(GPIO_FN_DV_D11, NULL);
940  gpio_request(GPIO_FN_DV_D10, NULL);
941  gpio_request(GPIO_FN_DV_D9, NULL);
942  gpio_request(GPIO_FN_DV_D8, NULL);
943  gpio_request(GPIO_FN_DV_CLKI, NULL);
944  gpio_request(GPIO_FN_DV_CLK, NULL);
945  gpio_request(GPIO_FN_DV_VSYNC, NULL);
946  gpio_request(GPIO_FN_DV_HSYNC, NULL);
947 
948  return platform_add_devices(ms7724se_devices,
949  ARRAY_SIZE(ms7724se_devices));
950 }
951 device_initcall(devices_setup);
952 
953 static struct sh_machine_vector mv_ms7724se __initmv = {
954  .mv_name = "ms7724se",
955  .mv_init_irq = init_se7724_IRQ,
956 };
Generated on Thu Jan 10 2013 12:52:59 for Linux Kernel by   doxygen 1.8.2