Macros
#define	at91_aic_read(field) __raw_readl(at91_aic_base + field)

#define	at91_aic_write(field, value) __raw_writel(value, at91_aic_base + field)

#define	NR_AIC_IRQS 32

#define	NR_AIC5_IRQS 128

#define	AT91_AIC5_SSR 0x0 /* Source Select Register [AIC5] */

#define	AT91_AIC5_INTSEL_MSK (0x7f << 0) /* Interrupt Line Selection Mask */

#define	AT91_AIC_IRQ_MIN_PRIORITY 0

#define	AT91_AIC_IRQ_MAX_PRIORITY 7

#define	AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */

#define	AT91_AIC5_SMR 0x4 /* Source Mode Register [AIC5] */

#define	AT91_AIC_PRIOR (7 << 0) /* Priority Level */

#define	AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */

#define	AT91_AIC_SRCTYPE_LOW (0 << 5)

#define	AT91_AIC_SRCTYPE_FALLING (1 << 5)

#define	AT91_AIC_SRCTYPE_HIGH (2 << 5)

#define	AT91_AIC_SRCTYPE_RISING (3 << 5)

#define	AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */

#define	AT91_AIC5_SVR 0x8 /* Source Vector Register [AIC5] */

#define	AT91_AIC_IVR 0x100 /* Interrupt Vector Register */

#define	AT91_AIC5_IVR 0x10 /* Interrupt Vector Register [AIC5] */

#define	AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */

#define	AT91_AIC5_FVR 0x14 /* Fast Interrupt Vector Register [AIC5] */

#define	AT91_AIC_ISR 0x108 /* Interrupt Status Register */

#define	AT91_AIC5_ISR 0x18 /* Interrupt Status Register [AIC5] */

#define	AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */

#define	AT91_AIC_IPR 0x10c /* Interrupt Pending Register */

#define	AT91_AIC5_IPR0 0x20 /* Interrupt Pending Register 0 [AIC5] */

#define	AT91_AIC5_IPR1 0x24 /* Interrupt Pending Register 1 [AIC5] */

#define	AT91_AIC5_IPR2 0x28 /* Interrupt Pending Register 2 [AIC5] */

#define	AT91_AIC5_IPR3 0x2c /* Interrupt Pending Register 3 [AIC5] */

#define	AT91_AIC_IMR 0x110 /* Interrupt Mask Register */

#define	AT91_AIC5_IMR 0x30 /* Interrupt Mask Register [AIC5] */

#define	AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */

#define	AT91_AIC5_CISR 0x34 /* Core Interrupt Status Register [AIC5] */

#define	AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */

#define	AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */

#define	AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */

#define	AT91_AIC5_IECR 0x40 /* Interrupt Enable Command Register [AIC5] */

#define	AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */

#define	AT91_AIC5_IDCR 0x44 /* Interrupt Disable Command Register [AIC5] */

#define	AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */

#define	AT91_AIC5_ICCR 0x48 /* Interrupt Clear Command Register [AIC5] */

#define	AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */

#define	AT91_AIC5_ISCR 0x4c /* Interrupt Set Command Register [AIC5] */

#define	AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */

#define	AT91_AIC5_EOICR 0x38 /* End of Interrupt Command Register [AIC5] */

#define	AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */

#define	AT91_AIC5_SPU 0x3c /* Spurious Interrupt Vector Register [AIC5] */

#define	AT91_AIC_DCR 0x138 /* Debug Control Register */

#define	AT91_AIC5_DCR 0x6c /* Debug Control Register [AIC5] */

#define	AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */

#define	AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */

#define	AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */

#define	AT91_AIC5_FFER 0x50 /* Fast Forcing Enable Register [AIC5] */

#define	AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */

#define	AT91_AIC5_FFDR 0x54 /* Fast Forcing Disable Register [AIC5] */

#define	AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */

#define	AT91_AIC5_FFSR 0x58 /* Fast Forcing Status Register [AIC5] */

Functions
void	at91_aic_handle_irq (struct pt_regs *regs)

void	at91_aic5_handle_irq (struct pt_regs *regs)

Variables
void __iomem *	at91_aic_base

Macro Definition Documentation

#define AT91_AIC5_CISR 0x34 /* Core Interrupt Status Register [AIC5] */

Definition at line 68 of file at91_aic.h.

#define AT91_AIC5_DCR 0x6c /* Debug Control Register [AIC5] */

Definition at line 85 of file at91_aic.h.

#define AT91_AIC5_EOICR 0x38 /* End of Interrupt Command Register [AIC5] */

Definition at line 81 of file at91_aic.h.

#define AT91_AIC5_FFDR 0x54 /* Fast Forcing Disable Register [AIC5] */

Definition at line 92 of file at91_aic.h.

#define AT91_AIC5_FFER 0x50 /* Fast Forcing Enable Register [AIC5] */

Definition at line 90 of file at91_aic.h.

#define AT91_AIC5_FFSR 0x58 /* Fast Forcing Status Register [AIC5] */

Definition at line 94 of file at91_aic.h.

#define AT91_AIC5_FVR 0x14 /* Fast Interrupt Vector Register [AIC5] */

Definition at line 55 of file at91_aic.h.

#define AT91_AIC5_ICCR 0x48 /* Interrupt Clear Command Register [AIC5] */

Definition at line 77 of file at91_aic.h.

#define AT91_AIC5_IDCR 0x44 /* Interrupt Disable Command Register [AIC5] */

Definition at line 75 of file at91_aic.h.

#define AT91_AIC5_IECR 0x40 /* Interrupt Enable Command Register [AIC5] */

Definition at line 73 of file at91_aic.h.

#define AT91_AIC5_IMR 0x30 /* Interrupt Mask Register [AIC5] */

Definition at line 66 of file at91_aic.h.

#define AT91_AIC5_INTSEL_MSK (0x7f << 0) /* Interrupt Line Selection Mask */

Definition at line 36 of file at91_aic.h.

#define AT91_AIC5_IPR0 0x20 /* Interrupt Pending Register 0 [AIC5] */

Definition at line 61 of file at91_aic.h.

#define AT91_AIC5_IPR1 0x24 /* Interrupt Pending Register 1 [AIC5] */

Definition at line 62 of file at91_aic.h.

#define AT91_AIC5_IPR2 0x28 /* Interrupt Pending Register 2 [AIC5] */

Definition at line 63 of file at91_aic.h.

#define AT91_AIC5_IPR3 0x2c /* Interrupt Pending Register 3 [AIC5] */

Definition at line 64 of file at91_aic.h.

#define AT91_AIC5_ISCR 0x4c /* Interrupt Set Command Register [AIC5] */

Definition at line 79 of file at91_aic.h.

#define AT91_AIC5_ISR 0x18 /* Interrupt Status Register [AIC5] */

Definition at line 57 of file at91_aic.h.

#define AT91_AIC5_IVR 0x10 /* Interrupt Vector Register [AIC5] */

Definition at line 53 of file at91_aic.h.

#define AT91_AIC5_SMR 0x4 /* Source Mode Register [AIC5] */

Definition at line 42 of file at91_aic.h.

#define AT91_AIC5_SPU 0x3c /* Spurious Interrupt Vector Register [AIC5] */

Definition at line 83 of file at91_aic.h.

#define AT91_AIC5_SSR 0x0 /* Source Select Register [AIC5] */

Definition at line 35 of file at91_aic.h.

#define AT91_AIC5_SVR 0x8 /* Source Vector Register [AIC5] */

Definition at line 51 of file at91_aic.h.

#define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */

Definition at line 67 of file at91_aic.h.

#define AT91_AIC_DCR 0x138 /* Debug Control Register */

Definition at line 84 of file at91_aic.h.

#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */

Definition at line 87 of file at91_aic.h.

#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */

Definition at line 86 of file at91_aic.h.

#define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */

Definition at line 80 of file at91_aic.h.

#define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */

Definition at line 91 of file at91_aic.h.

#define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */

Definition at line 89 of file at91_aic.h.

#define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */

Definition at line 93 of file at91_aic.h.

#define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */

Definition at line 54 of file at91_aic.h.

#define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */

Definition at line 76 of file at91_aic.h.

#define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */

Definition at line 74 of file at91_aic.h.

#define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */

Definition at line 72 of file at91_aic.h.

#define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */

Definition at line 65 of file at91_aic.h.

#define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */

Definition at line 60 of file at91_aic.h.

#define AT91_AIC_IRQ_MAX_PRIORITY 7

Definition at line 39 of file at91_aic.h.

#define AT91_AIC_IRQ_MIN_PRIORITY 0

Definition at line 38 of file at91_aic.h.

#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */

Definition at line 58 of file at91_aic.h.

#define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */

Definition at line 78 of file at91_aic.h.

#define AT91_AIC_ISR 0x108 /* Interrupt Status Register */

Definition at line 56 of file at91_aic.h.

#define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */

Definition at line 52 of file at91_aic.h.

#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */

Definition at line 69 of file at91_aic.h.

#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */

Definition at line 70 of file at91_aic.h.

#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */

Definition at line 43 of file at91_aic.h.

#define at91_aic_read ( field ) __raw_readl(at91_aic_base + field)

Definition at line 22 of file at91_aic.h.

#define AT91_AIC_SMR ( n ) ((n) * 4) /* Source Mode Registers 0-31 */

Definition at line 41 of file at91_aic.h.

#define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */

Definition at line 82 of file at91_aic.h.

#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */

Definition at line 44 of file at91_aic.h.

#define AT91_AIC_SRCTYPE_FALLING (1 << 5)

Definition at line 46 of file at91_aic.h.

#define AT91_AIC_SRCTYPE_HIGH (2 << 5)

Definition at line 47 of file at91_aic.h.

#define AT91_AIC_SRCTYPE_LOW (0 << 5)

Definition at line 45 of file at91_aic.h.

#define AT91_AIC_SRCTYPE_RISING (3 << 5)

Definition at line 48 of file at91_aic.h.

#define AT91_AIC_SVR ( n ) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */

Definition at line 50 of file at91_aic.h.

#define at91_aic_write	(	field,
		value
	)	__raw_writel(value, at91_aic_base + field)

Definition at line 25 of file at91_aic.h.

#define NR_AIC5_IRQS 128

Definition at line 33 of file at91_aic.h.

#define NR_AIC_IRQS 32

Definition at line 32 of file at91_aic.h.

Function Documentation

void at91_aic5_handle_irq ( struct pt_regs * regs )

Definition at line 177 of file irq.c.

void at91_aic_handle_irq ( struct pt_regs * regs )

Definition at line 158 of file irq.c.

Variable Documentation

void __iomem* at91_aic_base

Definition at line 47 of file irq.c.

Macros

Functions

Variables

Macro Definition Documentation

Function Documentation

Variable Documentation