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Macros
bcma_regs.h File Reference

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Macros

#define BCMA_CLKCTLST   0x01E0 /* Clock control and status */
 
#define BCMA_CLKCTLST_FORCEALP   0x00000001 /* Force ALP request */
 
#define BCMA_CLKCTLST_FORCEHT   0x00000002 /* Force HT request */
 
#define BCMA_CLKCTLST_FORCEILP   0x00000004 /* Force ILP request */
 
#define BCMA_CLKCTLST_HAVEALPREQ   0x00000008 /* ALP available request */
 
#define BCMA_CLKCTLST_HAVEHTREQ   0x00000010 /* HT available request */
 
#define BCMA_CLKCTLST_HWCROFF   0x00000020 /* Force HW clock request off */
 
#define BCMA_CLKCTLST_EXTRESREQ   0x00000700 /* Mask of external resource requests */
 
#define BCMA_CLKCTLST_EXTRESREQ_SHIFT   8
 
#define BCMA_CLKCTLST_HAVEALP   0x00010000 /* ALP available */
 
#define BCMA_CLKCTLST_HAVEHT   0x00020000 /* HT available */
 
#define BCMA_CLKCTLST_BP_ON_ALP   0x00040000 /* RO: running on ALP clock */
 
#define BCMA_CLKCTLST_BP_ON_HT   0x00080000 /* RO: running on HT clock */
 
#define BCMA_CLKCTLST_EXTRESST   0x07000000 /* Mask of external resource status */
 
#define BCMA_CLKCTLST_EXTRESST_SHIFT   24
 
#define BCMA_CLKCTLST_4328A0_HAVEHT   0x00010000 /* 4328a0 has reversed bits */
 
#define BCMA_CLKCTLST_4328A0_HAVEALP   0x00020000 /* 4328a0 has reversed bits */
 
#define BCMA_IOCTL   0x0408 /* IO control */
 
#define BCMA_IOCTL_CLK   0x0001
 
#define BCMA_IOCTL_FGC   0x0002
 
#define BCMA_IOCTL_CORE_BITS   0x3FFC
 
#define BCMA_IOCTL_PME_EN   0x4000
 
#define BCMA_IOCTL_BIST_EN   0x8000
 
#define BCMA_IOST   0x0500 /* IO status */
 
#define BCMA_IOST_CORE_BITS   0x0FFF
 
#define BCMA_IOST_DMA64   0x1000
 
#define BCMA_IOST_GATED_CLK   0x2000
 
#define BCMA_IOST_BIST_ERROR   0x4000
 
#define BCMA_IOST_BIST_DONE   0x8000
 
#define BCMA_RESET_CTL   0x0800
 
#define BCMA_RESET_CTL_RESET   0x0001
 
#define BCMA_PCI_PMCSR   0x44
 
#define BCMA_PCI_PE   0x100
 
#define BCMA_PCI_BAR0_WIN   0x80 /* Backplane address space 0 */
 
#define BCMA_PCI_BAR1_WIN   0x84 /* Backplane address space 1 */
 
#define BCMA_PCI_SPROMCTL   0x88 /* SPROM control */
 
#define BCMA_PCI_SPROMCTL_WE   0x10 /* SPROM write enable */
 
#define BCMA_PCI_BAR1_CONTROL   0x8c /* Address space 1 burst control */
 
#define BCMA_PCI_IRQS   0x90 /* PCI interrupts */
 
#define BCMA_PCI_IRQMASK   0x94 /* PCI IRQ control and mask (pcirev >= 6 only) */
 
#define BCMA_PCI_BACKPLANE_IRQS   0x98 /* Backplane Interrupts */
 
#define BCMA_PCI_BAR0_WIN2   0xAC
 
#define BCMA_PCI_GPIO_IN   0xB0 /* GPIO Input (pcirev >= 3 only) */
 
#define BCMA_PCI_GPIO_OUT   0xB4 /* GPIO Output (pcirev >= 3 only) */
 
#define BCMA_PCI_GPIO_OUT_ENABLE   0xB8 /* GPIO Output Enable/Disable (pcirev >= 3 only) */
 
#define BCMA_PCI_GPIO_SCS   0x10 /* PCI config space bit 4 for 4306c0 slow clock source */
 
#define BCMA_PCI_GPIO_HWRAD   0x20 /* PCI config space GPIO 13 for hw radio disable */
 
#define BCMA_PCI_GPIO_XTAL   0x40 /* PCI config space GPIO 14 for Xtal powerup */
 
#define BCMA_PCI_GPIO_PLL   0x80 /* PCI config space GPIO 15 for PLL powerdown */
 
#define BCMA_SOC_SDRAM_BASE   0x00000000U /* Physical SDRAM */
 
#define BCMA_SOC_PCI_MEM   0x08000000U /* Host Mode sb2pcitranslation0 (64 MB) */
 
#define BCMA_SOC_PCI_MEM_SZ   (64 * 1024 * 1024)
 
#define BCMA_SOC_PCI_CFG   0x0c000000U /* Host Mode sb2pcitranslation1 (64 MB) */
 
#define BCMA_SOC_SDRAM_SWAPPED   0x10000000U /* Byteswapped Physical SDRAM */
 
#define BCMA_SOC_SDRAM_R2   0x80000000U /* Region 2 for sdram (512 MB) */
 
#define BCMA_SOC_PCI_DMA   0x40000000U /* Client Mode sb2pcitranslation2 (1 GB) */
 
#define BCMA_SOC_PCI_DMA2   0x80000000U /* Client Mode sb2pcitranslation2 (1 GB) */
 
#define BCMA_SOC_PCI_DMA_SZ   0x40000000U /* Client Mode sb2pcitranslation2 size in bytes */
 
#define BCMA_SOC_PCIE_DMA_L32
 
#define BCMA_SOC_PCIE_DMA_H32
 
#define BCMA_SOC_PCI1_MEM   0x40000000U /* Host Mode sb2pcitranslation0 (64 MB) */
 
#define BCMA_SOC_PCI1_CFG   0x44000000U /* Host Mode sb2pcitranslation1 (64 MB) */
 
#define BCMA_SOC_PCIE1_DMA_H32
 
#define BCMA_SFLASH   0x1c000000
 

Macro Definition Documentation

#define BCMA_CLKCTLST   0x01E0 /* Clock control and status */

Definition at line 6 of file bcma_regs.h.

#define BCMA_CLKCTLST_4328A0_HAVEALP   0x00020000 /* 4328a0 has reversed bits */

Definition at line 23 of file bcma_regs.h.

#define BCMA_CLKCTLST_4328A0_HAVEHT   0x00010000 /* 4328a0 has reversed bits */

Definition at line 22 of file bcma_regs.h.

#define BCMA_CLKCTLST_BP_ON_ALP   0x00040000 /* RO: running on ALP clock */

Definition at line 17 of file bcma_regs.h.

#define BCMA_CLKCTLST_BP_ON_HT   0x00080000 /* RO: running on HT clock */

Definition at line 18 of file bcma_regs.h.

#define BCMA_CLKCTLST_EXTRESREQ   0x00000700 /* Mask of external resource requests */

Definition at line 13 of file bcma_regs.h.

#define BCMA_CLKCTLST_EXTRESREQ_SHIFT   8

Definition at line 14 of file bcma_regs.h.

#define BCMA_CLKCTLST_EXTRESST   0x07000000 /* Mask of external resource status */

Definition at line 19 of file bcma_regs.h.

#define BCMA_CLKCTLST_EXTRESST_SHIFT   24

Definition at line 20 of file bcma_regs.h.

#define BCMA_CLKCTLST_FORCEALP   0x00000001 /* Force ALP request */

Definition at line 7 of file bcma_regs.h.

#define BCMA_CLKCTLST_FORCEHT   0x00000002 /* Force HT request */

Definition at line 8 of file bcma_regs.h.

#define BCMA_CLKCTLST_FORCEILP   0x00000004 /* Force ILP request */

Definition at line 9 of file bcma_regs.h.

#define BCMA_CLKCTLST_HAVEALP   0x00010000 /* ALP available */

Definition at line 15 of file bcma_regs.h.

#define BCMA_CLKCTLST_HAVEALPREQ   0x00000008 /* ALP available request */

Definition at line 10 of file bcma_regs.h.

#define BCMA_CLKCTLST_HAVEHT   0x00020000 /* HT available */

Definition at line 16 of file bcma_regs.h.

#define BCMA_CLKCTLST_HAVEHTREQ   0x00000010 /* HT available request */

Definition at line 11 of file bcma_regs.h.

#define BCMA_CLKCTLST_HWCROFF   0x00000020 /* Force HW clock request off */

Definition at line 12 of file bcma_regs.h.

#define BCMA_IOCTL   0x0408 /* IO control */

Definition at line 26 of file bcma_regs.h.

#define BCMA_IOCTL_BIST_EN   0x8000

Definition at line 31 of file bcma_regs.h.

#define BCMA_IOCTL_CLK   0x0001

Definition at line 27 of file bcma_regs.h.

#define BCMA_IOCTL_CORE_BITS   0x3FFC

Definition at line 29 of file bcma_regs.h.

#define BCMA_IOCTL_FGC   0x0002

Definition at line 28 of file bcma_regs.h.

#define BCMA_IOCTL_PME_EN   0x4000

Definition at line 30 of file bcma_regs.h.

#define BCMA_IOST   0x0500 /* IO status */

Definition at line 32 of file bcma_regs.h.

#define BCMA_IOST_BIST_DONE   0x8000

Definition at line 37 of file bcma_regs.h.

#define BCMA_IOST_BIST_ERROR   0x4000

Definition at line 36 of file bcma_regs.h.

#define BCMA_IOST_CORE_BITS   0x0FFF

Definition at line 33 of file bcma_regs.h.

#define BCMA_IOST_DMA64   0x1000

Definition at line 34 of file bcma_regs.h.

#define BCMA_IOST_GATED_CLK   0x2000

Definition at line 35 of file bcma_regs.h.

#define BCMA_PCI_BACKPLANE_IRQS   0x98 /* Backplane Interrupts */

Definition at line 51 of file bcma_regs.h.

#define BCMA_PCI_BAR0_WIN   0x80 /* Backplane address space 0 */

Definition at line 44 of file bcma_regs.h.

#define BCMA_PCI_BAR0_WIN2   0xAC

Definition at line 52 of file bcma_regs.h.

#define BCMA_PCI_BAR1_CONTROL   0x8c /* Address space 1 burst control */

Definition at line 48 of file bcma_regs.h.

#define BCMA_PCI_BAR1_WIN   0x84 /* Backplane address space 1 */

Definition at line 45 of file bcma_regs.h.

#define BCMA_PCI_GPIO_HWRAD   0x20 /* PCI config space GPIO 13 for hw radio disable */

Definition at line 57 of file bcma_regs.h.

#define BCMA_PCI_GPIO_IN   0xB0 /* GPIO Input (pcirev >= 3 only) */

Definition at line 53 of file bcma_regs.h.

#define BCMA_PCI_GPIO_OUT   0xB4 /* GPIO Output (pcirev >= 3 only) */

Definition at line 54 of file bcma_regs.h.

#define BCMA_PCI_GPIO_OUT_ENABLE   0xB8 /* GPIO Output Enable/Disable (pcirev >= 3 only) */

Definition at line 55 of file bcma_regs.h.

#define BCMA_PCI_GPIO_PLL   0x80 /* PCI config space GPIO 15 for PLL powerdown */

Definition at line 59 of file bcma_regs.h.

#define BCMA_PCI_GPIO_SCS   0x10 /* PCI config space bit 4 for 4306c0 slow clock source */

Definition at line 56 of file bcma_regs.h.

#define BCMA_PCI_GPIO_XTAL   0x40 /* PCI config space GPIO 14 for Xtal powerup */

Definition at line 58 of file bcma_regs.h.

#define BCMA_PCI_IRQMASK   0x94 /* PCI IRQ control and mask (pcirev >= 6 only) */

Definition at line 50 of file bcma_regs.h.

#define BCMA_PCI_IRQS   0x90 /* PCI interrupts */

Definition at line 49 of file bcma_regs.h.

#define BCMA_PCI_PE   0x100

Definition at line 43 of file bcma_regs.h.

#define BCMA_PCI_PMCSR   0x44

Definition at line 42 of file bcma_regs.h.

#define BCMA_PCI_SPROMCTL   0x88 /* SPROM control */

Definition at line 46 of file bcma_regs.h.

#define BCMA_PCI_SPROMCTL_WE   0x10 /* SPROM write enable */

Definition at line 47 of file bcma_regs.h.

#define BCMA_RESET_CTL   0x0800

Definition at line 38 of file bcma_regs.h.

#define BCMA_RESET_CTL_RESET   0x0001

Definition at line 39 of file bcma_regs.h.

#define BCMA_SFLASH   0x1c000000

Definition at line 82 of file bcma_regs.h.

#define BCMA_SOC_PCI1_CFG   0x44000000U /* Host Mode sb2pcitranslation1 (64 MB) */

Definition at line 79 of file bcma_regs.h.

#define BCMA_SOC_PCI1_MEM   0x40000000U /* Host Mode sb2pcitranslation0 (64 MB) */

Definition at line 78 of file bcma_regs.h.

#define BCMA_SOC_PCI_CFG   0x0c000000U /* Host Mode sb2pcitranslation1 (64 MB) */

Definition at line 67 of file bcma_regs.h.

#define BCMA_SOC_PCI_DMA   0x40000000U /* Client Mode sb2pcitranslation2 (1 GB) */

Definition at line 72 of file bcma_regs.h.

#define BCMA_SOC_PCI_DMA2   0x80000000U /* Client Mode sb2pcitranslation2 (1 GB) */

Definition at line 73 of file bcma_regs.h.

#define BCMA_SOC_PCI_DMA_SZ   0x40000000U /* Client Mode sb2pcitranslation2 size in bytes */

Definition at line 74 of file bcma_regs.h.

#define BCMA_SOC_PCI_MEM   0x08000000U /* Host Mode sb2pcitranslation0 (64 MB) */

Definition at line 65 of file bcma_regs.h.

#define BCMA_SOC_PCI_MEM_SZ   (64 * 1024 * 1024)

Definition at line 66 of file bcma_regs.h.

#define BCMA_SOC_PCIE1_DMA_H32
Value:
0xc0000000U /* PCIE Client Mode sb2pcitranslation2
* (2 ZettaBytes), high 32 bits
*/

Definition at line 80 of file bcma_regs.h.

#define BCMA_SOC_PCIE_DMA_H32
Value:
0x80000000U /* PCIE Client Mode sb2pcitranslation2
* (2 ZettaBytes), high 32 bits
*/

Definition at line 76 of file bcma_regs.h.

#define BCMA_SOC_PCIE_DMA_L32
Value:
0x00000000U /* PCIE Client Mode sb2pcitranslation2
* (2 ZettaBytes), low 32 bits
*/

Definition at line 75 of file bcma_regs.h.

#define BCMA_SOC_SDRAM_BASE   0x00000000U /* Physical SDRAM */

Definition at line 64 of file bcma_regs.h.

#define BCMA_SOC_SDRAM_R2   0x80000000U /* Region 2 for sdram (512 MB) */

Definition at line 69 of file bcma_regs.h.

#define BCMA_SOC_SDRAM_SWAPPED   0x10000000U /* Byteswapped Physical SDRAM */

Definition at line 68 of file bcma_regs.h.