#include <linux/kernel.h>
#include <linux/mm.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
#include <asm/cache.h>
#include <asm/cputable.h>
#include <asm/emulated_ops.h>
#include <asm/switch_to.h>
Go to the source code of this file.
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| #define | IS_XFORM(inst) (((inst) >> 26) == 31) |
| |
| #define | IS_DSFORM(inst) (((inst) >> 26) >= 56) |
| |
| #define | INVALID { 0, 0 } |
| |
| #define | LD 0 /* load */ |
| |
| #define | ST 1 /* store */ |
| |
| #define | SE 2 /* sign-extend value, or FP ld/st as word */ |
| |
| #define | F 4 /* to/from fp regs */ |
| |
| #define | U 8 /* update index register */ |
| |
| #define | M 0x10 /* multiple load/store */ |
| |
| #define | SW 0x20 /* byte swap */ |
| |
| #define | S 0x40 /* single-precision fp or... */ |
| |
| #define | SX 0x40 /* ... byte count in XER */ |
| |
| #define | HARD 0x80 /* string, stwcx. */ |
| |
| #define | E4 0x40 /* SPE endianness is word */ |
| |
| #define | E8 0x80 /* SPE endianness is double word */ |
| |
| #define | SPLT 0x80 /* VSX SPLAT load */ |
| |
| #define | DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */ |
| |
| #define | SWAP(a, b) (t = (a), (a) = (b), (b) = t) |
| |
| #define | REG_BYTE(rp, i) *((u8 *)(rp) + (i)) |
| |
| #define | SWIZ_PTR(p) ((unsigned char __user *)((p) ^ swiz)) |
| |
| #define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */ |
| #define E4 0x40 /* SPE endianness is word */ |
| #define E8 0x80 /* SPE endianness is double word */ |
| #define HARD 0x80 /* string, stwcx. */ |
| #define IS_DSFORM |
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inst | ) |
(((inst) >> 26) >= 56) |
| #define IS_XFORM |
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inst | ) |
(((inst) >> 26) == 31) |
| #define M 0x10 /* multiple load/store */ |
| #define REG_BYTE |
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rp, |
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| *((u8 *)(rp) + (i)) |
| #define S 0x40 /* single-precision fp or... */ |
| #define SPLT 0x80 /* VSX SPLAT load */ |
| #define SW 0x20 /* byte swap */ |
| #define SWAP |
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a, |
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b |
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| (t = (a), (a) = (b), (b) = t) |
| #define SWIZ_PTR |
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p | ) |
((unsigned char __user *)((p) ^ swiz)) |
| #define SX 0x40 /* ... byte count in XER */ |
1.8.2