Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
be_main.h
Go to the documentation of this file.
1 
20 #ifndef _BEISCSI_MAIN_
21 #define _BEISCSI_MAIN_
22 
23 #include <linux/kernel.h>
24 #include <linux/pci.h>
25 #include <linux/if_ether.h>
26 #include <linux/in.h>
27 #include <linux/ctype.h>
28 #include <linux/module.h>
29 #include <scsi/scsi.h>
30 #include <scsi/scsi_cmnd.h>
31 #include <scsi/scsi_device.h>
32 #include <scsi/scsi_host.h>
33 #include <scsi/iscsi_proto.h>
34 #include <scsi/libiscsi.h>
35 #include <scsi/scsi_transport_iscsi.h>
36 
37 #include "be.h"
38 #define DRV_NAME "be2iscsi"
39 #define BUILD_STR "4.4.58.0"
40 #define BE_NAME "Emulex OneConnect" \
41  "Open-iSCSI Driver version" BUILD_STR
42 #define DRV_DESC BE_NAME " " "Driver"
43 
44 #define BE_VENDOR_ID 0x19A2
45 /* DEVICE ID's for BE2 */
46 #define BE_DEVICE_ID1 0x212
47 #define OC_DEVICE_ID1 0x702
48 #define OC_DEVICE_ID2 0x703
49 
50 /* DEVICE ID's for BE3 */
51 #define BE_DEVICE_ID2 0x222
52 #define OC_DEVICE_ID3 0x712
53 
54 #define BE2_IO_DEPTH 1024
55 #define BE2_MAX_SESSIONS 256
56 #define BE2_CMDS_PER_CXN 128
57 #define BE2_TMFS 16
58 #define BE2_NOPOUT_REQ 16
59 #define BE2_SGE 32
60 #define BE2_DEFPDU_HDR_SZ 64
61 #define BE2_DEFPDU_DATA_SZ 8192
62 
63 #define MAX_CPUS 31
64 #define BEISCSI_SGLIST_ELEMENTS 30
65 
66 #define BEISCSI_CMD_PER_LUN 128 /* scsi_host->cmd_per_lun */
67 #define BEISCSI_MAX_SECTORS 2048 /* scsi_host->max_sectors */
68 
69 #define BEISCSI_MAX_CMD_LEN 16 /* scsi_host->max_cmd_len */
70 #define BEISCSI_NUM_MAX_LUN 256 /* scsi_host->max_lun */
71 #define BEISCSI_NUM_DEVICES_SUPPORTED 0x01
72 #define BEISCSI_MAX_FRAGS_INIT 192
73 #define BE_NUM_MSIX_ENTRIES 1
74 
75 #define MPU_EP_CONTROL 0
76 #define MPU_EP_SEMAPHORE 0xac
77 #define BE2_SOFT_RESET 0x5c
78 #define BE2_PCI_ONLINE0 0xb0
79 #define BE2_PCI_ONLINE1 0xb4
80 #define BE2_SET_RESET 0x80
81 #define BE2_MPU_IRAM_ONLINE 0x00000080
82 
83 #define BE_SENSE_INFO_SIZE 258
84 #define BE_ISCSI_PDU_HEADER_SIZE 64
85 #define BE_MIN_MEM_SIZE 16384
86 #define MAX_CMD_SZ 65536
87 #define IIOC_SCSI_DATA 0x05 /* Write Operation */
88 
89 #define INVALID_SESS_HANDLE 0xFFFFFFFF
90 
91 #define BE_ADAPTER_UP 0x00000000
92 #define BE_ADAPTER_LINK_DOWN 0x00000001
93 
98 #define HWI_GET_ASYNC_PDU_CTX(phwi) (phwi->phwi_ctxt->pasync_ctx)
99 
100 /********* Memory BAR register ************/
101 #define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc
102 
109 #define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */
110 
111 /********* ISR0 Register offset **********/
112 #define CEV_ISR0_OFFSET 0xC18
113 #define CEV_ISR_SIZE 4
114 
120 #define DB_TXULP0_OFFSET 0x40
121 #define DB_RXULP0_OFFSET 0xA0
122 /********* Event Q door bell *************/
123 #define DB_EQ_OFFSET DB_CQ_OFFSET
124 #define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */
125 /* Clear the interrupt for this eq */
126 #define DB_EQ_CLR_SHIFT (9) /* bit 9 */
127 /* Must be 1 */
128 #define DB_EQ_EVNT_SHIFT (10) /* bit 10 */
129 /* Number of event entries processed */
130 #define DB_EQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
131 /* Rearm bit */
132 #define DB_EQ_REARM_SHIFT (29) /* bit 29 */
133 
134 /********* Compl Q door bell *************/
135 #define DB_CQ_OFFSET 0x120
136 #define DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
137 /* Number of event entries processed */
138 #define DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
139 /* Rearm bit */
140 #define DB_CQ_REARM_SHIFT (29) /* bit 29 */
141 
142 #define GET_HWI_CONTROLLER_WS(pc) (pc->phwi_ctrlr)
143 #define HWI_GET_DEF_BUFQ_ID(pc) (((struct hwi_controller *)\
144  (GET_HWI_CONTROLLER_WS(pc)))->default_pdu_data.id)
145 #define HWI_GET_DEF_HDRQ_ID(pc) (((struct hwi_controller *)\
146  (GET_HWI_CONTROLLER_WS(pc)))->default_pdu_hdr.id)
147 
148 #define PAGES_REQUIRED(x) \
149  ((x < PAGE_SIZE) ? 1 : ((x + PAGE_SIZE - 1) / PAGE_SIZE))
150 
151 #define BEISCSI_MSI_NAME 20 /* size of msi_name string */
152 
153 enum be_mem_enum {
154  HWI_MEM_ADDN_CONTEXT,
155  HWI_MEM_WRB,
156  HWI_MEM_WRBH,
157  HWI_MEM_SGLH,
158  HWI_MEM_SGE,
159  HWI_MEM_ASYNC_HEADER_BUF, /* 5 */
160  HWI_MEM_ASYNC_DATA_BUF,
161  HWI_MEM_ASYNC_HEADER_RING,
162  HWI_MEM_ASYNC_DATA_RING,
163  HWI_MEM_ASYNC_HEADER_HANDLE,
164  HWI_MEM_ASYNC_DATA_HANDLE, /* 10 */
165  HWI_MEM_ASYNC_PDU_CONTEXT,
166  ISCSI_MEM_GLOBAL_HEADER,
167  SE_MEM_MAX
168 };
169 
170 struct be_bus_address32 {
171  unsigned int address_lo;
172  unsigned int address_hi;
173 };
174 
175 struct be_bus_address64 {
176  unsigned long long address;
177 };
178 
179 struct be_bus_address {
180  union {
181  struct be_bus_address32 a32;
182  struct be_bus_address64 a64;
183  } u;
184 };
185 
186 struct mem_array {
187  struct be_bus_address bus_address; /* Bus address of location */
188  void *virtual_address; /* virtual address to the location */
189  unsigned int size; /* Size required by memory block */
190 };
191 
192 struct be_mem_descriptor {
193  unsigned int index; /* Index of this memory parameter */
194  unsigned int category; /* type indicates cached/non-cached */
195  unsigned int num_elements; /* number of elements in this
196  * descriptor
197  */
198  unsigned int alignment_mask; /* Alignment mask for this block */
199  unsigned int size_in_bytes; /* Size required by memory block */
200  struct mem_array *mem_array;
201 };
202 
203 struct sgl_handle {
204  unsigned int sgl_index;
205  unsigned int type;
206  unsigned int cid;
207  struct iscsi_task *task;
208  struct iscsi_sge *pfrag;
209 };
210 
211 struct hba_parameters {
212  unsigned int ios_per_ctrl;
213  unsigned int cxns_per_ctrl;
214  unsigned int asyncpdus_per_ctrl;
215  unsigned int icds_per_ctrl;
216  unsigned int num_sge_per_io;
217  unsigned int defpdu_hdr_sz;
218  unsigned int defpdu_data_sz;
219  unsigned int num_cq_entries;
220  unsigned int num_eq_entries;
221  unsigned int wrbs_per_cxn;
222  unsigned int crashmode;
223  unsigned int hba_num;
224 
225  unsigned int mgmt_ws_sz;
226  unsigned int hwi_ws_sz;
227 
228  unsigned int eto;
229  unsigned int ldto;
230 
231  unsigned int dbg_flags;
232  unsigned int num_cxn;
233 
234  unsigned int eq_timer;
239  unsigned int num_mcc_pages;
240  unsigned int num_mcc_cq_pages;
241  unsigned int num_cq_pages;
242  unsigned int num_eq_pages;
243 
244  unsigned int num_async_pdu_buf_pages;
245  unsigned int num_async_pdu_buf_sgl_pages;
246  unsigned int num_async_pdu_buf_cq_pages;
247 
248  unsigned int num_async_pdu_hdr_pages;
249  unsigned int num_async_pdu_hdr_sgl_pages;
250  unsigned int num_async_pdu_hdr_cq_pages;
251 
252  unsigned int num_sge;
253 };
254 
255 struct invalidate_command_table {
256  unsigned short icd;
257  unsigned short cid;
258 } __packed;
259 
260 struct beiscsi_hba {
261  struct hba_parameters params;
262  struct hwi_controller *phwi_ctrlr;
263  unsigned int mem_req[SE_MEM_MAX];
264  /* PCI BAR mapped addresses */
265  u8 __iomem *csr_va; /* CSR */
266  u8 __iomem *db_va; /* Door Bell */
267  u8 __iomem *pci_va; /* PCI Config */
268  struct be_bus_address csr_pa; /* CSR */
269  struct be_bus_address db_pa; /* CSR */
270  struct be_bus_address pci_pa; /* CSR */
271  /* PCI representation of our HBA */
272  struct pci_dev *pcidev;
273  unsigned int state;
274  unsigned short asic_revision;
275  unsigned int num_cpus;
276  unsigned int nxt_cqid;
277  struct msix_entry msix_entries[MAX_CPUS + 1];
278  char *msi_name[MAX_CPUS + 1];
279  bool msix_enabled;
280  struct be_mem_descriptor *init_mem;
281 
282  unsigned short io_sgl_alloc_index;
283  unsigned short io_sgl_free_index;
284  unsigned short io_sgl_hndl_avbl;
285  struct sgl_handle **io_sgl_hndl_base;
286  struct sgl_handle **sgl_hndl_array;
287 
288  unsigned short eh_sgl_alloc_index;
289  unsigned short eh_sgl_free_index;
290  unsigned short eh_sgl_hndl_avbl;
291  struct sgl_handle **eh_sgl_hndl_base;
292  spinlock_t io_sgl_lock;
293  spinlock_t mgmt_sgl_lock;
294  spinlock_t isr_lock;
295  unsigned int age;
296  unsigned short avlbl_cids;
297  unsigned short cid_alloc;
298  unsigned short cid_free;
299  struct beiscsi_conn *conn_table[BE2_MAX_SESSIONS * 2];
300  struct list_head hba_queue;
301  unsigned short *cid_array;
302  struct iscsi_endpoint **ep_array;
303  struct iscsi_boot_kset *boot_kset;
304  struct Scsi_Host *shost;
305  struct iscsi_iface *ipv4_iface;
306  struct iscsi_iface *ipv6_iface;
307  struct {
312  unsigned int iscsi_cid_start;
313  unsigned int phys_port;
314 
315  unsigned int isr_offset;
316  unsigned int iscsi_icd_start;
317  unsigned int iscsi_cid_count;
318  unsigned int iscsi_icd_count;
319  unsigned int pci_function;
320 
321  unsigned short cid_alloc;
322  unsigned short cid_free;
323  unsigned short avlbl_cids;
324  unsigned short iscsi_features;
325  spinlock_t cid_lock;
326  } fw_config;
327 
328  u8 mac_address[ETH_ALEN];
329  unsigned short todo_cq;
330  unsigned short todo_mcc_cq;
331  char wq_name[20];
332  struct workqueue_struct *wq; /* The actuak work queue */
333  struct work_struct work_cqs; /* The work being queued */
334  struct be_ctrl_info ctrl;
335  unsigned int generation;
336  unsigned int interface_handle;
337  struct mgmt_session_info boot_sess;
338  struct invalidate_command_table inv_tbl[128];
339 
340  unsigned int attr_log_enable;
341 
342 };
343 
344 struct beiscsi_session {
345  struct pci_pool *bhs_pool;
346 };
347 
351 struct beiscsi_conn {
352  struct iscsi_conn *conn;
353  struct beiscsi_hba *phba;
354  u32 exp_statsn;
355  u32 beiscsi_conn_cid;
356  struct beiscsi_endpoint *ep;
357  unsigned short login_in_progress;
358  struct wrb_handle *plogin_wrb_handle;
359  struct sgl_handle *plogin_sgl_handle;
360  struct beiscsi_session *beiscsi_sess;
361  struct iscsi_task *task;
362 };
363 
364 /* This structure is used by the chip */
365 struct pdu_data_out {
366  u32 dw[12];
367 };
372 struct amap_pdu_data_out {
373  u8 opcode[6]; /* opcode */
374  u8 rsvd0[2]; /* should be 0 */
375  u8 rsvd1[7];
376  u8 final_bit; /* F bit */
377  u8 rsvd2[16];
378  u8 ahs_length[8]; /* no AHS */
379  u8 data_len_hi[8];
380  u8 data_len_lo[16]; /* DataSegmentLength */
381  u8 lun[64];
382  u8 itt[32]; /* ITT; initiator task tag */
383  u8 ttt[32]; /* TTT; valid for R2T or 0xffffffff */
384  u8 rsvd3[32];
385  u8 exp_stat_sn[32];
386  u8 rsvd4[32];
387  u8 data_sn[32];
388  u8 buffer_offset[32];
389  u8 rsvd5[32];
390 };
391 
392 struct be_cmd_bhs {
393  struct iscsi_scsi_req iscsi_hdr;
394  unsigned char pad1[16];
395  struct pdu_data_out iscsi_data_pdu;
396  unsigned char pad2[BE_SENSE_INFO_SIZE -
397  sizeof(struct pdu_data_out)];
398 };
399 
400 struct beiscsi_io_task {
401  struct wrb_handle *pwrb_handle;
402  struct sgl_handle *psgl_handle;
403  struct beiscsi_conn *conn;
404  struct scsi_cmnd *scsi_cmnd;
405  unsigned int cmd_sn;
406  unsigned int flags;
407  unsigned short cid;
408  unsigned short header_len;
409  itt_t libiscsi_itt;
410  struct be_cmd_bhs *cmd_bhs;
411  struct be_bus_address bhs_pa;
412  unsigned short bhs_len;
413 };
414 
415 struct be_nonio_bhs {
416  struct iscsi_hdr iscsi_hdr;
417  unsigned char pad1[16];
418  struct pdu_data_out iscsi_data_pdu;
419  unsigned char pad2[BE_SENSE_INFO_SIZE -
420  sizeof(struct pdu_data_out)];
421 };
422 
423 struct be_status_bhs {
424  struct iscsi_scsi_req iscsi_hdr;
425  unsigned char pad1[16];
430  unsigned char sense_info[BE_SENSE_INFO_SIZE];
431 };
432 
433 struct iscsi_sge {
434  u32 dw[4];
435 };
436 
441 struct amap_iscsi_sge {
442  u8 addr_hi[32];
443  u8 addr_lo[32];
444  u8 sge_offset[22]; /* DWORD 2 */
445  u8 rsvd0[9]; /* DWORD 2 */
446  u8 last_sge; /* DWORD 2 */
447  u8 len[17]; /* DWORD 3 */
448  u8 rsvd1[15]; /* DWORD 3 */
449 };
450 
451 struct beiscsi_offload_params {
452  u32 dw[5];
453 };
454 
455 #define OFFLD_PARAMS_ERL 0x00000003
456 #define OFFLD_PARAMS_DDE 0x00000004
457 #define OFFLD_PARAMS_HDE 0x00000008
458 #define OFFLD_PARAMS_IR2T 0x00000010
459 #define OFFLD_PARAMS_IMD 0x00000020
460 
465 struct amap_beiscsi_offload_params {
466  u8 max_burst_length[32];
467  u8 max_send_data_segment_length[32];
468  u8 first_burst_length[32];
469  u8 erl[2];
470  u8 dde[1];
471  u8 hde[1];
472  u8 ir2t[1];
473  u8 imd[1];
474  u8 pad[26];
475  u8 exp_statsn[32];
476 };
477 
478 /* void hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
479  struct beiscsi_hba *phba, struct sol_cqe *psol);*/
480 
481 struct async_pdu_handle {
482  struct list_head link;
483  struct be_bus_address pa;
484  void *pbuffer;
485  unsigned int consumed;
486  unsigned char index;
487  unsigned char is_header;
488  unsigned short cri;
489  unsigned long buffer_len;
490 };
491 
492 struct hwi_async_entry {
493  struct {
494  unsigned char hdr_received;
495  unsigned char hdr_len;
496  unsigned short bytes_received;
497  unsigned int bytes_needed;
498  struct list_head list;
499  } wait_queue;
500 
501  struct list_head header_busy_list;
502  struct list_head data_busy_list;
503 };
504 
505 struct hwi_async_pdu_context {
506  struct {
507  struct be_bus_address pa_base;
508  void *va_base;
509  void *ring_base;
510  struct async_pdu_handle *handle_base;
511 
512  unsigned int host_write_ptr;
513  unsigned int ep_read_ptr;
514  unsigned int writables;
515 
516  unsigned int free_entries;
517  unsigned int busy_entries;
518 
519  struct list_head free_list;
520  } async_header;
521 
522  struct {
523  struct be_bus_address pa_base;
524  void *va_base;
525  void *ring_base;
526  struct async_pdu_handle *handle_base;
527 
528  unsigned int host_write_ptr;
529  unsigned int ep_read_ptr;
530  unsigned int writables;
531 
532  unsigned int free_entries;
533  unsigned int busy_entries;
534  struct list_head free_list;
535  } async_data;
536 
537  unsigned int buffer_size;
538  unsigned int num_entries;
539 
544  struct hwi_async_entry async_entry[BE2_MAX_SESSIONS * 2];
545 };
546 
547 #define PDUCQE_CODE_MASK 0x0000003F
548 #define PDUCQE_DPL_MASK 0xFFFF0000
549 #define PDUCQE_INDEX_MASK 0x0000FFFF
550 
551 struct i_t_dpdu_cqe {
552  u32 dw[4];
553 } __packed;
554 
559 struct amap_i_t_dpdu_cqe {
560  u8 db_addr_hi[32];
561  u8 db_addr_lo[32];
562  u8 code[6];
563  u8 cid[10];
564  u8 dpl[16];
565  u8 index[16];
566  u8 num_cons[10];
567  u8 rsvd0[4];
568  u8 final;
569  u8 valid;
570 } __packed;
571 
572 #define CQE_VALID_MASK 0x80000000
573 #define CQE_CODE_MASK 0x0000003F
574 #define CQE_CID_MASK 0x0000FFC0
575 
576 #define EQE_VALID_MASK 0x00000001
577 #define EQE_MAJORCODE_MASK 0x0000000E
578 #define EQE_RESID_MASK 0xFFFF0000
579 
580 struct be_eq_entry {
581  u32 dw[1];
582 } __packed;
583 
588 struct amap_eq_entry {
589  u8 valid; /* DWORD 0 */
590  u8 major_code[3]; /* DWORD 0 */
591  u8 minor_code[12]; /* DWORD 0 */
592  u8 resource_id[16]; /* DWORD 0 */
593 
594 } __packed;
595 
596 struct cq_db {
597  u32 dw[1];
598 } __packed;
599 
604 struct amap_cq_db {
605  u8 qid[10];
606  u8 event[1];
607  u8 rsvd0[5];
608  u8 num_popped[13];
609  u8 rearm[1];
610  u8 rsvd1[2];
611 } __packed;
612 
613 void beiscsi_process_eq(struct beiscsi_hba *phba);
614 
615 struct iscsi_wrb {
616  u32 dw[16];
617 } __packed;
618 
619 #define WRB_TYPE_MASK 0xF0000000
620 
625 struct amap_iscsi_wrb {
626  u8 lun[14]; /* DWORD 0 */
627  u8 lt; /* DWORD 0 */
628  u8 invld; /* DWORD 0 */
629  u8 wrb_idx[8]; /* DWORD 0 */
630  u8 dsp; /* DWORD 0 */
631  u8 dmsg; /* DWORD 0 */
632  u8 undr_run; /* DWORD 0 */
633  u8 over_run; /* DWORD 0 */
634  u8 type[4]; /* DWORD 0 */
635  u8 ptr2nextwrb[8]; /* DWORD 1 */
636  u8 r2t_exp_dtl[24]; /* DWORD 1 */
637  u8 sgl_icd_idx[12]; /* DWORD 2 */
638  u8 rsvd0[20]; /* DWORD 2 */
639  u8 exp_data_sn[32]; /* DWORD 3 */
640  u8 iscsi_bhs_addr_hi[32]; /* DWORD 4 */
641  u8 iscsi_bhs_addr_lo[32]; /* DWORD 5 */
642  u8 cmdsn_itt[32]; /* DWORD 6 */
643  u8 dif_ref_tag[32]; /* DWORD 7 */
644  u8 sge0_addr_hi[32]; /* DWORD 8 */
645  u8 sge0_addr_lo[32]; /* DWORD 9 */
646  u8 sge0_offset[22]; /* DWORD 10 */
647  u8 pbs; /* DWORD 10 */
648  u8 dif_mode[2]; /* DWORD 10 */
649  u8 rsvd1[6]; /* DWORD 10 */
650  u8 sge0_last; /* DWORD 10 */
651  u8 sge0_len[17]; /* DWORD 11 */
652  u8 dif_meta_tag[14]; /* DWORD 11 */
653  u8 sge0_in_ddr; /* DWORD 11 */
654  u8 sge1_addr_hi[32]; /* DWORD 12 */
655  u8 sge1_addr_lo[32]; /* DWORD 13 */
656  u8 sge1_r2t_offset[22]; /* DWORD 14 */
657  u8 rsvd2[9]; /* DWORD 14 */
658  u8 sge1_last; /* DWORD 14 */
659  u8 sge1_len[17]; /* DWORD 15 */
660  u8 ref_sgl_icd_idx[12]; /* DWORD 15 */
661  u8 rsvd3[2]; /* DWORD 15 */
662  u8 sge1_in_ddr; /* DWORD 15 */
663 
664 } __packed;
665 
666 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid);
667 void
668 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle);
669 
670 void beiscsi_process_all_cqs(struct work_struct *work);
671 
672 struct pdu_nop_out {
673  u32 dw[12];
674 };
675 
680 struct amap_pdu_nop_out {
681  u8 opcode[6]; /* opcode 0x00 */
682  u8 i_bit; /* I Bit */
683  u8 x_bit; /* reserved; should be 0 */
684  u8 fp_bit_filler1[7];
685  u8 f_bit; /* always 1 */
686  u8 reserved1[16];
687  u8 ahs_length[8]; /* no AHS */
688  u8 data_len_hi[8];
689  u8 data_len_lo[16]; /* DataSegmentLength */
690  u8 lun[64];
691  u8 itt[32]; /* initiator id for ping or 0xffffffff */
692  u8 ttt[32]; /* target id for ping or 0xffffffff */
693  u8 cmd_sn[32];
694  u8 exp_stat_sn[32];
695  u8 reserved5[128];
696 };
697 
698 #define PDUBASE_OPCODE_MASK 0x0000003F
699 #define PDUBASE_DATALENHI_MASK 0x0000FF00
700 #define PDUBASE_DATALENLO_MASK 0xFFFF0000
701 
702 struct pdu_base {
703  u32 dw[16];
704 } __packed;
705 
710 struct amap_pdu_base {
711  u8 opcode[6];
712  u8 i_bit; /* immediate bit */
713  u8 x_bit; /* reserved, always 0 */
714  u8 reserved1[24]; /* opcode-specific fields */
715  u8 ahs_length[8]; /* length units is 4 byte words */
716  u8 data_len_hi[8];
717  u8 data_len_lo[16]; /* DatasegmentLength */
718  u8 lun[64]; /* lun or opcode-specific fields */
719  u8 itt[32]; /* initiator task tag */
720  u8 reserved4[224];
721 };
722 
723 struct iscsi_target_context_update_wrb {
724  u32 dw[16];
725 } __packed;
726 
731 struct amap_iscsi_target_context_update_wrb {
732  u8 lun[14]; /* DWORD 0 */
733  u8 lt; /* DWORD 0 */
734  u8 invld; /* DWORD 0 */
735  u8 wrb_idx[8]; /* DWORD 0 */
736  u8 dsp; /* DWORD 0 */
737  u8 dmsg; /* DWORD 0 */
738  u8 undr_run; /* DWORD 0 */
739  u8 over_run; /* DWORD 0 */
740  u8 type[4]; /* DWORD 0 */
741  u8 ptr2nextwrb[8]; /* DWORD 1 */
742  u8 max_burst_length[19]; /* DWORD 1 */
743  u8 rsvd0[5]; /* DWORD 1 */
744  u8 rsvd1[15]; /* DWORD 2 */
745  u8 max_send_data_segment_length[17]; /* DWORD 2 */
746  u8 first_burst_length[14]; /* DWORD 3 */
747  u8 rsvd2[2]; /* DWORD 3 */
748  u8 tx_wrbindex_drv_msg[8]; /* DWORD 3 */
749  u8 rsvd3[5]; /* DWORD 3 */
750  u8 session_state[3]; /* DWORD 3 */
751  u8 rsvd4[16]; /* DWORD 4 */
752  u8 tx_jumbo; /* DWORD 4 */
753  u8 hde; /* DWORD 4 */
754  u8 dde; /* DWORD 4 */
755  u8 erl[2]; /* DWORD 4 */
756  u8 domain_id[5]; /* DWORD 4 */
757  u8 mode; /* DWORD 4 */
758  u8 imd; /* DWORD 4 */
759  u8 ir2t; /* DWORD 4 */
760  u8 notpredblq[2]; /* DWORD 4 */
761  u8 compltonack; /* DWORD 4 */
762  u8 stat_sn[32]; /* DWORD 5 */
763  u8 pad_buffer_addr_hi[32]; /* DWORD 6 */
764  u8 pad_buffer_addr_lo[32]; /* DWORD 7 */
765  u8 pad_addr_hi[32]; /* DWORD 8 */
766  u8 pad_addr_lo[32]; /* DWORD 9 */
767  u8 rsvd5[32]; /* DWORD 10 */
768  u8 rsvd6[32]; /* DWORD 11 */
769  u8 rsvd7[32]; /* DWORD 12 */
770  u8 rsvd8[32]; /* DWORD 13 */
771  u8 rsvd9[32]; /* DWORD 14 */
772  u8 rsvd10[32]; /* DWORD 15 */
773 
774 } __packed;
775 
776 struct be_ring {
777  u32 pages; /* queue size in pages */
778  u32 id; /* queue id assigned by beklib */
779  u32 num; /* number of elements in queue */
780  u32 cidx; /* consumer index */
781  u32 pidx; /* producer index -- not used by most rings */
782  u32 item_size; /* size in bytes of one object */
783 
784  void *va; /* The virtual address of the ring. This
785  * should be last to allow 32 & 64 bit debugger
786  * extensions to work.
787  */
788 };
789 
790 struct hwi_wrb_context {
791  struct list_head wrb_handle_list;
792  struct list_head wrb_handle_drvr_list;
793  struct wrb_handle **pwrb_handle_base;
794  struct wrb_handle **pwrb_handle_basestd;
795  struct iscsi_wrb *plast_wrb;
796  unsigned short alloc_index;
797  unsigned short free_index;
798  unsigned short wrb_handles_available;
799  unsigned short cid;
800 };
801 
802 struct hwi_controller {
803  struct list_head io_sgl_list;
804  struct list_head eh_sgl_list;
805  struct sgl_handle *psgl_handle_base;
806  unsigned int wrb_mem_index;
807 
808  struct hwi_wrb_context wrb_context[BE2_MAX_SESSIONS * 2];
809  struct mcc_wrb *pmcc_wrb_base;
810  struct be_ring default_pdu_hdr;
811  struct be_ring default_pdu_data;
812  struct hwi_context_memory *phwi_ctxt;
813 };
814 
815 enum hwh_type_enum {
816  HWH_TYPE_IO = 1,
817  HWH_TYPE_LOGOUT = 2,
818  HWH_TYPE_TMF = 3,
819  HWH_TYPE_NOP = 4,
820  HWH_TYPE_IO_RD = 5,
821  HWH_TYPE_LOGIN = 11,
822  HWH_TYPE_INVALID = 0xFFFFFFFF
823 };
824 
825 struct wrb_handle {
826  enum hwh_type_enum type;
827  unsigned short wrb_index;
828  unsigned short nxt_wrb_index;
829 
830  struct iscsi_task *pio_handle;
831  struct iscsi_wrb *pwrb;
832 };
833 
834 struct hwi_context_memory {
835  /* Adaptive interrupt coalescing (AIC) info */
836  u16 min_eqd; /* in usecs */
837  u16 max_eqd; /* in usecs */
838  u16 cur_eqd; /* in usecs */
839  struct be_eq_obj be_eq[MAX_CPUS];
840  struct be_queue_info be_cq[MAX_CPUS];
841 
842  struct be_queue_info be_def_hdrq;
843  struct be_queue_info be_def_dataq;
844 
845  struct be_queue_info be_wrbq[BE2_MAX_SESSIONS];
846  struct be_mcc_wrb_context *pbe_mcc_context;
847 
848  struct hwi_async_pdu_context *pasync_ctx;
849 };
850 
851 /* Logging related definitions */
852 #define BEISCSI_LOG_INIT 0x0001 /* Initialization events */
853 #define BEISCSI_LOG_MBOX 0x0002 /* Mailbox Events */
854 #define BEISCSI_LOG_MISC 0x0004 /* Miscllaneous Events */
855 #define BEISCSI_LOG_EH 0x0008 /* Error Handler */
856 #define BEISCSI_LOG_IO 0x0010 /* IO Code Path */
857 #define BEISCSI_LOG_CONFIG 0x0020 /* CONFIG Code Path */
858 
859 #define beiscsi_log(phba, level, mask, fmt, arg...) \
860 do { \
861  uint32_t log_value = phba->attr_log_enable; \
862  if (((mask) & log_value) || (level[1] <= '3')) \
863  shost_printk(level, phba->shost, \
864  fmt, __LINE__, ##arg); \
865 } while (0)
866 
867 #endif
Generated on Thu Jan 10 2013 14:19:35 for Linux Kernel by   doxygen 1.8.2