Linux Kernel
3.7.1
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#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/if_ether.h>
#include <linux/in.h>
#include <linux/ctype.h>
#include <linux/module.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#include <scsi/iscsi_proto.h>
#include <scsi/libiscsi.h>
#include <scsi/scsi_transport_iscsi.h>
#include "be.h"
Go to the source code of this file.
Data Structures | |
struct | be_bus_address32 |
struct | be_bus_address64 |
struct | be_bus_address |
struct | mem_array |
struct | be_mem_descriptor |
struct | sgl_handle |
struct | hba_parameters |
struct | invalidate_command_table |
struct | beiscsi_hba |
struct | beiscsi_session |
struct | beiscsi_conn |
struct | pdu_data_out |
struct | amap_pdu_data_out |
struct | be_cmd_bhs |
struct | beiscsi_io_task |
struct | be_nonio_bhs |
struct | be_status_bhs |
struct | iscsi_sge |
struct | amap_iscsi_sge |
struct | beiscsi_offload_params |
struct | amap_beiscsi_offload_params |
struct | async_pdu_handle |
struct | hwi_async_entry |
struct | hwi_async_pdu_context |
struct | i_t_dpdu_cqe |
struct | amap_i_t_dpdu_cqe |
struct | be_eq_entry |
struct | amap_eq_entry |
struct | cq_db |
struct | amap_cq_db |
struct | iscsi_wrb |
struct | amap_iscsi_wrb |
struct | pdu_nop_out |
struct | amap_pdu_nop_out |
struct | pdu_base |
struct | amap_pdu_base |
struct | iscsi_target_context_update_wrb |
struct | amap_iscsi_target_context_update_wrb |
struct | be_ring |
struct | hwi_wrb_context |
struct | hwi_controller |
struct | wrb_handle |
struct | hwi_context_memory |
Macros | |
#define | DRV_NAME "be2iscsi" |
#define | BUILD_STR "4.4.58.0" |
#define | BE_NAME |
#define | DRV_DESC BE_NAME " " "Driver" |
#define | BE_VENDOR_ID 0x19A2 |
#define | BE_DEVICE_ID1 0x212 |
#define | OC_DEVICE_ID1 0x702 |
#define | OC_DEVICE_ID2 0x703 |
#define | BE_DEVICE_ID2 0x222 |
#define | OC_DEVICE_ID3 0x712 |
#define | BE2_IO_DEPTH 1024 |
#define | BE2_MAX_SESSIONS 256 |
#define | BE2_CMDS_PER_CXN 128 |
#define | BE2_TMFS 16 |
#define | BE2_NOPOUT_REQ 16 |
#define | BE2_SGE 32 |
#define | BE2_DEFPDU_HDR_SZ 64 |
#define | BE2_DEFPDU_DATA_SZ 8192 |
#define | MAX_CPUS 31 |
#define | BEISCSI_SGLIST_ELEMENTS 30 |
#define | BEISCSI_CMD_PER_LUN 128 /* scsi_host->cmd_per_lun */ |
#define | BEISCSI_MAX_SECTORS 2048 /* scsi_host->max_sectors */ |
#define | BEISCSI_MAX_CMD_LEN 16 /* scsi_host->max_cmd_len */ |
#define | BEISCSI_NUM_MAX_LUN 256 /* scsi_host->max_lun */ |
#define | BEISCSI_NUM_DEVICES_SUPPORTED 0x01 |
#define | BEISCSI_MAX_FRAGS_INIT 192 |
#define | BE_NUM_MSIX_ENTRIES 1 |
#define | MPU_EP_CONTROL 0 |
#define | MPU_EP_SEMAPHORE 0xac |
#define | BE2_SOFT_RESET 0x5c |
#define | BE2_PCI_ONLINE0 0xb0 |
#define | BE2_PCI_ONLINE1 0xb4 |
#define | BE2_SET_RESET 0x80 |
#define | BE2_MPU_IRAM_ONLINE 0x00000080 |
#define | BE_SENSE_INFO_SIZE 258 |
#define | BE_ISCSI_PDU_HEADER_SIZE 64 |
#define | BE_MIN_MEM_SIZE 16384 |
#define | MAX_CMD_SZ 65536 |
#define | IIOC_SCSI_DATA 0x05 /* Write Operation */ |
#define | INVALID_SESS_HANDLE 0xFFFFFFFF |
#define | BE_ADAPTER_UP 0x00000000 |
#define | BE_ADAPTER_LINK_DOWN 0x00000001 |
#define | HWI_GET_ASYNC_PDU_CTX(phwi) (phwi->phwi_ctxt->pasync_ctx) |
#define | PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc |
#define | MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */ |
#define | CEV_ISR0_OFFSET 0xC18 |
#define | CEV_ISR_SIZE 4 |
#define | DB_TXULP0_OFFSET 0x40 |
#define | DB_RXULP0_OFFSET 0xA0 |
#define | DB_EQ_OFFSET DB_CQ_OFFSET |
#define | DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */ |
#define | DB_EQ_CLR_SHIFT (9) /* bit 9 */ |
#define | DB_EQ_EVNT_SHIFT (10) /* bit 10 */ |
#define | DB_EQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */ |
#define | DB_EQ_REARM_SHIFT (29) /* bit 29 */ |
#define | DB_CQ_OFFSET 0x120 |
#define | DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */ |
#define | DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */ |
#define | DB_CQ_REARM_SHIFT (29) /* bit 29 */ |
#define | GET_HWI_CONTROLLER_WS(pc) (pc->phwi_ctrlr) |
#define | HWI_GET_DEF_BUFQ_ID(pc) |
#define | HWI_GET_DEF_HDRQ_ID(pc) |
#define | PAGES_REQUIRED(x) ((x < PAGE_SIZE) ? 1 : ((x + PAGE_SIZE - 1) / PAGE_SIZE)) |
#define | BEISCSI_MSI_NAME 20 /* size of msi_name string */ |
#define | OFFLD_PARAMS_ERL 0x00000003 |
#define | OFFLD_PARAMS_DDE 0x00000004 |
#define | OFFLD_PARAMS_HDE 0x00000008 |
#define | OFFLD_PARAMS_IR2T 0x00000010 |
#define | OFFLD_PARAMS_IMD 0x00000020 |
#define | PDUCQE_CODE_MASK 0x0000003F |
#define | PDUCQE_DPL_MASK 0xFFFF0000 |
#define | PDUCQE_INDEX_MASK 0x0000FFFF |
#define | CQE_VALID_MASK 0x80000000 |
#define | CQE_CODE_MASK 0x0000003F |
#define | CQE_CID_MASK 0x0000FFC0 |
#define | EQE_VALID_MASK 0x00000001 |
#define | EQE_MAJORCODE_MASK 0x0000000E |
#define | EQE_RESID_MASK 0xFFFF0000 |
#define | WRB_TYPE_MASK 0xF0000000 |
#define | PDUBASE_OPCODE_MASK 0x0000003F |
#define | PDUBASE_DATALENHI_MASK 0x0000FF00 |
#define | PDUBASE_DATALENLO_MASK 0xFFFF0000 |
#define | BEISCSI_LOG_INIT 0x0001 /* Initialization events */ |
#define | BEISCSI_LOG_MBOX 0x0002 /* Mailbox Events */ |
#define | BEISCSI_LOG_MISC 0x0004 /* Miscllaneous Events */ |
#define | BEISCSI_LOG_EH 0x0008 /* Error Handler */ |
#define | BEISCSI_LOG_IO 0x0010 /* IO Code Path */ |
#define | BEISCSI_LOG_CONFIG 0x0020 /* CONFIG Code Path */ |
#define | beiscsi_log(phba, level, mask, fmt, arg...) |
Enumerations | |
enum | be_mem_enum { HWI_MEM_ADDN_CONTEXT, HWI_MEM_WRB, HWI_MEM_WRBH, HWI_MEM_SGLH, HWI_MEM_SGE, HWI_MEM_ASYNC_HEADER_BUF, HWI_MEM_ASYNC_DATA_BUF, HWI_MEM_ASYNC_HEADER_RING, HWI_MEM_ASYNC_DATA_RING, HWI_MEM_ASYNC_HEADER_HANDLE, HWI_MEM_ASYNC_DATA_HANDLE, HWI_MEM_ASYNC_PDU_CONTEXT, ISCSI_MEM_GLOBAL_HEADER, SE_MEM_MAX } |
enum | hwh_type_enum { HWH_TYPE_IO = 1, HWH_TYPE_LOGOUT = 2, HWH_TYPE_TMF = 3, HWH_TYPE_NOP = 4, HWH_TYPE_IO_RD = 5, HWH_TYPE_LOGIN = 11, HWH_TYPE_INVALID = 0xFFFFFFFF } |
Functions | |
void | beiscsi_process_eq (struct beiscsi_hba *phba) |
struct wrb_handle * | alloc_wrb_handle (struct beiscsi_hba *phba, unsigned int cid) |
void | free_mgmt_sgl_handle (struct beiscsi_hba *phba, struct sgl_handle *psgl_handle) |
void | beiscsi_process_all_cqs (struct work_struct *work) |
Variables | |
struct invalidate_command_table | __packed |
#define BE_NAME |
#define BEISCSI_CMD_PER_LUN 128 /* scsi_host->cmd_per_lun */ |
#define BEISCSI_LOG_INIT 0x0001 /* Initialization events */ |
#define BEISCSI_MAX_CMD_LEN 16 /* scsi_host->max_cmd_len */ |
#define BEISCSI_MAX_SECTORS 2048 /* scsi_host->max_sectors */ |
#define DB_EQ_OFFSET DB_CQ_OFFSET |
#define DB_TXULP0_OFFSET 0x40 |
#define DRV_NAME "be2iscsi" |
Copyright (C) 2005 - 2011 Emulex All rights reserved.
This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License version 2 as published by the Free Software Foundation. The full GNU General Public License is included in this distribution in the file called COPYING.
Written by: Jayamohan Kallickal (jayam) ohan .kall icka l@emu lex. com
Contact Information: linux -dri vers@ emul ex.co m
Emulex 3333 Susan Street Costa Mesa, CA 92626
#define HWI_GET_ASYNC_PDU_CTX | ( | phwi | ) | (phwi->phwi_ctxt->pasync_ctx) |
#define HWI_GET_DEF_BUFQ_ID | ( | pc | ) |
#define HWI_GET_DEF_HDRQ_ID | ( | pc | ) |
#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */ |
Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt Disable" may still globally block interrupts in addition to individual interrupt masks; a mechanism for the device driver to block all interrupts atomically without having to arbitrate for the PCI Interrupt Disable bit with the OS.
enum be_mem_enum |
enum hwh_type_enum |
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read |
void beiscsi_process_all_cqs | ( | struct work_struct * | work | ) |
void beiscsi_process_eq | ( | struct beiscsi_hba * | phba | ) |
void free_mgmt_sgl_handle | ( | struct beiscsi_hba * | phba, |
struct sgl_handle * | psgl_handle | ||
) |