#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/completion.h>
#include <linux/irq.h>
#include <linux/jiffies.h>
#include <linux/bitops.h>
#include <linux/fs.h>
#include <linux/platform_device.h>
#include <linux/uaccess.h>
#include <linux/mfd/core.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/regulator/db8500-prcmu.h>
#include <linux/regulator/machine.h>
#include <asm/hardware/gic.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/db8500-regs.h>
#include <mach/id.h>
#include "dbx500-prcmu-regs.h"

Data Structures
struct	clk_mgt

struct	dsiclk

struct	dsiescclk

Macros
#define	PRCMU_FW_VERSION_OFFSET 0xA4

#define	PRCM_AVS_BASE 0x2FC

#define	PRCM_AVS_VBB_RET (PRCM_AVS_BASE + 0x0)

#define	PRCM_AVS_VBB_MAX_OPP (PRCM_AVS_BASE + 0x1)

#define	PRCM_AVS_VBB_100_OPP (PRCM_AVS_BASE + 0x2)

#define	PRCM_AVS_VBB_50_OPP (PRCM_AVS_BASE + 0x3)

#define	PRCM_AVS_VARM_MAX_OPP (PRCM_AVS_BASE + 0x4)

#define	PRCM_AVS_VARM_100_OPP (PRCM_AVS_BASE + 0x5)

#define	PRCM_AVS_VARM_50_OPP (PRCM_AVS_BASE + 0x6)

#define	PRCM_AVS_VARM_RET (PRCM_AVS_BASE + 0x7)

#define	PRCM_AVS_VAPE_100_OPP (PRCM_AVS_BASE + 0x8)

#define	PRCM_AVS_VAPE_50_OPP (PRCM_AVS_BASE + 0x9)

#define	PRCM_AVS_VMOD_100_OPP (PRCM_AVS_BASE + 0xA)

#define	PRCM_AVS_VMOD_50_OPP (PRCM_AVS_BASE + 0xB)

#define	PRCM_AVS_VSAFE (PRCM_AVS_BASE + 0xC)

#define	PRCM_AVS_VOLTAGE 0

#define	PRCM_AVS_VOLTAGE_MASK 0x3f

#define	PRCM_AVS_ISSLOWSTARTUP 6

#define	PRCM_AVS_ISSLOWSTARTUP_MASK (1 << PRCM_AVS_ISSLOWSTARTUP)

#define	PRCM_AVS_ISMODEENABLE 7

#define	PRCM_AVS_ISMODEENABLE_MASK (1 << PRCM_AVS_ISMODEENABLE)

#define	PRCM_BOOT_STATUS 0xFFF

#define	PRCM_ROMCODE_A2P 0xFFE

#define	PRCM_ROMCODE_P2A 0xFFD

#define	PRCM_XP70_CUR_PWR_STATE 0xFFC /* 4 BYTES */

#define	PRCM_SW_RST_REASON 0xFF8 /* 2 bytes */

#define	_PRCM_MBOX_HEADER 0xFE8 /* 16 bytes */

#define	PRCM_MBOX_HEADER_REQ_MB0 (_PRCM_MBOX_HEADER + 0x0)

#define	PRCM_MBOX_HEADER_REQ_MB1 (_PRCM_MBOX_HEADER + 0x1)

#define	PRCM_MBOX_HEADER_REQ_MB2 (_PRCM_MBOX_HEADER + 0x2)

#define	PRCM_MBOX_HEADER_REQ_MB3 (_PRCM_MBOX_HEADER + 0x3)

#define	PRCM_MBOX_HEADER_REQ_MB4 (_PRCM_MBOX_HEADER + 0x4)

#define	PRCM_MBOX_HEADER_REQ_MB5 (_PRCM_MBOX_HEADER + 0x5)

#define	PRCM_MBOX_HEADER_ACK_MB0 (_PRCM_MBOX_HEADER + 0x8)

#define	PRCM_REQ_MB0 0xFDC /* 12 bytes */

#define	PRCM_REQ_MB1 0xFD0 /* 12 bytes */

#define	PRCM_REQ_MB2 0xFC0 /* 16 bytes */

#define	PRCM_REQ_MB3 0xE4C /* 372 bytes */

#define	PRCM_REQ_MB4 0xE48 /* 4 bytes */

#define	PRCM_REQ_MB5 0xE44 /* 4 bytes */

#define	PRCM_ACK_MB0 0xE08 /* 52 bytes */

#define	PRCM_ACK_MB1 0xE04 /* 4 bytes */

#define	PRCM_ACK_MB2 0xE00 /* 4 bytes */

#define	PRCM_ACK_MB3 0xDFC /* 4 bytes */

#define	PRCM_ACK_MB4 0xDF8 /* 4 bytes */

#define	PRCM_ACK_MB5 0xDF4 /* 4 bytes */

#define	MB0H_POWER_STATE_TRANS 0

#define	MB0H_CONFIG_WAKEUPS_EXE 1

#define	MB0H_READ_WAKEUP_ACK 3

#define	MB0H_CONFIG_WAKEUPS_SLEEP 4

#define	MB0H_WAKEUP_EXE 2

#define	MB0H_WAKEUP_SLEEP 5

#define	PRCM_REQ_MB0_AP_POWER_STATE (PRCM_REQ_MB0 + 0x0)

#define	PRCM_REQ_MB0_AP_PLL_STATE (PRCM_REQ_MB0 + 0x1)

#define	PRCM_REQ_MB0_ULP_CLOCK_STATE (PRCM_REQ_MB0 + 0x2)

#define	PRCM_REQ_MB0_DO_NOT_WFI (PRCM_REQ_MB0 + 0x3)

#define	PRCM_REQ_MB0_WAKEUP_8500 (PRCM_REQ_MB0 + 0x4)

#define	PRCM_REQ_MB0_WAKEUP_4500 (PRCM_REQ_MB0 + 0x8)

#define	PRCM_ACK_MB0_AP_PWRSTTR_STATUS (PRCM_ACK_MB0 + 0x0)

#define	PRCM_ACK_MB0_READ_POINTER (PRCM_ACK_MB0 + 0x1)

#define	PRCM_ACK_MB0_WAKEUP_0_8500 (PRCM_ACK_MB0 + 0x4)

#define	PRCM_ACK_MB0_WAKEUP_0_4500 (PRCM_ACK_MB0 + 0x8)

#define	PRCM_ACK_MB0_WAKEUP_1_8500 (PRCM_ACK_MB0 + 0x1C)

#define	PRCM_ACK_MB0_WAKEUP_1_4500 (PRCM_ACK_MB0 + 0x20)

#define	PRCM_ACK_MB0_EVENT_4500_NUMBERS 20

#define	MB1H_ARM_APE_OPP 0x0

#define	MB1H_RESET_MODEM 0x2

#define	MB1H_REQUEST_APE_OPP_100_VOLT 0x3

#define	MB1H_RELEASE_APE_OPP_100_VOLT 0x4

#define	MB1H_RELEASE_USB_WAKEUP 0x5

#define	MB1H_PLL_ON_OFF 0x6

#define	PRCM_REQ_MB1_ARM_OPP (PRCM_REQ_MB1 + 0x0)

#define	PRCM_REQ_MB1_APE_OPP (PRCM_REQ_MB1 + 0x1)

#define	PRCM_REQ_MB1_PLL_ON_OFF (PRCM_REQ_MB1 + 0x4)

#define	PLL_SOC0_OFF 0x1

#define	PLL_SOC0_ON 0x2

#define	PLL_SOC1_OFF 0x4

#define	PLL_SOC1_ON 0x8

#define	PRCM_ACK_MB1_CURRENT_ARM_OPP (PRCM_ACK_MB1 + 0x0)

#define	PRCM_ACK_MB1_CURRENT_APE_OPP (PRCM_ACK_MB1 + 0x1)

#define	PRCM_ACK_MB1_APE_VOLTAGE_STATUS (PRCM_ACK_MB1 + 0x2)

#define	PRCM_ACK_MB1_DVFS_STATUS (PRCM_ACK_MB1 + 0x3)

#define	MB2H_DPS 0x0

#define	MB2H_AUTO_PWR 0x1

#define	PRCM_REQ_MB2_SVA_MMDSP (PRCM_REQ_MB2 + 0x0)

#define	PRCM_REQ_MB2_SVA_PIPE (PRCM_REQ_MB2 + 0x1)

#define	PRCM_REQ_MB2_SIA_MMDSP (PRCM_REQ_MB2 + 0x2)

#define	PRCM_REQ_MB2_SIA_PIPE (PRCM_REQ_MB2 + 0x3)

#define	PRCM_REQ_MB2_SGA (PRCM_REQ_MB2 + 0x4)

#define	PRCM_REQ_MB2_B2R2_MCDE (PRCM_REQ_MB2 + 0x5)

#define	PRCM_REQ_MB2_ESRAM12 (PRCM_REQ_MB2 + 0x6)

#define	PRCM_REQ_MB2_ESRAM34 (PRCM_REQ_MB2 + 0x7)

#define	PRCM_REQ_MB2_AUTO_PM_SLEEP (PRCM_REQ_MB2 + 0x8)

#define	PRCM_REQ_MB2_AUTO_PM_IDLE (PRCM_REQ_MB2 + 0xC)

#define	PRCM_ACK_MB2_DPS_STATUS (PRCM_ACK_MB2 + 0x0)

#define	HWACC_PWR_ST_OK 0xFE

#define	MB3H_ANC 0x0

#define	MB3H_SIDETONE 0x1

#define	MB3H_SYSCLK 0xE

#define	PRCM_REQ_MB3_ANC_FIR_COEFF (PRCM_REQ_MB3 + 0x0)

#define	PRCM_REQ_MB3_ANC_IIR_COEFF (PRCM_REQ_MB3 + 0x20)

#define	PRCM_REQ_MB3_ANC_SHIFTER (PRCM_REQ_MB3 + 0x60)

#define	PRCM_REQ_MB3_ANC_WARP (PRCM_REQ_MB3 + 0x64)

#define	PRCM_REQ_MB3_SIDETONE_FIR_GAIN (PRCM_REQ_MB3 + 0x68)

#define	PRCM_REQ_MB3_SIDETONE_FIR_COEFF (PRCM_REQ_MB3 + 0x6C)

#define	PRCM_REQ_MB3_SYSCLK_MGT (PRCM_REQ_MB3 + 0x16C)

#define	MB4H_DDR_INIT 0x0

#define	MB4H_MEM_ST 0x1

#define	MB4H_HOTDOG 0x12

#define	MB4H_HOTMON 0x13

#define	MB4H_HOT_PERIOD 0x14

#define	MB4H_A9WDOG_CONF 0x16

#define	MB4H_A9WDOG_EN 0x17

#define	MB4H_A9WDOG_DIS 0x18

#define	MB4H_A9WDOG_LOAD 0x19

#define	MB4H_A9WDOG_KICK 0x20

#define	PRCM_REQ_MB4_DDR_ST_AP_SLEEP_IDLE (PRCM_REQ_MB4 + 0x0)

#define	PRCM_REQ_MB4_DDR_ST_AP_DEEP_IDLE (PRCM_REQ_MB4 + 0x1)

#define	PRCM_REQ_MB4_ESRAM0_ST (PRCM_REQ_MB4 + 0x3)

#define	PRCM_REQ_MB4_HOTDOG_THRESHOLD (PRCM_REQ_MB4 + 0x0)

#define	PRCM_REQ_MB4_HOTMON_LOW (PRCM_REQ_MB4 + 0x0)

#define	PRCM_REQ_MB4_HOTMON_HIGH (PRCM_REQ_MB4 + 0x1)

#define	PRCM_REQ_MB4_HOTMON_CONFIG (PRCM_REQ_MB4 + 0x2)

#define	PRCM_REQ_MB4_HOT_PERIOD (PRCM_REQ_MB4 + 0x0)

#define	HOTMON_CONFIG_LOW BIT(0)

#define	HOTMON_CONFIG_HIGH BIT(1)

#define	PRCM_REQ_MB4_A9WDOG_0 (PRCM_REQ_MB4 + 0x0)

#define	PRCM_REQ_MB4_A9WDOG_1 (PRCM_REQ_MB4 + 0x1)

#define	PRCM_REQ_MB4_A9WDOG_2 (PRCM_REQ_MB4 + 0x2)

#define	PRCM_REQ_MB4_A9WDOG_3 (PRCM_REQ_MB4 + 0x3)

#define	A9WDOG_AUTO_OFF_EN BIT(7)

#define	A9WDOG_AUTO_OFF_DIS 0

#define	A9WDOG_ID_MASK 0xf

#define	PRCM_REQ_MB5_I2C_SLAVE_OP (PRCM_REQ_MB5 + 0x0)

#define	PRCM_REQ_MB5_I2C_HW_BITS (PRCM_REQ_MB5 + 0x1)

#define	PRCM_REQ_MB5_I2C_REG (PRCM_REQ_MB5 + 0x2)

#define	PRCM_REQ_MB5_I2C_VAL (PRCM_REQ_MB5 + 0x3)

#define	PRCMU_I2C_WRITE(slave) (((slave) << 1) \| (cpu_is_u8500v2() ? BIT(6) : 0))

#define	PRCMU_I2C_READ(slave) (((slave) << 1) \| BIT(0) \| (cpu_is_u8500v2() ? BIT(6) : 0))

#define	PRCMU_I2C_STOP_EN BIT(3)

#define	PRCM_ACK_MB5_I2C_STATUS (PRCM_ACK_MB5 + 0x1)

#define	PRCM_ACK_MB5_I2C_VAL (PRCM_ACK_MB5 + 0x3)

#define	I2C_WR_OK 0x1

#define	I2C_RD_OK 0x2

#define	NUM_MB 8

#define	MBOX_BIT BIT

#define	ALL_MBOX_BITS (MBOX_BIT(NUM_MB) - 1)

#define	WAKEUP_BIT_RTC BIT(0)

#define	WAKEUP_BIT_RTT0 BIT(1)

#define	WAKEUP_BIT_RTT1 BIT(2)

#define	WAKEUP_BIT_HSI0 BIT(3)

#define	WAKEUP_BIT_HSI1 BIT(4)

#define	WAKEUP_BIT_CA_WAKE BIT(5)

#define	WAKEUP_BIT_USB BIT(6)

#define	WAKEUP_BIT_ABB BIT(7)

#define	WAKEUP_BIT_ABB_FIFO BIT(8)

#define	WAKEUP_BIT_SYSCLK_OK BIT(9)

#define	WAKEUP_BIT_CA_SLEEP BIT(10)

#define	WAKEUP_BIT_AC_WAKE_ACK BIT(11)

#define	WAKEUP_BIT_SIDE_TONE_OK BIT(12)

#define	WAKEUP_BIT_ANC_OK BIT(13)

#define	WAKEUP_BIT_SW_ERROR BIT(14)

#define	WAKEUP_BIT_AC_SLEEP_ACK BIT(15)

#define	WAKEUP_BIT_ARM BIT(17)

#define	WAKEUP_BIT_HOTMON_LOW BIT(18)

#define	WAKEUP_BIT_HOTMON_HIGH BIT(19)

#define	WAKEUP_BIT_MODEM_SW_RESET_REQ BIT(20)

#define	WAKEUP_BIT_GPIO0 BIT(23)

#define	WAKEUP_BIT_GPIO1 BIT(24)

#define	WAKEUP_BIT_GPIO2 BIT(25)

#define	WAKEUP_BIT_GPIO3 BIT(26)

#define	WAKEUP_BIT_GPIO4 BIT(27)

#define	WAKEUP_BIT_GPIO5 BIT(28)

#define	WAKEUP_BIT_GPIO6 BIT(29)

#define	WAKEUP_BIT_GPIO7 BIT(30)

#define	WAKEUP_BIT_GPIO8 BIT(31)

#define	IRQ_INDEX(_name) ((IRQ_PRCMU_##_name) - IRQ_PRCMU_BASE)

#define	IRQ_ENTRY(_name) [IRQ_INDEX(_name)] = (WAKEUP_BIT_##_name)

#define	VALID_WAKEUPS (BIT(NUM_PRCMU_WAKEUP_INDICES) - 1)

#define	WAKEUP_ENTRY(_name) [PRCMU_WAKEUP_INDEX_##_name] = (WAKEUP_BIT_##_name)

#define	CLK_MGT_ENTRY(_name, _branch, _clk38div)

#define	PRCMU_RESET_DSIPLL 0x00004000

#define	PRCMU_UNCLAMP_DSIPLL 0x00400800

#define	PRCMU_CLK_PLL_DIV_SHIFT 0

#define	PRCMU_CLK_PLL_SW_SHIFT 5

#define	PRCMU_CLK_38 (1 << 9)

#define	PRCMU_CLK_38_SRC (1 << 10)

#define	PRCMU_CLK_38_DIV (1 << 11)

#define	PRCMU_DSI_CLOCK_SETTING 0x0000008C

#define	PRCMU_DPI_CLOCK_SETTING

#define	PRCMU_DSI_LP_CLOCK_SETTING 0x00000E00

#define	PRCMU_PLLDSI_FREQ_SETTING 0x00040165

#define	PRCMU_ENABLE_PLLDSI 0x00000001

#define	PRCMU_DISABLE_PLLDSI 0x00000000

#define	PRCMU_RELEASE_RESET_DSS 0x0000400C

#define	PRCMU_DSI_PLLOUT_SEL_SETTING 0x00000202

#define	PRCMU_ENABLE_ESCAPE_CLOCK_DIV 0x07030101

#define	PRCMU_DISABLE_ESCAPE_CLOCK_DIV 0x00030101

#define	PRCMU_DSI_RESET_SW 0x00000007

#define	PRCMU_PLLDSI_LOCKP_LOCKED 0x3

#define	PRCMU_GIC_NUMBER_REGS 5

#define	ROOT_CLOCK_RATE 38400000

#define	MIN_PLL_VCO_RATE 600000000ULL

#define	MAX_PLL_VCO_RATE 1680640000ULL

Enumerations
enum	{ PLL_RAW, PLL_FIX, PLL_DIV }

Functions
int	db8500_prcmu_enable_dsipll (void)

int	db8500_prcmu_disable_dsipll (void)

int	db8500_prcmu_set_display_clocks (void)

u32	db8500_prcmu_read (unsigned int reg)

void	db8500_prcmu_write (unsigned int reg, u32 value)

void	db8500_prcmu_write_masked (unsigned int reg, u32 mask, u32 value)

struct prcmu_fw_version *	prcmu_get_fw_version (void)

bool	prcmu_has_arm_maxopp (void)

int	prcmu_get_boot_status (void)

int	prcmu_set_rc_a2p (enum romcode_write val)

enum romcode_read	prcmu_get_rc_p2a (void)

enum ap_pwrst	prcmu_get_xp70_current_state (void)

int	prcmu_config_clkout (u8 clkout, u8 source, u8 div)

int	db8500_prcmu_set_power_state (u8 state, bool keep_ulp_clk, bool keep_ap_pll)

u8	db8500_prcmu_get_power_state_result (void)

int	db8500_prcmu_gic_decouple (void)

int	db8500_prcmu_gic_recouple (void)

bool	db8500_prcmu_gic_pending_irq (void)

bool	db8500_prcmu_pending_irq (void)

bool	db8500_prcmu_is_cpu_in_wfi (int cpu)

int	db8500_prcmu_copy_gic_settings (void)

void	db8500_prcmu_enable_wakeups (u32 wakeups)

void	db8500_prcmu_config_abb_event_readout (u32 abb_events)

void	db8500_prcmu_get_abb_event_buffer (void __iomem **buf)

int	db8500_prcmu_set_arm_opp (u8 opp)

int	db8500_prcmu_get_arm_opp (void)

int	db8500_prcmu_get_ddr_opp (void)

int	db8500_prcmu_set_ddr_opp (u8 opp)

int	db8500_prcmu_set_ape_opp (u8 opp)

int	db8500_prcmu_get_ape_opp (void)

int	prcmu_request_ape_opp_100_voltage (bool enable)

int	prcmu_release_usb_wakeup_state (void)

int	db8500_prcmu_set_epod (u16 epod_id, u8 epod_state)

void	prcmu_configure_auto_pm (struct prcmu_auto_pm_config sleep, struct prcmu_auto_pm_config idle)

	EXPORT_SYMBOL (prcmu_configure_auto_pm)

bool	prcmu_is_auto_pm_enabled (void)

int	db8500_prcmu_request_clock (u8 clock, bool enable)

unsigned long	prcmu_clock_rate (u8 clock)

long	prcmu_round_clock_rate (u8 clock, unsigned long rate)

int	prcmu_set_clock_rate (u8 clock, unsigned long rate)

int	db8500_prcmu_config_esram0_deep_sleep (u8 state)

int	db8500_prcmu_config_hotdog (u8 threshold)

int	db8500_prcmu_config_hotmon (u8 low, u8 high)

int	db8500_prcmu_start_temp_sense (u16 cycles32k)

int	db8500_prcmu_stop_temp_sense (void)

int	db8500_prcmu_config_a9wdog (u8 num, bool sleep_auto_off)

int	db8500_prcmu_enable_a9wdog (u8 id)

int	db8500_prcmu_disable_a9wdog (u8 id)

int	db8500_prcmu_kick_a9wdog (u8 id)

int	db8500_prcmu_load_a9wdog (u8 id, u32 timeout)

int	prcmu_abb_read (u8 slave, u8 reg, u8 *value, u8 size)

int	prcmu_abb_write_masked (u8 slave, u8 reg, u8 value, u8 mask, u8 size)

int	prcmu_abb_write (u8 slave, u8 reg, u8 *value, u8 size)

int	prcmu_ac_wake_req (void)

void	prcmu_ac_sleep_req ()

bool	db8500_prcmu_is_ac_wake_requested (void)

void	db8500_prcmu_system_reset (u16 reset_code)

u16	db8500_prcmu_get_reset_code (void)

void	db8500_prcmu_modem_reset (void)

void __init	db8500_prcmu_early_init (void)

	core_initcall (db8500_prcmu_init)

	MODULE_AUTHOR ("Mattias Nilsson <[email protected]>")

	MODULE_DESCRIPTION ("DB8500 PRCM Unit driver")

	MODULE_LICENSE ("GPL v2")

Variables
struct clk_mgt	clk_mgt [PRCMU_NUM_REG_CLOCKS]

Macro Definition Documentation

#define _PRCM_MBOX_HEADER 0xFE8 /* 16 bytes */

Definition at line 74 of file db8500-prcmu.c.

#define A9WDOG_AUTO_OFF_DIS 0

Definition at line 210 of file db8500-prcmu.c.

#define A9WDOG_AUTO_OFF_EN BIT(7)

Definition at line 209 of file db8500-prcmu.c.

#define A9WDOG_ID_MASK 0xf

Definition at line 211 of file db8500-prcmu.c.

#define ALL_MBOX_BITS (MBOX_BIT(NUM_MB) - 1)

Definition at line 232 of file db8500-prcmu.c.

#define CLK_MGT_ENTRY	(	_name,
		_branch,
		_clk38div
	)

Value:

[PRCMU_##_name] = \

{ (PRCM_##_name##_MGT), 0 , _branch, _clk38div}

Definition at line 448 of file db8500-prcmu.c.

#define HOTMON_CONFIG_HIGH BIT(1)

Definition at line 204 of file db8500-prcmu.c.

#define HOTMON_CONFIG_LOW BIT(0)

Definition at line 203 of file db8500-prcmu.c.

#define HWACC_PWR_ST_OK 0xFE

Definition at line 166 of file db8500-prcmu.c.

#define I2C_RD_OK 0x2

Definition at line 228 of file db8500-prcmu.c.

#define I2C_WR_OK 0x1

Definition at line 227 of file db8500-prcmu.c.

#define IRQ_ENTRY ( _name ) [IRQ_INDEX(_name)] = (WAKEUP_BIT_##_name)

Definition at line 284 of file db8500-prcmu.c.

#define IRQ_INDEX ( _name ) ((IRQ_PRCMU_##_name) - IRQ_PRCMU_BASE)

Definition at line 283 of file db8500-prcmu.c.

#define MAX_PLL_VCO_RATE 1680640000ULL

Definition at line 1824 of file db8500-prcmu.c.

#define MB0H_CONFIG_WAKEUPS_EXE 1

Definition at line 101 of file db8500-prcmu.c.

#define MB0H_CONFIG_WAKEUPS_SLEEP 4

Definition at line 103 of file db8500-prcmu.c.

#define MB0H_POWER_STATE_TRANS 0

Definition at line 100 of file db8500-prcmu.c.

#define MB0H_READ_WAKEUP_ACK 3

Definition at line 102 of file db8500-prcmu.c.

#define MB0H_WAKEUP_EXE 2

Definition at line 105 of file db8500-prcmu.c.

#define MB0H_WAKEUP_SLEEP 5

Definition at line 106 of file db8500-prcmu.c.

#define MB1H_ARM_APE_OPP 0x0

Definition at line 126 of file db8500-prcmu.c.

#define MB1H_PLL_ON_OFF 0x6

Definition at line 131 of file db8500-prcmu.c.

#define MB1H_RELEASE_APE_OPP_100_VOLT 0x4

Definition at line 129 of file db8500-prcmu.c.

#define MB1H_RELEASE_USB_WAKEUP 0x5

Definition at line 130 of file db8500-prcmu.c.

#define MB1H_REQUEST_APE_OPP_100_VOLT 0x3

Definition at line 128 of file db8500-prcmu.c.

#define MB1H_RESET_MODEM 0x2

Definition at line 127 of file db8500-prcmu.c.

#define MB2H_AUTO_PWR 0x1

Definition at line 150 of file db8500-prcmu.c.

#define MB2H_DPS 0x0

Definition at line 149 of file db8500-prcmu.c.

#define MB3H_ANC 0x0

Definition at line 169 of file db8500-prcmu.c.

#define MB3H_SIDETONE 0x1

Definition at line 170 of file db8500-prcmu.c.

#define MB3H_SYSCLK 0xE

Definition at line 171 of file db8500-prcmu.c.

#define MB4H_A9WDOG_CONF 0x16

Definition at line 188 of file db8500-prcmu.c.

#define MB4H_A9WDOG_DIS 0x18

Definition at line 190 of file db8500-prcmu.c.

#define MB4H_A9WDOG_EN 0x17

Definition at line 189 of file db8500-prcmu.c.

#define MB4H_A9WDOG_KICK 0x20

Definition at line 192 of file db8500-prcmu.c.

#define MB4H_A9WDOG_LOAD 0x19

Definition at line 191 of file db8500-prcmu.c.

#define MB4H_DDR_INIT 0x0

Definition at line 183 of file db8500-prcmu.c.

#define MB4H_HOT_PERIOD 0x14

Definition at line 187 of file db8500-prcmu.c.

#define MB4H_HOTDOG 0x12

Definition at line 185 of file db8500-prcmu.c.

#define MB4H_HOTMON 0x13

Definition at line 186 of file db8500-prcmu.c.

#define MB4H_MEM_ST 0x1

Definition at line 184 of file db8500-prcmu.c.

#define MBOX_BIT BIT

Definition at line 231 of file db8500-prcmu.c.

#define MIN_PLL_VCO_RATE 600000000ULL

Definition at line 1823 of file db8500-prcmu.c.

#define NUM_MB 8

Definition at line 230 of file db8500-prcmu.c.

#define PLL_SOC0_OFF 0x1

Definition at line 137 of file db8500-prcmu.c.

#define PLL_SOC0_ON 0x2

Definition at line 138 of file db8500-prcmu.c.

#define PLL_SOC1_OFF 0x4

Definition at line 139 of file db8500-prcmu.c.

#define PLL_SOC1_ON 0x8

Definition at line 140 of file db8500-prcmu.c.

#define PRCM_ACK_MB0 0xE08 /* 52 bytes */

Definition at line 92 of file db8500-prcmu.c.

#define PRCM_ACK_MB0_AP_PWRSTTR_STATUS (PRCM_ACK_MB0 + 0x0)

Definition at line 117 of file db8500-prcmu.c.

#define PRCM_ACK_MB0_EVENT_4500_NUMBERS 20

Definition at line 123 of file db8500-prcmu.c.

#define PRCM_ACK_MB0_READ_POINTER (PRCM_ACK_MB0 + 0x1)

Definition at line 118 of file db8500-prcmu.c.

#define PRCM_ACK_MB0_WAKEUP_0_4500 (PRCM_ACK_MB0 + 0x8)

Definition at line 120 of file db8500-prcmu.c.

#define PRCM_ACK_MB0_WAKEUP_0_8500 (PRCM_ACK_MB0 + 0x4)

Definition at line 119 of file db8500-prcmu.c.

#define PRCM_ACK_MB0_WAKEUP_1_4500 (PRCM_ACK_MB0 + 0x20)

Definition at line 122 of file db8500-prcmu.c.

#define PRCM_ACK_MB0_WAKEUP_1_8500 (PRCM_ACK_MB0 + 0x1C)

Definition at line 121 of file db8500-prcmu.c.

#define PRCM_ACK_MB1 0xE04 /* 4 bytes */

Definition at line 93 of file db8500-prcmu.c.

#define PRCM_ACK_MB1_APE_VOLTAGE_STATUS (PRCM_ACK_MB1 + 0x2)

Definition at line 145 of file db8500-prcmu.c.

#define PRCM_ACK_MB1_CURRENT_APE_OPP (PRCM_ACK_MB1 + 0x1)

Definition at line 144 of file db8500-prcmu.c.

#define PRCM_ACK_MB1_CURRENT_ARM_OPP (PRCM_ACK_MB1 + 0x0)

Definition at line 143 of file db8500-prcmu.c.

#define PRCM_ACK_MB1_DVFS_STATUS (PRCM_ACK_MB1 + 0x3)

Definition at line 146 of file db8500-prcmu.c.

#define PRCM_ACK_MB2 0xE00 /* 4 bytes */

Definition at line 94 of file db8500-prcmu.c.

#define PRCM_ACK_MB2_DPS_STATUS (PRCM_ACK_MB2 + 0x0)

Definition at line 165 of file db8500-prcmu.c.

#define PRCM_ACK_MB3 0xDFC /* 4 bytes */

Definition at line 95 of file db8500-prcmu.c.

#define PRCM_ACK_MB4 0xDF8 /* 4 bytes */

Definition at line 96 of file db8500-prcmu.c.

#define PRCM_ACK_MB5 0xDF4 /* 4 bytes */

Definition at line 97 of file db8500-prcmu.c.

#define PRCM_ACK_MB5_I2C_STATUS (PRCM_ACK_MB5 + 0x1)

Definition at line 225 of file db8500-prcmu.c.

#define PRCM_ACK_MB5_I2C_VAL (PRCM_ACK_MB5 + 0x3)

Definition at line 226 of file db8500-prcmu.c.

#define PRCM_AVS_BASE 0x2FC

Definition at line 45 of file db8500-prcmu.c.

#define PRCM_AVS_ISMODEENABLE 7

Definition at line 64 of file db8500-prcmu.c.

#define PRCM_AVS_ISMODEENABLE_MASK (1 << PRCM_AVS_ISMODEENABLE)

Definition at line 65 of file db8500-prcmu.c.

#define PRCM_AVS_ISSLOWSTARTUP 6

Definition at line 62 of file db8500-prcmu.c.

#define PRCM_AVS_ISSLOWSTARTUP_MASK (1 << PRCM_AVS_ISSLOWSTARTUP)

Definition at line 63 of file db8500-prcmu.c.

#define PRCM_AVS_VAPE_100_OPP (PRCM_AVS_BASE + 0x8)

Definition at line 54 of file db8500-prcmu.c.

#define PRCM_AVS_VAPE_50_OPP (PRCM_AVS_BASE + 0x9)

Definition at line 55 of file db8500-prcmu.c.

#define PRCM_AVS_VARM_100_OPP (PRCM_AVS_BASE + 0x5)

Definition at line 51 of file db8500-prcmu.c.

#define PRCM_AVS_VARM_50_OPP (PRCM_AVS_BASE + 0x6)

Definition at line 52 of file db8500-prcmu.c.

#define PRCM_AVS_VARM_MAX_OPP (PRCM_AVS_BASE + 0x4)

Definition at line 50 of file db8500-prcmu.c.

#define PRCM_AVS_VARM_RET (PRCM_AVS_BASE + 0x7)

Definition at line 53 of file db8500-prcmu.c.

#define PRCM_AVS_VBB_100_OPP (PRCM_AVS_BASE + 0x2)

Definition at line 48 of file db8500-prcmu.c.

#define PRCM_AVS_VBB_50_OPP (PRCM_AVS_BASE + 0x3)

Definition at line 49 of file db8500-prcmu.c.

#define PRCM_AVS_VBB_MAX_OPP (PRCM_AVS_BASE + 0x1)

Definition at line 47 of file db8500-prcmu.c.

#define PRCM_AVS_VBB_RET (PRCM_AVS_BASE + 0x0)

Definition at line 46 of file db8500-prcmu.c.

#define PRCM_AVS_VMOD_100_OPP (PRCM_AVS_BASE + 0xA)

Definition at line 56 of file db8500-prcmu.c.

#define PRCM_AVS_VMOD_50_OPP (PRCM_AVS_BASE + 0xB)

Definition at line 57 of file db8500-prcmu.c.

#define PRCM_AVS_VOLTAGE 0

Definition at line 60 of file db8500-prcmu.c.

#define PRCM_AVS_VOLTAGE_MASK 0x3f

Definition at line 61 of file db8500-prcmu.c.

#define PRCM_AVS_VSAFE (PRCM_AVS_BASE + 0xC)

Definition at line 58 of file db8500-prcmu.c.

#define PRCM_BOOT_STATUS 0xFFF

Definition at line 67 of file db8500-prcmu.c.

#define PRCM_MBOX_HEADER_ACK_MB0 (_PRCM_MBOX_HEADER + 0x8)

Definition at line 81 of file db8500-prcmu.c.

#define PRCM_MBOX_HEADER_REQ_MB0 (_PRCM_MBOX_HEADER + 0x0)

Definition at line 75 of file db8500-prcmu.c.

#define PRCM_MBOX_HEADER_REQ_MB1 (_PRCM_MBOX_HEADER + 0x1)

Definition at line 76 of file db8500-prcmu.c.

#define PRCM_MBOX_HEADER_REQ_MB2 (_PRCM_MBOX_HEADER + 0x2)

Definition at line 77 of file db8500-prcmu.c.

#define PRCM_MBOX_HEADER_REQ_MB3 (_PRCM_MBOX_HEADER + 0x3)

Definition at line 78 of file db8500-prcmu.c.

#define PRCM_MBOX_HEADER_REQ_MB4 (_PRCM_MBOX_HEADER + 0x4)

Definition at line 79 of file db8500-prcmu.c.

#define PRCM_MBOX_HEADER_REQ_MB5 (_PRCM_MBOX_HEADER + 0x5)

Definition at line 80 of file db8500-prcmu.c.

#define PRCM_REQ_MB0 0xFDC /* 12 bytes */

Definition at line 84 of file db8500-prcmu.c.

#define PRCM_REQ_MB0_AP_PLL_STATE (PRCM_REQ_MB0 + 0x1)

Definition at line 110 of file db8500-prcmu.c.

#define PRCM_REQ_MB0_AP_POWER_STATE (PRCM_REQ_MB0 + 0x0)

Definition at line 109 of file db8500-prcmu.c.

#define PRCM_REQ_MB0_DO_NOT_WFI (PRCM_REQ_MB0 + 0x3)

Definition at line 112 of file db8500-prcmu.c.

#define PRCM_REQ_MB0_ULP_CLOCK_STATE (PRCM_REQ_MB0 + 0x2)

Definition at line 111 of file db8500-prcmu.c.

#define PRCM_REQ_MB0_WAKEUP_4500 (PRCM_REQ_MB0 + 0x8)

Definition at line 114 of file db8500-prcmu.c.

#define PRCM_REQ_MB0_WAKEUP_8500 (PRCM_REQ_MB0 + 0x4)

Definition at line 113 of file db8500-prcmu.c.

#define PRCM_REQ_MB1 0xFD0 /* 12 bytes */

Definition at line 85 of file db8500-prcmu.c.

#define PRCM_REQ_MB1_APE_OPP (PRCM_REQ_MB1 + 0x1)

Definition at line 135 of file db8500-prcmu.c.

#define PRCM_REQ_MB1_ARM_OPP (PRCM_REQ_MB1 + 0x0)

Definition at line 134 of file db8500-prcmu.c.

#define PRCM_REQ_MB1_PLL_ON_OFF (PRCM_REQ_MB1 + 0x4)

Definition at line 136 of file db8500-prcmu.c.

#define PRCM_REQ_MB2 0xFC0 /* 16 bytes */

Definition at line 86 of file db8500-prcmu.c.

#define PRCM_REQ_MB2_AUTO_PM_IDLE (PRCM_REQ_MB2 + 0xC)

Definition at line 162 of file db8500-prcmu.c.

#define PRCM_REQ_MB2_AUTO_PM_SLEEP (PRCM_REQ_MB2 + 0x8)

Definition at line 161 of file db8500-prcmu.c.

#define PRCM_REQ_MB2_B2R2_MCDE (PRCM_REQ_MB2 + 0x5)

Definition at line 158 of file db8500-prcmu.c.

#define PRCM_REQ_MB2_ESRAM12 (PRCM_REQ_MB2 + 0x6)

Definition at line 159 of file db8500-prcmu.c.

#define PRCM_REQ_MB2_ESRAM34 (PRCM_REQ_MB2 + 0x7)

Definition at line 160 of file db8500-prcmu.c.

#define PRCM_REQ_MB2_SGA (PRCM_REQ_MB2 + 0x4)

Definition at line 157 of file db8500-prcmu.c.

#define PRCM_REQ_MB2_SIA_MMDSP (PRCM_REQ_MB2 + 0x2)

Definition at line 155 of file db8500-prcmu.c.

#define PRCM_REQ_MB2_SIA_PIPE (PRCM_REQ_MB2 + 0x3)

Definition at line 156 of file db8500-prcmu.c.

#define PRCM_REQ_MB2_SVA_MMDSP (PRCM_REQ_MB2 + 0x0)

Definition at line 153 of file db8500-prcmu.c.

#define PRCM_REQ_MB2_SVA_PIPE (PRCM_REQ_MB2 + 0x1)

Definition at line 154 of file db8500-prcmu.c.

#define PRCM_REQ_MB3 0xE4C /* 372 bytes */

Definition at line 87 of file db8500-prcmu.c.

#define PRCM_REQ_MB3_ANC_FIR_COEFF (PRCM_REQ_MB3 + 0x0)

Definition at line 174 of file db8500-prcmu.c.

#define PRCM_REQ_MB3_ANC_IIR_COEFF (PRCM_REQ_MB3 + 0x20)

Definition at line 175 of file db8500-prcmu.c.

#define PRCM_REQ_MB3_ANC_SHIFTER (PRCM_REQ_MB3 + 0x60)

Definition at line 176 of file db8500-prcmu.c.

#define PRCM_REQ_MB3_ANC_WARP (PRCM_REQ_MB3 + 0x64)

Definition at line 177 of file db8500-prcmu.c.

#define PRCM_REQ_MB3_SIDETONE_FIR_COEFF (PRCM_REQ_MB3 + 0x6C)

Definition at line 179 of file db8500-prcmu.c.

#define PRCM_REQ_MB3_SIDETONE_FIR_GAIN (PRCM_REQ_MB3 + 0x68)

Definition at line 178 of file db8500-prcmu.c.

#define PRCM_REQ_MB3_SYSCLK_MGT (PRCM_REQ_MB3 + 0x16C)

Definition at line 180 of file db8500-prcmu.c.

#define PRCM_REQ_MB4 0xE48 /* 4 bytes */

Definition at line 88 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_A9WDOG_0 (PRCM_REQ_MB4 + 0x0)

Definition at line 205 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_A9WDOG_1 (PRCM_REQ_MB4 + 0x1)

Definition at line 206 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_A9WDOG_2 (PRCM_REQ_MB4 + 0x2)

Definition at line 207 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_A9WDOG_3 (PRCM_REQ_MB4 + 0x3)

Definition at line 208 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_DDR_ST_AP_DEEP_IDLE (PRCM_REQ_MB4 + 0x1)

Definition at line 196 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_DDR_ST_AP_SLEEP_IDLE (PRCM_REQ_MB4 + 0x0)

Definition at line 195 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_ESRAM0_ST (PRCM_REQ_MB4 + 0x3)

Definition at line 197 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_HOT_PERIOD (PRCM_REQ_MB4 + 0x0)

Definition at line 202 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_HOTDOG_THRESHOLD (PRCM_REQ_MB4 + 0x0)

Definition at line 198 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_HOTMON_CONFIG (PRCM_REQ_MB4 + 0x2)

Definition at line 201 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_HOTMON_HIGH (PRCM_REQ_MB4 + 0x1)

Definition at line 200 of file db8500-prcmu.c.

#define PRCM_REQ_MB4_HOTMON_LOW (PRCM_REQ_MB4 + 0x0)

Definition at line 199 of file db8500-prcmu.c.

#define PRCM_REQ_MB5 0xE44 /* 4 bytes */

Definition at line 89 of file db8500-prcmu.c.

#define PRCM_REQ_MB5_I2C_HW_BITS (PRCM_REQ_MB5 + 0x1)

Definition at line 215 of file db8500-prcmu.c.

#define PRCM_REQ_MB5_I2C_REG (PRCM_REQ_MB5 + 0x2)

Definition at line 216 of file db8500-prcmu.c.

#define PRCM_REQ_MB5_I2C_SLAVE_OP (PRCM_REQ_MB5 + 0x0)

Definition at line 214 of file db8500-prcmu.c.

#define PRCM_REQ_MB5_I2C_VAL (PRCM_REQ_MB5 + 0x3)

Definition at line 217 of file db8500-prcmu.c.

#define PRCM_ROMCODE_A2P 0xFFE

Definition at line 68 of file db8500-prcmu.c.

#define PRCM_ROMCODE_P2A 0xFFD

Definition at line 69 of file db8500-prcmu.c.

#define PRCM_SW_RST_REASON 0xFF8 /* 2 bytes */

Definition at line 72 of file db8500-prcmu.c.

#define PRCM_XP70_CUR_PWR_STATE 0xFFC /* 4 BYTES */

Definition at line 70 of file db8500-prcmu.c.

#define PRCMU_CLK_38 (1 << 9)

Definition at line 534 of file db8500-prcmu.c.

#define PRCMU_CLK_38_DIV (1 << 11)

Definition at line 536 of file db8500-prcmu.c.

#define PRCMU_CLK_38_SRC (1 << 10)

Definition at line 535 of file db8500-prcmu.c.

#define PRCMU_CLK_PLL_DIV_SHIFT 0

Definition at line 532 of file db8500-prcmu.c.

#define PRCMU_CLK_PLL_SW_SHIFT 5

Definition at line 533 of file db8500-prcmu.c.

#define PRCMU_DISABLE_ESCAPE_CLOCK_DIV 0x00030101

Definition at line 555 of file db8500-prcmu.c.

#define PRCMU_DISABLE_PLLDSI 0x00000000

Definition at line 550 of file db8500-prcmu.c.

#define PRCMU_DPI_CLOCK_SETTING

Value:

((1 << PRCMU_CLK_PLL_SW_SHIFT) | \

(16 << PRCMU_CLK_PLL_DIV_SHIFT))

Definition at line 542 of file db8500-prcmu.c.

#define PRCMU_DSI_CLOCK_SETTING 0x0000008C

Definition at line 539 of file db8500-prcmu.c.

#define PRCMU_DSI_LP_CLOCK_SETTING 0x00000E00

Definition at line 544 of file db8500-prcmu.c.

#define PRCMU_DSI_PLLOUT_SEL_SETTING 0x00000202

Definition at line 552 of file db8500-prcmu.c.

#define PRCMU_DSI_RESET_SW 0x00000007

Definition at line 556 of file db8500-prcmu.c.

#define PRCMU_ENABLE_ESCAPE_CLOCK_DIV 0x07030101

Definition at line 554 of file db8500-prcmu.c.

#define PRCMU_ENABLE_PLLDSI 0x00000001

Definition at line 549 of file db8500-prcmu.c.

#define PRCMU_FW_VERSION_OFFSET 0xA4

Definition at line 42 of file db8500-prcmu.c.

#define PRCMU_GIC_NUMBER_REGS 5

Definition at line 832 of file db8500-prcmu.c.

#define PRCMU_I2C_READ ( slave ) (((slave) << 1) | BIT(0) | (cpu_is_u8500v2() ? BIT(6) : 0))

Definition at line 220 of file db8500-prcmu.c.

#define PRCMU_I2C_STOP_EN BIT(3)

Definition at line 222 of file db8500-prcmu.c.

#define PRCMU_I2C_WRITE ( slave ) (((slave) << 1) | (cpu_is_u8500v2() ? BIT(6) : 0))

Definition at line 218 of file db8500-prcmu.c.

#define PRCMU_PLLDSI_FREQ_SETTING 0x00040165

Definition at line 547 of file db8500-prcmu.c.

#define PRCMU_PLLDSI_LOCKP_LOCKED 0x3

Definition at line 558 of file db8500-prcmu.c.

#define PRCMU_RELEASE_RESET_DSS 0x0000400C

Definition at line 551 of file db8500-prcmu.c.

#define PRCMU_RESET_DSIPLL 0x00004000

Definition at line 529 of file db8500-prcmu.c.

#define PRCMU_UNCLAMP_DSIPLL 0x00400800

Definition at line 530 of file db8500-prcmu.c.

#define ROOT_CLOCK_RATE 38400000

Definition at line 1631 of file db8500-prcmu.c.

#define VALID_WAKEUPS (BIT(NUM_PRCMU_WAKEUP_INDICES) - 1)

Definition at line 311 of file db8500-prcmu.c.

#define WAKEUP_BIT_ABB BIT(7)

Definition at line 245 of file db8500-prcmu.c.

#define WAKEUP_BIT_ABB_FIFO BIT(8)

Definition at line 246 of file db8500-prcmu.c.

#define WAKEUP_BIT_AC_SLEEP_ACK BIT(15)

Definition at line 253 of file db8500-prcmu.c.

#define WAKEUP_BIT_AC_WAKE_ACK BIT(11)

Definition at line 249 of file db8500-prcmu.c.

#define WAKEUP_BIT_ANC_OK BIT(13)

Definition at line 251 of file db8500-prcmu.c.

#define WAKEUP_BIT_ARM BIT(17)

Definition at line 254 of file db8500-prcmu.c.

#define WAKEUP_BIT_CA_SLEEP BIT(10)

Definition at line 248 of file db8500-prcmu.c.

#define WAKEUP_BIT_CA_WAKE BIT(5)

Definition at line 243 of file db8500-prcmu.c.

#define WAKEUP_BIT_GPIO0 BIT(23)

Definition at line 258 of file db8500-prcmu.c.

#define WAKEUP_BIT_GPIO1 BIT(24)

Definition at line 259 of file db8500-prcmu.c.

#define WAKEUP_BIT_GPIO2 BIT(25)

Definition at line 260 of file db8500-prcmu.c.

#define WAKEUP_BIT_GPIO3 BIT(26)

Definition at line 261 of file db8500-prcmu.c.

#define WAKEUP_BIT_GPIO4 BIT(27)

Definition at line 262 of file db8500-prcmu.c.

#define WAKEUP_BIT_GPIO5 BIT(28)

Definition at line 263 of file db8500-prcmu.c.

#define WAKEUP_BIT_GPIO6 BIT(29)

Definition at line 264 of file db8500-prcmu.c.

#define WAKEUP_BIT_GPIO7 BIT(30)

Definition at line 265 of file db8500-prcmu.c.

#define WAKEUP_BIT_GPIO8 BIT(31)

Definition at line 266 of file db8500-prcmu.c.

#define WAKEUP_BIT_HOTMON_HIGH BIT(19)

Definition at line 256 of file db8500-prcmu.c.

#define WAKEUP_BIT_HOTMON_LOW BIT(18)

Definition at line 255 of file db8500-prcmu.c.

#define WAKEUP_BIT_HSI0 BIT(3)

Definition at line 241 of file db8500-prcmu.c.

#define WAKEUP_BIT_HSI1 BIT(4)

Definition at line 242 of file db8500-prcmu.c.

#define WAKEUP_BIT_MODEM_SW_RESET_REQ BIT(20)

Definition at line 257 of file db8500-prcmu.c.

#define WAKEUP_BIT_RTC BIT(0)

Definition at line 238 of file db8500-prcmu.c.

#define WAKEUP_BIT_RTT0 BIT(1)

Definition at line 239 of file db8500-prcmu.c.

#define WAKEUP_BIT_RTT1 BIT(2)

Definition at line 240 of file db8500-prcmu.c.

#define WAKEUP_BIT_SIDE_TONE_OK BIT(12)

Definition at line 250 of file db8500-prcmu.c.

#define WAKEUP_BIT_SW_ERROR BIT(14)

Definition at line 252 of file db8500-prcmu.c.

#define WAKEUP_BIT_SYSCLK_OK BIT(9)

Definition at line 247 of file db8500-prcmu.c.

#define WAKEUP_BIT_USB BIT(6)

Definition at line 244 of file db8500-prcmu.c.

#define WAKEUP_ENTRY ( _name ) [PRCMU_WAKEUP_INDEX_##_name] = (WAKEUP_BIT_##_name)

Definition at line 312 of file db8500-prcmu.c.

Enumeration Type Documentation

anonymous enum

Enumerator:

PLL_RAW
PLL_FIX
PLL_DIV

Definition at line 440 of file db8500-prcmu.c.

Function Documentation

core_initcall ( db8500_prcmu_init )

int db8500_prcmu_config_a9wdog	(	u8	num,
		bool	sleep_auto_off
	)

Definition at line 2162 of file db8500-prcmu.c.

void db8500_prcmu_config_abb_event_readout ( u32 abb_events )

Definition at line 970 of file db8500-prcmu.c.

int db8500_prcmu_config_esram0_deep_sleep ( u8 state )

Definition at line 2042 of file db8500-prcmu.c.

int db8500_prcmu_config_hotdog ( u8 threshold )

Definition at line 2068 of file db8500-prcmu.c.

int db8500_prcmu_config_hotmon	(	u8	low,
		u8	high
	)

Definition at line 2086 of file db8500-prcmu.c.

int db8500_prcmu_copy_gic_settings ( void )

Definition at line 900 of file db8500-prcmu.c.

int db8500_prcmu_disable_a9wdog ( u8 id )

Definition at line 2175 of file db8500-prcmu.c.

int db8500_prcmu_disable_dsipll ( void )

Definition at line 590 of file db8500-prcmu.c.

void __init db8500_prcmu_early_init ( void )

Definition at line 2712 of file db8500-prcmu.c.

int db8500_prcmu_enable_a9wdog ( u8 id )

Definition at line 2170 of file db8500-prcmu.c.

int db8500_prcmu_enable_dsipll ( void )

Definition at line 560 of file db8500-prcmu.c.

void db8500_prcmu_enable_wakeups ( u32 wakeups )

Definition at line 949 of file db8500-prcmu.c.

void db8500_prcmu_get_abb_event_buffer ( void __iomem ** buf )

Definition at line 982 of file db8500-prcmu.c.

int db8500_prcmu_get_ape_opp ( void )

db8500_prcmu_get_ape_opp - get the current APE OPP

Returns: the current APE OPP

Definition at line 1166 of file db8500-prcmu.c.

int db8500_prcmu_get_arm_opp ( void )

db8500_prcmu_get_arm_opp - get the current ARM OPP

Returns: the current ARM OPP

Definition at line 1033 of file db8500-prcmu.c.

int db8500_prcmu_get_ddr_opp ( void )

db8500_prcmu_get_ddr_opp - get the current DDR OPP

Returns: the current DDR OPP

Definition at line 1043 of file db8500-prcmu.c.

u8 db8500_prcmu_get_power_state_result ( void )

Definition at line 798 of file db8500-prcmu.c.

u16 db8500_prcmu_get_reset_code ( void )

db8500_prcmu_get_reset_code - Retrieve SW reset reason code

Retrieves the reset reason code stored by prcmu_system_reset() before last restart.

Definition at line 2408 of file db8500-prcmu.c.

int db8500_prcmu_gic_decouple ( void )

Definition at line 804 of file db8500-prcmu.c.

bool db8500_prcmu_gic_pending_irq ( void )

Definition at line 844 of file db8500-prcmu.c.

int db8500_prcmu_gic_recouple ( void )

Definition at line 822 of file db8500-prcmu.c.

bool db8500_prcmu_is_ac_wake_requested ( void )

Definition at line 2385 of file db8500-prcmu.c.

bool db8500_prcmu_is_cpu_in_wfi ( int cpu )

Definition at line 890 of file db8500-prcmu.c.

int db8500_prcmu_kick_a9wdog ( u8 id )

Definition at line 2180 of file db8500-prcmu.c.

int db8500_prcmu_load_a9wdog	(	u8	id,
		u32	timeout
	)

Definition at line 2188 of file db8500-prcmu.c.

void db8500_prcmu_modem_reset ( void )

db8500_prcmu_reset_modem - ask the PRCMU to reset modem

Definition at line 2416 of file db8500-prcmu.c.

bool db8500_prcmu_pending_irq ( void )

Definition at line 869 of file db8500-prcmu.c.

u32 db8500_prcmu_read ( unsigned int reg )

Definition at line 621 of file db8500-prcmu.c.

int db8500_prcmu_request_clock	(	u8	clock,
		bool	enable
	)

db8500_prcmu_request_clock() - Request for a clock to be enabled or disabled. : The clock for which the request is made. : Whether the clock should be enabled (true) or disabled (false).

This function should only be used by the clock implementation. Do not use it from any other place!

Definition at line 1573 of file db8500-prcmu.c.

int db8500_prcmu_set_ape_opp ( u8 opp )

db8500_set_ape_opp - set the appropriate APE OPP : The new APE operating point to which transition is to be made Returns: 0 on success, non-zero on failure

This function sets the operating point of the APE.

Definition at line 1119 of file db8500-prcmu.c.

int db8500_prcmu_set_arm_opp ( u8 opp )

db8500_prcmu_set_arm_opp - set the appropriate ARM OPP : The new ARM operating point to which transition is to be made Returns: 0 on success, non-zero on failure

This function sets the the operating point of the ARM.

Definition at line 997 of file db8500-prcmu.c.

int db8500_prcmu_set_ddr_opp ( u8 opp )

db8500_set_ddr_opp - set the appropriate DDR OPP : The new DDR operating point to which transition is to be made Returns: 0 on success, non-zero on failure

This function sets the operating point of the DDR.

Definition at line 1055 of file db8500-prcmu.c.

int db8500_prcmu_set_display_clocks ( void )

Definition at line 599 of file db8500-prcmu.c.

int db8500_prcmu_set_epod	(	u16	epod_id,
		u8	epod_state
	)

db8500_prcmu_set_epod - set the state of a EPOD (power domain) : The EPOD to set : The new EPOD state

This function sets the state of a EPOD (power domain). It may not be called from interrupt context.

Definition at line 1284 of file db8500-prcmu.c.

int db8500_prcmu_set_power_state	(	u8	state,
		bool	keep_ulp_clk,
		bool	keep_ap_pll
	)

Definition at line 774 of file db8500-prcmu.c.

int db8500_prcmu_start_temp_sense ( u16 cycles32k )

Definition at line 2125 of file db8500-prcmu.c.

int db8500_prcmu_stop_temp_sense ( void )

Definition at line 2133 of file db8500-prcmu.c.

void db8500_prcmu_system_reset ( u16 reset_code )

db8500_prcmu_system_reset - System reset

Saves the reset reason code and then sets the APE_SOFTRST register which fires interrupt to fw

Definition at line 2396 of file db8500-prcmu.c.

void db8500_prcmu_write	(	unsigned int	reg,
		u32	value
	)

Definition at line 626 of file db8500-prcmu.c.

void db8500_prcmu_write_masked	(	unsigned int	reg,
		u32	mask,
		u32	value
	)

Definition at line 635 of file db8500-prcmu.c.

EXPORT_SYMBOL ( prcmu_configure_auto_pm )

MODULE_AUTHOR ( "Mattias Nilsson <[email protected]>" )

MODULE_DESCRIPTION ( "DB8500 PRCM Unit driver" )

MODULE_LICENSE ( "GPL v2" )

int prcmu_abb_read	(	u8	slave,
		u8	reg,
		u8 *	value,
		u8	size
	)

prcmu_abb_read() - Read register value(s) from the ABB. : The I2C slave address. : The (start) register address. : The read out value(s). : The number of registers to read.

Reads register value(s) from the ABB. has to be 1 for the current firmware version.

Definition at line 2212 of file db8500-prcmu.c.

int prcmu_abb_write	(	u8	slave,
		u8	reg,
		u8 *	value,
		u8	size
	)

prcmu_abb_write() - Write register value(s) to the ABB. : The I2C slave address. : The (start) register address. : The value(s) to write. : The number of registers to write.

Writes register value(s) to the ABB. has to be 1 for the current firmware version.

Definition at line 2306 of file db8500-prcmu.c.

int prcmu_abb_write_masked	(	u8	slave,
		u8	reg,
		u8 *	value,
		u8 *	mask,
		u8	size
	)

prcmu_abb_write_masked() - Write masked register value(s) to the ABB. : The I2C slave address. : The (start) register address. : The value(s) to write. : The mask(s) to use. : The number of registers to write.

Writes masked register value(s) to the ABB. For each , only the bits set to 1 in the corresponding will be written. The other bits are not changed. has to be 1 for the current firmware version.

Definition at line 2262 of file db8500-prcmu.c.

void prcmu_ac_sleep_req ( void )

prcmu_ac_sleep_req - called when ARM no longer needs to talk to modem

Definition at line 2360 of file db8500-prcmu.c.

int prcmu_ac_wake_req ( void )

prcmu_ac_wake_req - should be called whenever ARM wants to wakeup Modem

Definition at line 2316 of file db8500-prcmu.c.

unsigned long prcmu_clock_rate ( u8 clock )

Definition at line 1739 of file db8500-prcmu.c.

int prcmu_config_clkout	(	u8	clkout,
		u8	source,
		u8	div
	)

prcmu_config_clkout - Configure one of the programmable clock outputs. : The CLKOUT number (0 or 1). : The clock to be used (one of the PRCMU_CLKSRC_*). : The divider to be applied.

Configures one of the programmable clock outputs (CLKOUTs). should be in the range [1,63] to request a configuration, or 0 to inform that the configuration is no longer requested.

Definition at line 715 of file db8500-prcmu.c.

void prcmu_configure_auto_pm	(	struct prcmu_auto_pm_config *	sleep,
		struct prcmu_auto_pm_config *	idle
	)

prcmu_configure_auto_pm - Configure autonomous power management. : Configuration for ApSleep. : Configuration for ApIdle.

Definition at line 1349 of file db8500-prcmu.c.

int prcmu_get_boot_status ( void )

prcmu_get_boot_status - PRCMU boot status checking Returns: the current PRCMU boot status

Definition at line 662 of file db8500-prcmu.c.

struct prcmu_fw_version* prcmu_get_fw_version ( void )

read

Definition at line 647 of file db8500-prcmu.c.

enum romcode_read prcmu_get_rc_p2a ( void )

prcmu_get_rc_p2a - This function is used to get power state sequences Returns: the power transition that has last happened

This function can return the following transitions- any state to ApReset, ApDeepSleep to ApExecute, ApExecute to ApDeepSleep

Definition at line 690 of file db8500-prcmu.c.

enum ap_pwrst prcmu_get_xp70_current_state ( void )

prcmu_get_current_mode - Return the current XP70 power mode Returns: Returns the current AP(ARM) power mode: init, apBoot, apExecute, apDeepSleep, apSleep, apIdle, apReset

Definition at line 700 of file db8500-prcmu.c.

bool prcmu_has_arm_maxopp ( void )

Definition at line 652 of file db8500-prcmu.c.

bool prcmu_is_auto_pm_enabled ( void )

Definition at line 1392 of file db8500-prcmu.c.

int prcmu_release_usb_wakeup_state ( void )

prcmu_release_usb_wakeup_state - release the state required by a USB wakeup

This function releases the power state requirements of a USB wakeup.

Definition at line 1222 of file db8500-prcmu.c.

int prcmu_request_ape_opp_100_voltage ( bool enable )

prcmu_request_ape_opp_100_voltage - Request APE OPP 100% voltage : true to request the higher voltage, false to drop a request.

Calls to this function to enable and disable requests must be balanced.

Definition at line 1177 of file db8500-prcmu.c.

long prcmu_round_clock_rate	(	u8	clock,
		unsigned long	rate
	)

Definition at line 1890 of file db8500-prcmu.c.

int prcmu_set_clock_rate	(	u8	clock,
		unsigned long	rate
	)

Definition at line 2029 of file db8500-prcmu.c.

int prcmu_set_rc_a2p ( enum romcode_write val )

prcmu_set_rc_a2p - This function is used to run few power state sequences : Value to be set, i.e. transition requested Returns: 0 on success, -EINVAL on invalid argument

This function is used to run the following power state sequences - any state to ApReset, ApDeepSleep to ApExecute, ApExecute to ApDeepSleep

Definition at line 675 of file db8500-prcmu.c.