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board-dm644x-evm.c
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1 /*
2  * TI DaVinci EVM board support
3  *
4  * Author: Kevin Hilman, MontaVista Software, Inc. <[email protected]>
5  *
6  * 2007 (c) MontaVista Software, Inc. This file is licensed under
7  * the terms of the GNU General Public License version 2. This program
8  * is licensed "as is" without any warranty of any kind, whether express
9  * or implied.
10  */
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/i2c.h>
17 #include <linux/i2c/pcf857x.h>
18 #include <linux/i2c/at24.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/partitions.h>
22 #include <linux/mtd/physmap.h>
23 #include <linux/phy.h>
24 #include <linux/clk.h>
25 #include <linux/videodev2.h>
26 #include <linux/v4l2-dv-timings.h>
27 #include <linux/export.h>
28 
29 #include <media/tvp514x.h>
30 
31 #include <asm/mach-types.h>
32 #include <asm/mach/arch.h>
33 
34 #include <mach/common.h>
36 #include <mach/serial.h>
37 #include <mach/mux.h>
42 
43 #include "davinci.h"
44 
45 #define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
46 #define LXT971_PHY_ID (0x001378e2)
47 #define LXT971_PHY_MASK (0xfffffff0)
48 
49 static struct mtd_partition davinci_evm_norflash_partitions[] = {
50  /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
51  {
52  .name = "bootloader",
53  .offset = 0,
54  .size = 5 * SZ_64K,
55  .mask_flags = MTD_WRITEABLE, /* force read-only */
56  },
57  /* bootloader params in the next 1 sectors */
58  {
59  .name = "params",
60  .offset = MTDPART_OFS_APPEND,
61  .size = SZ_64K,
62  .mask_flags = 0,
63  },
64  /* kernel */
65  {
66  .name = "kernel",
67  .offset = MTDPART_OFS_APPEND,
68  .size = SZ_2M,
69  .mask_flags = 0
70  },
71  /* file system */
72  {
73  .name = "filesystem",
74  .offset = MTDPART_OFS_APPEND,
75  .size = MTDPART_SIZ_FULL,
76  .mask_flags = 0
77  }
78 };
79 
80 static struct physmap_flash_data davinci_evm_norflash_data = {
81  .width = 2,
82  .parts = davinci_evm_norflash_partitions,
83  .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
84 };
85 
86 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
87  * limits addresses to 16M, so using addresses past 16M will wrap */
88 static struct resource davinci_evm_norflash_resource = {
91  .flags = IORESOURCE_MEM,
92 };
93 
94 static struct platform_device davinci_evm_norflash_device = {
95  .name = "physmap-flash",
96  .id = 0,
97  .dev = {
98  .platform_data = &davinci_evm_norflash_data,
99  },
100  .num_resources = 1,
101  .resource = &davinci_evm_norflash_resource,
102 };
103 
104 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
105  * It may used instead of the (default) NOR chip to boot, using TI's
106  * tools to install the secondary boot loader (UBL) and U-Boot.
107  */
108 static struct mtd_partition davinci_evm_nandflash_partition[] = {
109  /* Bootloader layout depends on whose u-boot is installed, but we
110  * can hide all the details.
111  * - block 0 for u-boot environment ... in mainline u-boot
112  * - block 1 for UBL (plus up to four backup copies in blocks 2..5)
113  * - blocks 6...? for u-boot
114  * - blocks 16..23 for u-boot environment ... in TI's u-boot
115  */
116  {
117  .name = "bootloader",
118  .offset = 0,
119  .size = SZ_256K + SZ_128K,
120  .mask_flags = MTD_WRITEABLE, /* force read-only */
121  },
122  /* Kernel */
123  {
124  .name = "kernel",
125  .offset = MTDPART_OFS_APPEND,
126  .size = SZ_4M,
127  .mask_flags = 0,
128  },
129  /* File system (older GIT kernels started this on the 5MB mark) */
130  {
131  .name = "filesystem",
132  .offset = MTDPART_OFS_APPEND,
133  .size = MTDPART_SIZ_FULL,
134  .mask_flags = 0,
135  }
136  /* A few blocks at end hold a flash BBT ... created by TI's CCS
137  * using flashwriter_nand.out, but ignored by TI's versions of
138  * Linux and u-boot. We boot faster by using them.
139  */
140 };
141 
142 static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
143  .wsetup = 20,
144  .wstrobe = 40,
145  .whold = 20,
146  .rsetup = 10,
147  .rstrobe = 40,
148  .rhold = 10,
149  .ta = 40,
150 };
151 
152 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
153  .parts = davinci_evm_nandflash_partition,
154  .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
155  .ecc_mode = NAND_ECC_HW,
156  .bbt_options = NAND_BBT_USE_FLASH,
157  .timing = &davinci_evm_nandflash_timing,
158 };
159 
160 static struct resource davinci_evm_nandflash_resource[] = {
161  {
164  .flags = IORESOURCE_MEM,
165  }, {
168  .flags = IORESOURCE_MEM,
169  },
170 };
171 
172 static struct platform_device davinci_evm_nandflash_device = {
173  .name = "davinci_nand",
174  .id = 0,
175  .dev = {
176  .platform_data = &davinci_evm_nandflash_data,
177  },
178  .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
179  .resource = davinci_evm_nandflash_resource,
180 };
181 
182 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
183 
184 static struct platform_device davinci_fb_device = {
185  .name = "davincifb",
186  .id = -1,
187  .dev = {
188  .dma_mask = &davinci_fb_dma_mask,
189  .coherent_dma_mask = DMA_BIT_MASK(32),
190  },
191  .num_resources = 0,
192 };
193 
194 static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
195  .clk_polarity = 0,
196  .hs_polarity = 1,
197  .vs_polarity = 1
198 };
199 
200 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
201 /* Inputs available at the TVP5146 */
202 static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
203  {
204  .index = 0,
205  .name = "Composite",
206  .type = V4L2_INPUT_TYPE_CAMERA,
207  .std = TVP514X_STD_ALL,
208  },
209  {
210  .index = 1,
211  .name = "S-Video",
212  .type = V4L2_INPUT_TYPE_CAMERA,
213  .std = TVP514X_STD_ALL,
214  },
215 };
216 
217 /*
218  * this is the route info for connecting each input to decoder
219  * ouput that goes to vpfe. There is a one to one correspondence
220  * with tvp5146_inputs
221  */
222 static struct vpfe_route dm644xevm_tvp5146_routes[] = {
223  {
224  .input = INPUT_CVBS_VI2B,
226  },
227  {
228  .input = INPUT_SVIDEO_VI2C_VI1C,
230  },
231 };
232 
233 static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
234  {
235  .name = "tvp5146",
236  .grp_id = 0,
237  .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
238  .inputs = dm644xevm_tvp5146_inputs,
239  .routes = dm644xevm_tvp5146_routes,
240  .can_route = 1,
241  .ccdc_if_params = {
242  .if_type = VPFE_BT656,
243  .hdpol = VPFE_PINPOL_POSITIVE,
244  .vdpol = VPFE_PINPOL_POSITIVE,
245  },
246  .board_info = {
247  I2C_BOARD_INFO("tvp5146", 0x5d),
248  .platform_data = &dm644xevm_tvp5146_pdata,
249  },
250  },
251 };
252 
253 static struct vpfe_config dm644xevm_capture_cfg = {
254  .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
255  .i2c_adapter_id = 1,
256  .sub_devs = dm644xevm_vpfe_sub_devs,
257  .card_name = "DM6446 EVM",
258  .ccdc = "DM6446 CCDC",
259 };
260 
261 static struct platform_device rtc_dev = {
262  .name = "rtc_davinci_evm",
263  .id = -1,
264 };
265 
266 static struct snd_platform_data dm644x_evm_snd_data;
267 
268 /*----------------------------------------------------------------------*/
269 
270 /*
271  * I2C GPIO expanders
272  */
273 
274 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
275 
276 
277 /* U2 -- LEDs */
278 
279 static struct gpio_led evm_leds[] = {
280  { .name = "DS8", .active_low = 1,
281  .default_trigger = "heartbeat", },
282  { .name = "DS7", .active_low = 1, },
283  { .name = "DS6", .active_low = 1, },
284  { .name = "DS5", .active_low = 1, },
285  { .name = "DS4", .active_low = 1, },
286  { .name = "DS3", .active_low = 1, },
287  { .name = "DS2", .active_low = 1,
288  .default_trigger = "mmc0", },
289  { .name = "DS1", .active_low = 1,
290  .default_trigger = "ide-disk", },
291 };
292 
293 static const struct gpio_led_platform_data evm_led_data = {
294  .num_leds = ARRAY_SIZE(evm_leds),
295  .leds = evm_leds,
296 };
297 
298 static struct platform_device *evm_led_dev;
299 
300 static int
301 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
302 {
303  struct gpio_led *leds = evm_leds;
304  int status;
305 
306  while (ngpio--) {
307  leds->gpio = gpio++;
308  leds++;
309  }
310 
311  /* what an extremely annoying way to be forced to handle
312  * device unregistration ...
313  */
314  evm_led_dev = platform_device_alloc("leds-gpio", 0);
315  platform_device_add_data(evm_led_dev,
316  &evm_led_data, sizeof evm_led_data);
317 
318  evm_led_dev->dev.parent = &client->dev;
319  status = platform_device_add(evm_led_dev);
320  if (status < 0) {
321  platform_device_put(evm_led_dev);
322  evm_led_dev = NULL;
323  }
324  return status;
325 }
326 
327 static int
328 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
329 {
330  if (evm_led_dev) {
331  platform_device_unregister(evm_led_dev);
332  evm_led_dev = NULL;
333  }
334  return 0;
335 }
336 
337 static struct pcf857x_platform_data pcf_data_u2 = {
338  .gpio_base = PCF_Uxx_BASE(0),
339  .setup = evm_led_setup,
340  .teardown = evm_led_teardown,
341 };
342 
343 
344 /* U18 - A/V clock generator and user switch */
345 
346 static int sw_gpio;
347 
348 static ssize_t
349 sw_show(struct device *d, struct device_attribute *a, char *buf)
350 {
351  char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
352 
353  strcpy(buf, s);
354  return strlen(s);
355 }
356 
357 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
358 
359 static int
360 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
361 {
362  int status;
363 
364  /* export dip switch option */
365  sw_gpio = gpio + 7;
366  status = gpio_request(sw_gpio, "user_sw");
367  if (status == 0)
368  status = gpio_direction_input(sw_gpio);
369  if (status == 0)
370  status = device_create_file(&client->dev, &dev_attr_user_sw);
371  else
372  gpio_free(sw_gpio);
373  if (status != 0)
374  sw_gpio = -EINVAL;
375 
376  /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
377  gpio_request(gpio + 3, "pll_fs2");
378  gpio_direction_output(gpio + 3, 0);
379 
380  gpio_request(gpio + 2, "pll_fs1");
381  gpio_direction_output(gpio + 2, 0);
382 
383  gpio_request(gpio + 1, "pll_sr");
384  gpio_direction_output(gpio + 1, 0);
385 
386  return 0;
387 }
388 
389 static int
390 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
391 {
392  gpio_free(gpio + 1);
393  gpio_free(gpio + 2);
394  gpio_free(gpio + 3);
395 
396  if (sw_gpio > 0) {
397  device_remove_file(&client->dev, &dev_attr_user_sw);
398  gpio_free(sw_gpio);
399  }
400  return 0;
401 }
402 
403 static struct pcf857x_platform_data pcf_data_u18 = {
404  .gpio_base = PCF_Uxx_BASE(1),
405  .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
406  .setup = evm_u18_setup,
407  .teardown = evm_u18_teardown,
408 };
409 
410 
411 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
412 
413 static int
414 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
415 {
416  /* p0 = nDRV_VBUS (initial: don't supply it) */
417  gpio_request(gpio + 0, "nDRV_VBUS");
418  gpio_direction_output(gpio + 0, 1);
419 
420  /* p1 = VDDIMX_EN */
421  gpio_request(gpio + 1, "VDDIMX_EN");
422  gpio_direction_output(gpio + 1, 1);
423 
424  /* p2 = VLYNQ_EN */
425  gpio_request(gpio + 2, "VLYNQ_EN");
426  gpio_direction_output(gpio + 2, 1);
427 
428  /* p3 = n3V3_CF_RESET (initial: stay in reset) */
429  gpio_request(gpio + 3, "nCF_RESET");
430  gpio_direction_output(gpio + 3, 0);
431 
432  /* (p4 unused) */
433 
434  /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
435  gpio_request(gpio + 5, "WLAN_RESET");
436  gpio_direction_output(gpio + 5, 1);
437 
438  /* p6 = nATA_SEL (initial: select) */
439  gpio_request(gpio + 6, "nATA_SEL");
440  gpio_direction_output(gpio + 6, 0);
441 
442  /* p7 = nCF_SEL (initial: deselect) */
443  gpio_request(gpio + 7, "nCF_SEL");
444  gpio_direction_output(gpio + 7, 1);
445 
446  return 0;
447 }
448 
449 static int
450 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
451 {
452  gpio_free(gpio + 7);
453  gpio_free(gpio + 6);
454  gpio_free(gpio + 5);
455  gpio_free(gpio + 3);
456  gpio_free(gpio + 2);
457  gpio_free(gpio + 1);
458  gpio_free(gpio + 0);
459  return 0;
460 }
461 
462 static struct pcf857x_platform_data pcf_data_u35 = {
463  .gpio_base = PCF_Uxx_BASE(2),
464  .setup = evm_u35_setup,
465  .teardown = evm_u35_teardown,
466 };
467 
468 /*----------------------------------------------------------------------*/
469 
470 /* Most of this EEPROM is unused, but U-Boot uses some data:
471  * - 0x7f00, 6 bytes Ethernet Address
472  * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
473  * - ... newer boards may have more
474  */
475 
476 static struct at24_platform_data eeprom_info = {
477  .byte_len = (256*1024) / 8,
478  .page_size = 64,
481  .context = (void *)0x7f00,
482 };
483 
484 /*
485  * MSP430 supports RTC, card detection, input from IR remote, and
486  * a bit more. It triggers interrupts on GPIO(7) from pressing
487  * buttons on the IR remote, and for card detect switches.
488  */
489 static struct i2c_client *dm6446evm_msp;
490 
491 static int dm6446evm_msp_probe(struct i2c_client *client,
492  const struct i2c_device_id *id)
493 {
494  dm6446evm_msp = client;
495  return 0;
496 }
497 
498 static int dm6446evm_msp_remove(struct i2c_client *client)
499 {
500  dm6446evm_msp = NULL;
501  return 0;
502 }
503 
504 static const struct i2c_device_id dm6446evm_msp_ids[] = {
505  { "dm6446evm_msp", 0, },
506  { /* end of list */ },
507 };
508 
509 static struct i2c_driver dm6446evm_msp_driver = {
510  .driver.name = "dm6446evm_msp",
511  .id_table = dm6446evm_msp_ids,
512  .probe = dm6446evm_msp_probe,
513  .remove = dm6446evm_msp_remove,
514 };
515 
516 static int dm6444evm_msp430_get_pins(void)
517 {
518  static const char txbuf[2] = { 2, 4, };
519  char buf[4];
520  struct i2c_msg msg[2] = {
521  {
522  .addr = dm6446evm_msp->addr,
523  .flags = 0,
524  .len = 2,
525  .buf = (void __force *)txbuf,
526  },
527  {
528  .addr = dm6446evm_msp->addr,
529  .flags = I2C_M_RD,
530  .len = 4,
531  .buf = buf,
532  },
533  };
534  int status;
535 
536  if (!dm6446evm_msp)
537  return -ENXIO;
538 
539  /* Command 4 == get input state, returns port 2 and port3 data
540  * S Addr W [A] len=2 [A] cmd=4 [A]
541  * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
542  */
543  status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
544  if (status < 0)
545  return status;
546 
547  dev_dbg(&dm6446evm_msp->dev,
548  "PINS: %02x %02x %02x %02x\n",
549  buf[0], buf[1], buf[2], buf[3]);
550 
551  return (buf[3] << 8) | buf[2];
552 }
553 
554 static int dm6444evm_mmc_get_cd(int module)
555 {
556  int status = dm6444evm_msp430_get_pins();
557 
558  return (status < 0) ? status : !(status & BIT(1));
559 }
560 
561 static int dm6444evm_mmc_get_ro(int module)
562 {
563  int status = dm6444evm_msp430_get_pins();
564 
565  return (status < 0) ? status : status & BIT(6 + 8);
566 }
567 
568 static struct davinci_mmc_config dm6446evm_mmc_config = {
569  .get_cd = dm6444evm_mmc_get_cd,
570  .get_ro = dm6444evm_mmc_get_ro,
571  .wires = 4,
572  .version = MMC_CTLR_VERSION_1
573 };
574 
575 static struct i2c_board_info __initdata i2c_info[] = {
576  {
577  I2C_BOARD_INFO("dm6446evm_msp", 0x23),
578  },
579  {
580  I2C_BOARD_INFO("pcf8574", 0x38),
581  .platform_data = &pcf_data_u2,
582  },
583  {
584  I2C_BOARD_INFO("pcf8574", 0x39),
585  .platform_data = &pcf_data_u18,
586  },
587  {
588  I2C_BOARD_INFO("pcf8574", 0x3a),
589  .platform_data = &pcf_data_u35,
590  },
591  {
592  I2C_BOARD_INFO("24c256", 0x50),
593  .platform_data = &eeprom_info,
594  },
595  {
596  I2C_BOARD_INFO("tlv320aic33", 0x1b),
597  },
598 };
599 
600 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
601  * which requires 100 usec of idle bus after i2c writes sent to it.
602  */
603 static struct davinci_i2c_platform_data i2c_pdata = {
604  .bus_freq = 20 /* kHz */,
605  .bus_delay = 100 /* usec */,
606  .sda_pin = 44,
607  .scl_pin = 43,
608 };
609 
610 static void __init evm_init_i2c(void)
611 {
612  davinci_init_i2c(&i2c_pdata);
613  i2c_add_driver(&dm6446evm_msp_driver);
614  i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
615 }
616 
617 #define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
618 
619 /* venc standard timings */
620 static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
621  {
622  .name = "ntsc",
623  .timings_type = VPBE_ENC_STD,
624  .std_id = V4L2_STD_525_60,
625  .interlaced = 1,
626  .xres = 720,
627  .yres = 480,
628  .aspect = {11, 10},
629  .fps = {30000, 1001},
630  .left_margin = 0x79,
631  .upper_margin = 0x10,
632  },
633  {
634  .name = "pal",
635  .timings_type = VPBE_ENC_STD,
636  .std_id = V4L2_STD_625_50,
637  .interlaced = 1,
638  .xres = 720,
639  .yres = 576,
640  .aspect = {54, 59},
641  .fps = {25, 1},
642  .left_margin = 0x7e,
643  .upper_margin = 0x16,
644  },
645 };
646 
647 /* venc dv preset timings */
648 static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
649  {
650  .name = "480p59_94",
651  .timings_type = VPBE_ENC_CUSTOM_TIMINGS,
652  .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
653  .interlaced = 0,
654  .xres = 720,
655  .yres = 480,
656  .aspect = {1, 1},
657  .fps = {5994, 100},
658  .left_margin = 0x80,
659  .upper_margin = 0x20,
660  },
661  {
662  .name = "576p50",
663  .timings_type = VPBE_ENC_CUSTOM_TIMINGS,
664  .dv_timings = V4L2_DV_BT_CEA_720X576P50,
665  .interlaced = 0,
666  .xres = 720,
667  .yres = 576,
668  .aspect = {1, 1},
669  .fps = {50, 1},
670  .left_margin = 0x7e,
671  .upper_margin = 0x30,
672  },
673 };
674 
675 /*
676  * The outputs available from VPBE + encoders. Keep the order same
677  * as that of encoders. First those from venc followed by that from
678  * encoders. Index in the output refers to index on a particular encoder.
679  * Driver uses this index to pass it to encoder when it supports more
680  * than one output. Userspace applications use index of the array to
681  * set an output.
682  */
683 static struct vpbe_output dm644xevm_vpbe_outputs[] = {
684  {
685  .output = {
686  .index = 0,
687  .name = "Composite",
688  .type = V4L2_OUTPUT_TYPE_ANALOG,
689  .std = VENC_STD_ALL,
690  .capabilities = V4L2_OUT_CAP_STD,
691  },
692  .subdev_name = VPBE_VENC_SUBDEV_NAME,
693  .default_mode = "ntsc",
694  .num_modes = ARRAY_SIZE(dm644xevm_enc_std_timing),
695  .modes = dm644xevm_enc_std_timing,
696  },
697  {
698  .output = {
699  .index = 1,
700  .name = "Component",
701  .type = V4L2_OUTPUT_TYPE_ANALOG,
702  .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
703  },
704  .subdev_name = VPBE_VENC_SUBDEV_NAME,
705  .default_mode = "480p59_94",
706  .num_modes = ARRAY_SIZE(dm644xevm_enc_preset_timing),
707  .modes = dm644xevm_enc_preset_timing,
708  },
709 };
710 
711 static struct vpbe_config dm644xevm_display_cfg = {
712  .module_name = "dm644x-vpbe-display",
713  .i2c_adapter_id = 1,
714  .osd = {
715  .module_name = VPBE_OSD_SUBDEV_NAME,
716  },
717  .venc = {
718  .module_name = VPBE_VENC_SUBDEV_NAME,
719  },
720  .num_outputs = ARRAY_SIZE(dm644xevm_vpbe_outputs),
721  .outputs = dm644xevm_vpbe_outputs,
722 };
723 
724 static struct platform_device *davinci_evm_devices[] __initdata = {
725  &davinci_fb_device,
726  &rtc_dev,
727 };
728 
729 static struct davinci_uart_config uart_config __initdata = {
730  .enabled_uarts = (1 << 0),
731 };
732 
733 static void __init
734 davinci_evm_map_io(void)
735 {
736  dm644x_init();
737 }
738 
739 static int davinci_phy_fixup(struct phy_device *phydev)
740 {
741  unsigned int control;
742  /* CRITICAL: Fix for increasing PHY signal drive strength for
743  * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
744  * signal strength was low causing TX to fail randomly. The
745  * fix is to Set bit 11 (Increased MII drive strength) of PHY
746  * register 26 (Digital Config register) on this phy. */
747  control = phy_read(phydev, 26);
748  phy_write(phydev, 26, (control | 0x800));
749  return 0;
750 }
751 
752 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
753  defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
754 #define HAS_ATA 1
755 #else
756 #define HAS_ATA 0
757 #endif
758 
759 #if defined(CONFIG_MTD_PHYSMAP) || \
760  defined(CONFIG_MTD_PHYSMAP_MODULE)
761 #define HAS_NOR 1
762 #else
763 #define HAS_NOR 0
764 #endif
765 
766 #if defined(CONFIG_MTD_NAND_DAVINCI) || \
767  defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
768 #define HAS_NAND 1
769 #else
770 #define HAS_NAND 0
771 #endif
772 
773 static __init void davinci_evm_init(void)
774 {
775  struct clk *aemif_clk;
776  struct davinci_soc_info *soc_info = &davinci_soc_info;
777 
778  aemif_clk = clk_get(NULL, "aemif");
779  clk_enable(aemif_clk);
780 
781  if (HAS_ATA) {
782  if (HAS_NAND || HAS_NOR)
783  pr_warning("WARNING: both IDE and Flash are "
784  "enabled, but they share AEMIF pins.\n"
785  "\tDisable IDE for NAND/NOR support.\n");
787  } else if (HAS_NAND || HAS_NOR) {
790 
791  /* only one device will be jumpered and detected */
792  if (HAS_NAND) {
793  platform_device_register(&davinci_evm_nandflash_device);
794  evm_leds[7].default_trigger = "nand-disk";
795  if (HAS_NOR)
796  pr_warning("WARNING: both NAND and NOR flash "
797  "are enabled; disable one of them.\n");
798  } else if (HAS_NOR)
799  platform_device_register(&davinci_evm_norflash_device);
800  }
801 
802  platform_add_devices(davinci_evm_devices,
803  ARRAY_SIZE(davinci_evm_devices));
804  evm_init_i2c();
805 
806  davinci_setup_mmc(0, &dm6446evm_mmc_config);
807  dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
808 
809  davinci_serial_init(&uart_config);
810  dm644x_init_asp(&dm644x_evm_snd_data);
811 
812  /* irlml6401 switches over 1A, in under 8 msec */
813  davinci_setup_usb(1000, 8);
814 
815  soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
816  /* Register the fixup for PHY on DaVinci */
818  davinci_phy_fixup);
819 
820 }
821 
822 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
823  /* Maintainer: MontaVista Software <[email protected]> */
824  .atag_offset = 0x100,
825  .map_io = davinci_evm_map_io,
826  .init_irq = davinci_irq_init,
827  .timer = &davinci_timer,
828  .init_machine = davinci_evm_init,
829  .init_late = davinci_init_late,
830  .dma_zone_size = SZ_128M,
831  .restart = davinci_restart,