|
#define | pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
|
#define | READ_RADIO_REG2(pi, radio_type, jspace, core, reg_name) |
|
#define | WRITE_RADIO_REG2(pi, radio_type, jspace, core, reg_name, value) |
|
#define | WRITE_RADIO_SYN(pi, radio_type, reg_name, value) write_radio_reg(pi, radio_type##_##SYN##_##reg_name, value) |
|
#define | READ_RADIO_REG3(pi, radio_type, jspace, core, reg_name) |
|
#define | WRITE_RADIO_REG3(pi, radio_type, jspace, core, reg_name, value) |
|
#define | READ_RADIO_REG4(pi, radio_type, jspace, core, reg_name) |
|
#define | WRITE_RADIO_REG4(pi, radio_type, jspace, core, reg_name, value) |
|
#define | NPHY_ACI_MAX_UNDETECT_WINDOW_SZ 40 |
|
#define | NPHY_ACI_CHANNEL_DELTA 5 |
|
#define | NPHY_ACI_CHANNEL_SKIP 4 |
|
#define | NPHY_ACI_40MHZ_CHANNEL_DELTA 6 |
|
#define | NPHY_ACI_40MHZ_CHANNEL_SKIP 5 |
|
#define | NPHY_ACI_40MHZ_CHANNEL_DELTA_GE_REV3 6 |
|
#define | NPHY_ACI_40MHZ_CHANNEL_SKIP_GE_REV3 5 |
|
#define | NPHY_ACI_CHANNEL_DELTA_GE_REV3 4 |
|
#define | NPHY_ACI_CHANNEL_SKIP_GE_REV3 3 |
|
#define | NPHY_NOISE_NOASSOC_GLITCH_TH_UP 2 |
|
#define | NPHY_NOISE_NOASSOC_GLITCH_TH_DN 8 |
|
#define | NPHY_NOISE_ASSOC_GLITCH_TH_UP 2 |
|
#define | NPHY_NOISE_ASSOC_GLITCH_TH_DN 8 |
|
#define | NPHY_NOISE_ASSOC_ACI_GLITCH_TH_UP 2 |
|
#define | NPHY_NOISE_ASSOC_ACI_GLITCH_TH_DN 8 |
|
#define | NPHY_NOISE_NOASSOC_ENTER_TH 400 |
|
#define | NPHY_NOISE_ASSOC_ENTER_TH 400 |
|
#define | NPHY_NOISE_ASSOC_RX_GLITCH_BADPLCP_ENTER_TH 400 |
|
#define | NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX 44 |
|
#define | NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX_REV_7 56 |
|
#define | NPHY_NOISE_NOASSOC_CRSIDX_INCR 16 |
|
#define | NPHY_NOISE_ASSOC_CRSIDX_INCR 8 |
|
#define | NPHY_IS_SROM_REINTERPRET NREV_GE(pi->pubpi.phy_rev, 5) |
|
#define | NPHY_RSSICAL_MAXREAD 31 |
|
#define | NPHY_RSSICAL_NPOLL 8 |
|
#define | NPHY_RSSICAL_MAXD (1<<20) |
|
#define | NPHY_MIN_RXIQ_PWR 2 |
|
#define | NPHY_RSSICAL_W1_TARGET 25 |
|
#define | NPHY_RSSICAL_W2_TARGET NPHY_RSSICAL_W1_TARGET |
|
#define | NPHY_RSSICAL_NB_TARGET 0 |
|
#define | NPHY_RSSICAL_W1_TARGET_REV3 29 |
|
#define | NPHY_RSSICAL_W2_TARGET_REV3 NPHY_RSSICAL_W1_TARGET_REV3 |
|
#define | NPHY_CALSANITY_RSSI_NB_MAX_POS 9 |
|
#define | NPHY_CALSANITY_RSSI_NB_MAX_NEG -9 |
|
#define | NPHY_CALSANITY_RSSI_W1_MAX_POS 12 |
|
#define | NPHY_CALSANITY_RSSI_W1_MAX_NEG |
|
#define | NPHY_CALSANITY_RSSI_W2_MAX_POS NPHY_CALSANITY_RSSI_W1_MAX_POS |
|
#define | NPHY_CALSANITY_RSSI_W2_MAX_NEG |
|
#define | NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f))) |
|
#define | NPHY_RSSI_NB_VIOL(x) |
|
#define | NPHY_RSSI_W1_VIOL(x) |
|
#define | NPHY_RSSI_W2_VIOL(x) |
|
#define | NPHY_IQCAL_NUMGAINS 9 |
|
#define | NPHY_N_GCTL 0x66 |
|
#define | NPHY_PAPD_EPS_TBL_SIZE 64 |
|
#define | NPHY_PAPD_SCL_TBL_SIZE 64 |
|
#define | NPHY_NUM_DIG_FILT_COEFFS 15 |
|
#define | NPHY_PAPD_COMP_OFF 0 |
|
#define | NPHY_PAPD_COMP_ON 1 |
|
#define | NPHY_SROM_TEMPSHIFT 32 |
|
#define | NPHY_SROM_MAXTEMPOFFSET 16 |
|
#define | NPHY_SROM_MINTEMPOFFSET -16 |
|
#define | NPHY_CAL_MAXTEMPDELTA 64 |
|
#define | NPHY_NOISEVAR_TBLLEN40 256 |
|
#define | NPHY_NOISEVAR_TBLLEN20 128 |
|
#define | NPHY_ANARXLPFBW_REDUCTIONFACT 7 |
|
#define | NPHY_ADJUSTED_MINCRSPOWER 0x1e |
|
#define | CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ |
|
#define | CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ |
|
#define | NPHY_CAL_TSSISAMPS 64 |
|
#define | NPHY_TEST_TONE_FREQ_40MHz 4000 |
|
#define | NPHY_TEST_TONE_FREQ_20MHz 2500 |
|
#define | MAX_205x_RCAL_WAITLOOPS 10000 |
|
#define | NPHY_RXCAL_TONEAMP 181 |
|
#define | NPHY_RXCAL_TONEFREQ_40MHz 4000 |
|
#define | NPHY_RXCAL_TONEFREQ_20MHz 2000 |
|
#define | TXFILT_SHAPING_OFDM20 0 |
|
#define | TXFILT_SHAPING_OFDM40 1 |
|
#define | TXFILT_SHAPING_CCK 2 |
|
#define | TXFILT_DEFAULT_OFDM20 3 |
|
#define | TXFILT_DEFAULT_OFDM40 4 |
|
#define | NPHY_IPA_RXCAL_MAXGAININDEX (6 - 1) |
|
#define | wlc_phy_get_papd_nphy(pi) |
|
#define | CAL_RETRY_CNT 2 |
|
#define | WAIT_FOR_SCOPE 4000 |
|
|
bool | wlc_phy_bist_check_phy (struct brcms_phy_pub *pih) |
|
void | wlc_phy_table_write_nphy (struct brcms_phy *pi, u32 id, u32 len, u32 offset, u32 width, const void *data) |
|
void | wlc_phy_table_read_nphy (struct brcms_phy *pi, u32 id, u32 len, u32 offset, u32 width, void *data) |
|
void | wlc_phy_nphy_tkip_rifs_war (struct brcms_phy *pi, u8 rifs) |
|
bool | wlc_phy_attach_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_cal_txgainctrl_nphy (struct brcms_phy *pi, s32 dBm_targetpower, bool debug) |
|
void | wlc_phy_init_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_pa_override_nphy (struct brcms_phy *pi, bool en) |
|
void | wlc_phy_stf_chain_upd_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_rxcore_setstate_nphy (struct brcms_phy_pub *pih, u8 rxcore_bitmask) |
|
u8 | wlc_phy_rxcore_getstate_nphy (struct brcms_phy_pub *pih) |
|
bool | wlc_phy_n_txpower_ipa_ison (struct brcms_phy *pi) |
|
void | wlc_phy_cal_init_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_switch_radio_nphy (struct brcms_phy *pi, bool on) |
|
u8 | wlc_phy_get_chan_freq_range_nphy (struct brcms_phy *pi, uint channel) |
|
void | wlc_phy_radio205x_vcocal_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_chanspec_set_nphy (struct brcms_phy *pi, u16 chanspec) |
|
void | wlc_phy_antsel_init (struct brcms_phy_pub *ppi, bool lut_init) |
|
u16 | wlc_phy_classifier_nphy (struct brcms_phy *pi, u16 mask, u16 val) |
|
void | wlc_phy_force_rfseq_nphy (struct brcms_phy *pi, u8 cmd) |
|
void | wlc_phy_rssisel_nphy (struct brcms_phy *pi, u8 core_code, u8 rssi_type) |
|
int | wlc_phy_poll_rssi_nphy (struct brcms_phy *pi, u8 rssi_type, s32 *rssi_buf, u8 nsamps) |
|
s16 | wlc_phy_tempsense_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_rssi_cal_nphy (struct brcms_phy *pi) |
|
int | wlc_phy_rssi_compute_nphy (struct brcms_phy *pi, struct d11rxhdr *rxh) |
|
int | wlc_phy_tx_tone_nphy (struct brcms_phy *pi, u32 f_kHz, u16 max_val, u8 iqmode, u8 dac_test_mode, bool modify_bbmult) |
|
void | wlc_phy_stopplayback_nphy (struct brcms_phy *pi) |
|
struct nphy_txgains | wlc_phy_get_tx_gain_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_est_tonepwr_nphy (struct brcms_phy *pi, s32 *qdBm_pwrbuf, u8 num_samps) |
|
void | wlc_phy_cal_perical_nphy_run (struct brcms_phy *pi, u8 caltype) |
|
int | wlc_phy_cal_txiqlo_nphy (struct brcms_phy *pi, struct nphy_txgains target_gain, bool fullcal, bool mphase) |
|
void | wlc_phy_rx_iq_coeffs_nphy (struct brcms_phy *pi, u8 write, struct nphy_iq_comp *pcomp) |
|
void | wlc_phy_rx_iq_est_nphy (struct brcms_phy *pi, struct phy_iq_est *est, u16 num_samps, u8 wait_time, u8 wait_for_crs) |
|
int | wlc_phy_cal_rxiq_nphy (struct brcms_phy *pi, struct nphy_txgains target_gain, u8 cal_type, bool debug) |
|
void | wlc_phy_txpwr_fixpower_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_ofdm_to_mcs_powers_nphy (u8 *power, u8 rate_mcs_start, u8 rate_mcs_end, u8 rate_ofdm_start) |
|
void | wlc_phy_mcs_to_ofdm_powers_nphy (u8 *power, u8 rate_ofdm_start, u8 rate_ofdm_end, u8 rate_mcs_start) |
|
void | wlc_phy_txpwr_apply_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_txpower_recalc_target_nphy (struct brcms_phy *pi) |
|
u16 | wlc_phy_txpwr_idx_get_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_txpwr_papd_cal_nphy (struct brcms_phy *pi) |
|
void | wlc_phy_txpwrctrl_enable_nphy (struct brcms_phy *pi, u8 ctrl_type) |
|
void | wlc_phy_txpwr_index_nphy (struct brcms_phy *pi, u8 core_mask, s8 txpwrindex, bool restore_cals) |
|
void | wlc_phy_txpower_sromlimit_get_nphy (struct brcms_phy *pi, uint chan, u8 *max_pwr, u8 txp_rate_idx) |
|
void | wlc_phy_stay_in_carriersearch_nphy (struct brcms_phy *pi, bool enable) |
|
void | wlc_nphy_deaf_mode (struct brcms_phy *pi, bool mode) |
|