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Linux Kernel
3.7.1
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All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
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Linux Kernel
3.7.1
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#include <linux/init.h>#include <linux/interrupt.h>#include <linux/pci.h>#include <linux/slab.h>#include <linux/module.h>#include <linux/bitops.h>#include <asm/io.h>#include <sound/core.h>#include <sound/pcm.h>#include <sound/pcm_params.h>#include <sound/control.h>#include <sound/initval.h>Go to the source code of this file.
Data Structures | |
| struct | snd_bt87x_board |
| struct | snd_bt87x |
Macros | |
| #define | REG_INT_STAT 0x100 /* interrupt status */ |
| #define | REG_INT_MASK 0x104 /* interrupt mask */ |
| #define | REG_GPIO_DMA_CTL 0x10c /* audio control */ |
| #define | REG_PACKET_LEN 0x110 /* audio packet lengths */ |
| #define | REG_RISC_STRT_ADD 0x114 /* RISC program start address */ |
| #define | REG_RISC_COUNT 0x120 /* RISC program counter */ |
| #define | INT_OFLOW (1 << 3) /* audio A/D overflow */ |
| #define | INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */ |
| #define | INT_FBUS (1 << 12) /* FIFO overrun due to bus access latency */ |
| #define | INT_FTRGT (1 << 13) /* FIFO overrun due to target latency */ |
| #define | INT_FDSR (1 << 14) /* FIFO data stream resynchronization */ |
| #define | INT_PPERR (1 << 15) /* PCI parity error */ |
| #define | INT_RIPERR (1 << 16) /* RISC instruction parity error */ |
| #define | INT_PABORT (1 << 17) /* PCI master or target abort */ |
| #define | INT_OCERR (1 << 18) /* invalid opcode */ |
| #define | INT_SCERR (1 << 19) /* sync counter overflow */ |
| #define | INT_RISC_EN (1 << 27) /* DMA controller running */ |
| #define | INT_RISCS_SHIFT 28 /* RISC status bits */ |
| #define | CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */ |
| #define | CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */ |
| #define | CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */ |
| #define | CTL_PKTP_8 (1 << 2) /* 8 DWORDs */ |
| #define | CTL_PKTP_16 (2 << 2) /* 16 DWORDs */ |
| #define | CTL_ACAP_EN (1 << 4) /* enable audio capture */ |
| #define | CTL_DA_APP (1 << 5) /* GPIO input */ |
| #define | CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */ |
| #define | CTL_DA_IOM_DA (1 << 6) /* digital audio input */ |
| #define | CTL_DA_SDR_SHIFT 8 /* DDF first stage decimation rate */ |
| #define | CTL_DA_SDR_MASK (0xf<< 8) |
| #define | CTL_DA_LMT (1 << 12) /* limit audio data values */ |
| #define | CTL_DA_ES2 (1 << 13) /* enable DDF stage 2 */ |
| #define | CTL_DA_SBR (1 << 14) /* samples rounded to 8 bits */ |
| #define | CTL_DA_DPM (1 << 15) /* data packet mode */ |
| #define | CTL_DA_LRD_SHIFT 16 /* ALRCK delay */ |
| #define | CTL_DA_MLB (1 << 21) /* MSB/LSB format */ |
| #define | CTL_DA_LRI (1 << 22) /* left/right indication */ |
| #define | CTL_DA_SCE (1 << 23) /* sample clock edge */ |
| #define | CTL_A_SEL_STV (0 << 24) /* TV tuner audio input */ |
| #define | CTL_A_SEL_SFM (1 << 24) /* FM audio input */ |
| #define | CTL_A_SEL_SML (2 << 24) /* mic/line audio input */ |
| #define | CTL_A_SEL_SMXC (3 << 24) /* MUX bypass */ |
| #define | CTL_A_SEL_SHIFT 24 |
| #define | CTL_A_SEL_MASK (3 << 24) |
| #define | CTL_A_PWRDN (1 << 26) /* analog audio power-down */ |
| #define | CTL_A_G2X (1 << 27) /* audio gain boost */ |
| #define | CTL_A_GAIN_SHIFT 28 /* audio input gain */ |
| #define | CTL_A_GAIN_MASK (0xf<<28) |
| #define | RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */ |
| #define | RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */ |
| #define | RISC_SKIP (0x2 << 28) /* skip FIFO data */ |
| #define | RISC_JUMP (0x7 << 28) /* jump to address */ |
| #define | RISC_SYNC (0x8 << 28) /* synchronize with FIFO */ |
| #define | RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */ |
| #define | RISC_RESYNC ( 1 << 15) /* disable FDSR errors */ |
| #define | RISC_SET_STATUS_SHIFT 16 /* set status bits */ |
| #define | RISC_RESET_STATUS_SHIFT 20 /* clear status bits */ |
| #define | RISC_IRQ ( 1 << 24) /* interrupt */ |
| #define | RISC_EOL ( 1 << 26) /* end of line */ |
| #define | RISC_SOL ( 1 << 27) /* start of line */ |
| #define | RISC_SYNC_FM1 0x6 |
| #define | RISC_SYNC_VRO 0xc |
| #define | ANALOG_CLOCK 1792000 |
| #define | CLOCK_DIV_MIN 4 |
| #define | CLOCK_DIV_MAX 15 |
| #define | ERROR_INTERRUPTS |
| #define | MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS) |
| #define | MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8) |
| #define | snd_bt87x_capture_boost_info snd_ctl_boolean_mono_info |
| #define | BT_DEVICE(chip, subvend, subdev, id) |
Functions | |
| MODULE_AUTHOR ("Clemens Ladisch <[email protected]>") | |
| MODULE_DESCRIPTION ("Brooktree Bt87x audio driver") | |
| MODULE_LICENSE ("GPL") | |
| MODULE_SUPPORTED_DEVICE ("{{Brooktree,Bt878},""{Brooktree,Bt879}}") | |
| module_param_array (index, int, NULL, 0444) | |
| MODULE_PARM_DESC (index,"Index value for Bt87x soundcard") | |
| module_param_array (id, charp, NULL, 0444) | |
| MODULE_PARM_DESC (id,"ID string for Bt87x soundcard") | |
| module_param_array (enable, bool, NULL, 0444) | |
| MODULE_PARM_DESC (enable,"Enable Bt87x soundcard") | |
| module_param_array (digital_rate, int, NULL, 0444) | |
| MODULE_PARM_DESC (digital_rate,"Digital input rate for Bt87x soundcard") | |
| module_param (load_all, bool, 0444) | |
| MODULE_PARM_DESC (load_all,"Allow to load the non-whitelisted cards") | |
| MODULE_DEVICE_TABLE (pci, snd_bt87x_ids) | |
| module_pci_driver (bt87x_driver) | |
| #define CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */ |
| #define ERROR_INTERRUPTS |
| #define INT_RIPERR (1 << 16) /* RISC instruction parity error */ |
| #define INT_RISC_EN (1 << 27) /* DMA controller running */ |
| #define INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */ |
| #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8) |
| #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS) |
| #define REG_RISC_STRT_ADD 0x114 /* RISC program start address */ |
| #define RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */ |
| #define RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */ |
| #define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */ |
| #define snd_bt87x_capture_boost_info snd_ctl_boolean_mono_info |
| enum snd_bt87x_boardid |
| MODULE_AUTHOR | ( | "Clemens Ladisch <[email protected]>" | ) |
| MODULE_DEVICE_TABLE | ( | pci | , |
| snd_bt87x_ids | |||
| ) |
| MODULE_LICENSE | ( | "GPL" | ) |
| module_param | ( | load_all | , |
| bool | , | ||
| 0444 | |||
| ) |
| MODULE_PARM_DESC | ( | enable | , |
| "Enable Bt87x soundcard" | |||
| ) |
| module_pci_driver | ( | bt87x_driver | ) |
| MODULE_SUPPORTED_DEVICE | ( | "{{Brooktree,Bt878},""{Brooktree,Bt879}}" | ) |
1.8.2