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enum | adapter_pci_regs {
C2_REGS_MAGIC = 0x0000,
C2_REGS_VERS = 0x0008,
C2_REGS_IVN = 0x000C,
C2_REGS_PCI_WINSIZE = 0x0010,
C2_REGS_Q0_QSIZE = 0x0014,
C2_REGS_Q0_MSGSIZE = 0x0018,
C2_REGS_Q0_POOLSTART = 0x001C,
C2_REGS_Q0_SHARED = 0x0020,
C2_REGS_Q1_QSIZE = 0x0024,
C2_REGS_Q1_MSGSIZE = 0x0028,
C2_REGS_Q1_SHARED = 0x0030,
C2_REGS_Q2_QSIZE = 0x0034,
C2_REGS_Q2_MSGSIZE = 0x0038,
C2_REGS_Q2_SHARED = 0x0040,
C2_REGS_ENADDR = 0x004C,
C2_REGS_RDMA_ENADDR = 0x0054,
C2_REGS_HRX_CUR = 0x006C
} |
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enum | pci_regs {
C2_HISR = 0x0000,
C2_DISR = 0x0004,
C2_HIMR = 0x0008,
C2_DIMR = 0x000C,
C2_NISR0 = 0x0010,
C2_NISR1 = 0x0014,
C2_NIMR0 = 0x0018,
C2_NIMR1 = 0x001C,
C2_IDIS = 0x0020,
NES_INT_STAT = 0x0000,
NES_INT_MASK = 0x0004,
NES_INT_PENDING = 0x0008,
NES_INTF_INT_STAT = 0x000C,
NES_INTF_INT_MASK = 0x0010,
NES_TIMER_STAT = 0x0014,
NES_PERIODIC_CONTROL = 0x0018,
NES_ONE_SHOT_CONTROL = 0x001C,
NES_EEPROM_COMMAND = 0x0020,
NES_EEPROM_DATA = 0x0024,
NES_FLASH_COMMAND = 0x0028,
NES_FLASH_DATA = 0x002C,
NES_SOFTWARE_RESET = 0x0030,
NES_CQ_ACK = 0x0034,
NES_WQE_ALLOC = 0x0040,
NES_CQE_ALLOC = 0x0044,
NES_AEQ_ALLOC = 0x0048
} |
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enum | { C2_PCI_HRX_INT = 1 << 8,
C2_PCI_HTX_INT = 1 << 17,
C2_PCI_HRX_QUI = 1 << 31
} |
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enum | c2_txp_flags { TXP_HTXD_DONE = 0,
TXP_HTXD_READY = 1 << 0,
TXP_HTXD_UNINIT = 1 << 1
} |
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enum | c2_rxp_flags { RXP_HRXD_UNINIT = 0,
RXP_HRXD_READY = 1 << 0,
RXP_HRXD_DONE = 1 << 1
} |
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enum | c2_rxp_status { RXP_HRXD_ZERO = 0,
RXP_HRXD_OK = 1 << 0,
RXP_HRXD_BUF_OV = 1 << 1
} |
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enum | txp_desc { C2_TXP_FLAGS = 0x0000,
C2_TXP_LEN = 0x0002,
C2_TXP_ADDR = 0x0004
} |
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enum | rxp_desc {
C2_RXP_FLAGS = 0x0000,
C2_RXP_STATUS = 0x0002,
C2_RXP_COUNT = 0x0004,
C2_RXP_LEN = 0x0006,
C2_RXP_ADDR = 0x0008
} |
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struct c2_txp_desc | __attribute__ ((packed)) |
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int | c2_register_device (struct c2_dev *c2dev) |
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void | c2_unregister_device (struct c2_dev *c2dev) |
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int | c2_rnic_init (struct c2_dev *c2dev) |
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void | c2_rnic_term (struct c2_dev *c2dev) |
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void | c2_rnic_interrupt (struct c2_dev *c2dev) |
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int | c2_del_addr (struct c2_dev *c2dev, __be32 inaddr, __be32 inmask) |
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int | c2_add_addr (struct c2_dev *c2dev, __be32 inaddr, __be32 inmask) |
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int | c2_alloc_qp (struct c2_dev *c2dev, struct c2_pd *pd, struct ib_qp_init_attr *qp_attrs, struct c2_qp *qp) |
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void | c2_free_qp (struct c2_dev *c2dev, struct c2_qp *qp) |
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struct ib_qp * | c2_get_qp (struct ib_device *device, int qpn) |
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int | c2_qp_modify (struct c2_dev *c2dev, struct c2_qp *qp, struct ib_qp_attr *attr, int attr_mask) |
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int | c2_qp_set_read_limits (struct c2_dev *c2dev, struct c2_qp *qp, int ord, int ird) |
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int | c2_post_send (struct ib_qp *ibqp, struct ib_send_wr *ib_wr, struct ib_send_wr **bad_wr) |
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int | c2_post_receive (struct ib_qp *ibqp, struct ib_recv_wr *ib_wr, struct ib_recv_wr **bad_wr) |
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void __devinit | c2_init_qp_table (struct c2_dev *c2dev) |
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void __devexit | c2_cleanup_qp_table (struct c2_dev *c2dev) |
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void | c2_set_qp_state (struct c2_qp *, int) |
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struct c2_qp * | c2_find_qpn (struct c2_dev *c2dev, int qpn) |
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int | c2_pd_alloc (struct c2_dev *c2dev, int privileged, struct c2_pd *pd) |
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void | c2_pd_free (struct c2_dev *c2dev, struct c2_pd *pd) |
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int __devinit | c2_init_pd_table (struct c2_dev *c2dev) |
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void __devexit | c2_cleanup_pd_table (struct c2_dev *c2dev) |
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int | c2_init_cq (struct c2_dev *c2dev, int entries, struct c2_ucontext *ctx, struct c2_cq *cq) |
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void | c2_free_cq (struct c2_dev *c2dev, struct c2_cq *cq) |
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void | c2_cq_event (struct c2_dev *c2dev, u32 mq_index) |
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void | c2_cq_clean (struct c2_dev *c2dev, struct c2_qp *qp, u32 mq_index) |
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int | c2_poll_cq (struct ib_cq *ibcq, int num_entries, struct ib_wc *entry) |
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int | c2_arm_cq (struct ib_cq *ibcq, enum ib_cq_notify_flags flags) |
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int | c2_llp_connect (struct iw_cm_id *cm_id, struct iw_cm_conn_param *iw_param) |
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int | c2_llp_accept (struct iw_cm_id *cm_id, struct iw_cm_conn_param *iw_param) |
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int | c2_llp_reject (struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len) |
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int | c2_llp_service_create (struct iw_cm_id *cm_id, int backlog) |
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int | c2_llp_service_destroy (struct iw_cm_id *cm_id) |
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int | c2_nsmr_register_phys_kern (struct c2_dev *c2dev, u64 *addr_list, int page_size, int pbl_depth, u32 length, u32 off, u64 *va, enum c2_acf acf, struct c2_mr *mr) |
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int | c2_stag_dealloc (struct c2_dev *c2dev, u32 stag_index) |
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void | c2_ae_event (struct c2_dev *c2dev, u32 mq_index) |
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int | c2_init_mqsp_pool (struct c2_dev *c2dev, gfp_t gfp_mask, struct sp_chunk **root) |
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void | c2_free_mqsp_pool (struct c2_dev *c2dev, struct sp_chunk *root) |
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__be16 * | c2_alloc_mqsp (struct c2_dev *c2dev, struct sp_chunk *head, dma_addr_t *dma_addr, gfp_t gfp_mask) |
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void | c2_free_mqsp (__be16 *mqsp) |
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