#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/skbuff.h>
#include <linux/delay.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/pci.h>
#include <linux/capi.h>
#include <linux/kernelcapi.h>
#include <linux/init.h>
#include <linux/gfp.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <linux/netdevice.h>
#include <linux/isdn/capicmd.h>
#include <linux/isdn/capiutil.h>
#include <linux/isdn/capilli.h>
#include "avmcard.h"

Macros
#define	DC21285_DRAM_A0MR 0x40000000

#define	DC21285_DRAM_A1MR 0x40004000

#define	DC21285_DRAM_A2MR 0x40008000

#define	DC21285_DRAM_A3MR 0x4000C000

#define	CAS_OFFSET 0x88

#define	DC21285_ARMCSR_BASE 0x42000000

#define	PCI_OUT_INT_STATUS 0x30

#define	PCI_OUT_INT_MASK 0x34

#define	MAILBOX_0 0x50

#define	MAILBOX_1 0x54

#define	MAILBOX_2 0x58

#define	MAILBOX_3 0x5C

#define	DOORBELL 0x60

#define	DOORBELL_SETUP 0x64

#define	CHAN_1_CONTROL 0x90

#define	CHAN_2_CONTROL 0xB0

#define	DRAM_TIMING 0x10C

#define	DRAM_ADDR_SIZE_0 0x110

#define	DRAM_ADDR_SIZE_1 0x114

#define	DRAM_ADDR_SIZE_2 0x118

#define	DRAM_ADDR_SIZE_3 0x11C

#define	SA_CONTROL 0x13C

#define	XBUS_CYCLE 0x148

#define	XBUS_STROBE 0x14C

#define	DBELL_PCI_MASK 0x150

#define	DBELL_SA_MASK 0x154

#define	SDRAM_SIZE 0x1000000

#define	MBOX_PEEK_POKE MAILBOX_0

#define	DBELL_ADDR 0x01

#define	DBELL_DATA 0x02

#define	DBELL_RNWR 0x40

#define	DBELL_INIT 0x80

#define	MBOX_UP_ADDR MAILBOX_0

#define	MBOX_UP_LEN MAILBOX_1

#define	MBOX_DOWN_ADDR MAILBOX_2

#define	MBOX_DOWN_LEN MAILBOX_3

#define	DBELL_UP_HOST 0x00000100

#define	DBELL_UP_ARM 0x00000200

#define	DBELL_DOWN_HOST 0x00000400

#define	DBELL_DOWN_ARM 0x00000800

#define	DBELL_RESET_HOST 0x40000000

#define	DBELL_RESET_ARM 0x80000000

#define	DRAM_TIMING_DEF 0x001A01A5

#define	DRAM_AD_SZ_DEF0 0x00000045

#define	DRAM_AD_SZ_NULL 0x00000000

#define	SA_CTL_ALLRIGHT 0x64AA0271

#define	INIT_XBUS_CYCLE 0x100016DB

#define	INIT_XBUS_STROBE 0xF1F1F1F1

#define	RESET_TIMEOUT (15 * HZ) /* 15 sec */

#define	PEEK_POKE_TIMEOUT (HZ / 10) /* 0.1 sec */

#define	c4outmeml(addr, value) writel(value, addr)

#define	c4inmeml(addr) readl(addr)

#define	c4outmemw(addr, value) writew(value, addr)

#define	c4inmemw(addr) readw(addr)

#define	c4outmemb(addr, value) writeb(value, addr)

#define	c4inmemb(addr) readb(addr)

Functions
	MODULE_DEVICE_TABLE (pci, c4_pci_tbl)

	MODULE_DESCRIPTION ("CAPI4Linux: Driver for AVM C2/C4 cards")

	MODULE_AUTHOR ("Carsten Paeth")

	MODULE_LICENSE ("GPL")

	module_param (suppress_pollack, bool, 0)

	module_init (c4_init)

	module_exit (c4_exit)

Macro Definition Documentation

#define c4inmemb ( addr ) readb(addr)

Definition at line 142 of file c4.c.

#define c4inmeml ( addr ) readl(addr)

Definition at line 138 of file c4.c.

#define c4inmemw ( addr ) readw(addr)

Definition at line 140 of file c4.c.

#define c4outmemb	(	addr,
		value
	)	writeb(value, addr)

Definition at line 141 of file c4.c.

#define c4outmeml	(	addr,
		value
	)	writel(value, addr)

Definition at line 137 of file c4.c.

#define c4outmemw	(	addr,
		value
	)	writew(value, addr)

Definition at line 139 of file c4.c.

#define CAS_OFFSET 0x88

Definition at line 68 of file c4.c.

#define CHAN_1_CONTROL 0x90

Definition at line 81 of file c4.c.

#define CHAN_2_CONTROL 0xB0

Definition at line 82 of file c4.c.

#define DBELL_ADDR 0x01

Definition at line 100 of file c4.c.

#define DBELL_DATA 0x02

Definition at line 101 of file c4.c.

#define DBELL_DOWN_ARM 0x00000800

Definition at line 115 of file c4.c.

#define DBELL_DOWN_HOST 0x00000400

Definition at line 114 of file c4.c.

#define DBELL_INIT 0x80

Definition at line 103 of file c4.c.

#define DBELL_PCI_MASK 0x150

Definition at line 91 of file c4.c.

#define DBELL_RESET_ARM 0x80000000

Definition at line 117 of file c4.c.

#define DBELL_RESET_HOST 0x40000000

Definition at line 116 of file c4.c.

#define DBELL_RNWR 0x40

Definition at line 102 of file c4.c.

#define DBELL_SA_MASK 0x154

Definition at line 92 of file c4.c.

#define DBELL_UP_ARM 0x00000200

Definition at line 113 of file c4.c.

#define DBELL_UP_HOST 0x00000100

Definition at line 112 of file c4.c.

#define DC21285_ARMCSR_BASE 0x42000000

Definition at line 70 of file c4.c.

#define DC21285_DRAM_A0MR 0x40000000

Definition at line 63 of file c4.c.

#define DC21285_DRAM_A1MR 0x40004000

Definition at line 64 of file c4.c.

#define DC21285_DRAM_A2MR 0x40008000

Definition at line 65 of file c4.c.

#define DC21285_DRAM_A3MR 0x4000C000

Definition at line 66 of file c4.c.

#define DOORBELL 0x60

Definition at line 78 of file c4.c.

#define DOORBELL_SETUP 0x64

Definition at line 79 of file c4.c.

#define DRAM_AD_SZ_DEF0 0x00000045

Definition at line 122 of file c4.c.

#define DRAM_AD_SZ_NULL 0x00000000

Definition at line 123 of file c4.c.

#define DRAM_ADDR_SIZE_0 0x110

Definition at line 84 of file c4.c.

#define DRAM_ADDR_SIZE_1 0x114

Definition at line 85 of file c4.c.

#define DRAM_ADDR_SIZE_2 0x118

Definition at line 86 of file c4.c.

#define DRAM_ADDR_SIZE_3 0x11C

Definition at line 87 of file c4.c.

#define DRAM_TIMING 0x10C

Definition at line 83 of file c4.c.

#define DRAM_TIMING_DEF 0x001A01A5

Definition at line 121 of file c4.c.

#define INIT_XBUS_CYCLE 0x100016DB

Definition at line 127 of file c4.c.

#define INIT_XBUS_STROBE 0xF1F1F1F1

Definition at line 128 of file c4.c.

#define MAILBOX_0 0x50

Definition at line 74 of file c4.c.

#define MAILBOX_1 0x54

Definition at line 75 of file c4.c.

#define MAILBOX_2 0x58

Definition at line 76 of file c4.c.

#define MAILBOX_3 0x5C

Definition at line 77 of file c4.c.

#define MBOX_DOWN_ADDR MAILBOX_2

Definition at line 109 of file c4.c.

#define MBOX_DOWN_LEN MAILBOX_3

Definition at line 110 of file c4.c.

#define MBOX_PEEK_POKE MAILBOX_0

Definition at line 98 of file c4.c.

#define MBOX_UP_ADDR MAILBOX_0

Definition at line 107 of file c4.c.

#define MBOX_UP_LEN MAILBOX_1

Definition at line 108 of file c4.c.

#define PCI_OUT_INT_MASK 0x34

Definition at line 73 of file c4.c.

#define PCI_OUT_INT_STATUS 0x30

Definition at line 72 of file c4.c.

#define PEEK_POKE_TIMEOUT (HZ / 10) /* 0.1 sec */

Definition at line 133 of file c4.c.

#define RESET_TIMEOUT (15 * HZ) /* 15 sec */

Definition at line 132 of file c4.c.

#define SA_CONTROL 0x13C

Definition at line 88 of file c4.c.

#define SA_CTL_ALLRIGHT 0x64AA0271

Definition at line 125 of file c4.c.

#define SDRAM_SIZE 0x1000000

Definition at line 94 of file c4.c.

#define XBUS_CYCLE 0x148

Definition at line 89 of file c4.c.

#define XBUS_STROBE 0x14C

Definition at line 90 of file c4.c.

Function Documentation

MODULE_AUTHOR ( "Carsten Paeth" )

MODULE_DESCRIPTION ( "CAPI4Linux: Driver for AVM C2/C4 cards" )

MODULE_DEVICE_TABLE	(	pci	,
		c4_pci_tbl
	)

module_exit ( c4_exit )

module_init ( c4_init )

MODULE_LICENSE ( "GPL" )

module_param	(	suppress_pollack	,
		bool	,
		0
	)

Macros

Functions

Macro Definition Documentation

Function Documentation