enum | imx5_clks {
dummy,
ckil,
osc,
ckih1,
ckih2,
ahb,
ipg,
axi_a,
axi_b,
uart_pred,
uart_root,
esdhc_a_pred,
esdhc_b_pred,
esdhc_c_s,
esdhc_d_s,
emi_sel,
emi_slow_podf,
nfc_podf,
ecspi_pred,
ecspi_podf,
usboh3_pred,
usboh3_podf,
usb_phy_pred,
usb_phy_podf,
cpu_podf,
di_pred,
tve_di,
tve_s,
uart1_ipg_gate,
uart1_per_gate,
uart2_ipg_gate,
uart2_per_gate,
uart3_ipg_gate,
uart3_per_gate,
i2c1_gate,
i2c2_gate,
gpt_ipg_gate,
pwm1_ipg_gate,
pwm1_hf_gate,
pwm2_ipg_gate,
pwm2_hf_gate,
gpt_hf_gate,
fec_gate,
usboh3_per_gate,
esdhc1_ipg_gate,
esdhc2_ipg_gate,
esdhc3_ipg_gate,
esdhc4_ipg_gate,
ssi1_ipg_gate,
ssi2_ipg_gate,
ssi3_ipg_gate,
ecspi1_ipg_gate,
ecspi1_per_gate,
ecspi2_ipg_gate,
ecspi2_per_gate,
cspi_ipg_gate,
sdma_gate,
emi_slow_gate,
ipu_s,
ipu_gate,
nfc_gate,
ipu_di1_gate,
vpu_s,
vpu_gate,
vpu_reference_gate,
uart4_ipg_gate,
uart4_per_gate,
uart5_ipg_gate,
uart5_per_gate,
tve_gate,
tve_pred,
esdhc1_per_gate,
esdhc2_per_gate,
esdhc3_per_gate,
esdhc4_per_gate,
usb_phy_gate,
hsi2c_gate,
mipi_hsc1_gate,
mipi_hsc2_gate,
mipi_esc_gate,
mipi_hsp_gate,
ldb_di1_div_3_5,
ldb_di1_div,
ldb_di0_div_3_5,
ldb_di0_div,
ldb_di1_gate,
can2_serial_gate,
can2_ipg_gate,
i2c3_gate,
lp_apm,
periph_apm,
main_bus,
ahb_max,
aips_tz1,
aips_tz2,
tmax1,
tmax2,
tmax3,
spba,
uart_sel,
esdhc_a_sel,
esdhc_b_sel,
esdhc_a_podf,
esdhc_b_podf,
ecspi_sel,
usboh3_sel,
usb_phy_sel,
iim_gate,
usboh3_gate,
emi_fast_gate,
ipu_di0_gate,
gpc_dvfs,
pll1_sw,
pll2_sw,
pll3_sw,
ipu_di0_sel,
ipu_di1_sel,
tve_ext_sel,
mx51_mipi,
pll4_sw,
ldb_di1_sel,
di_pll4_podf,
ldb_di0_sel,
ldb_di0_gate,
usb_phy1_gate,
usb_phy2_gate,
per_lp_apm,
per_pred1,
per_pred2,
per_podf,
per_root,
ssi_apm,
ssi1_root_sel,
ssi2_root_sel,
ssi3_root_sel,
ssi_ext1_sel,
ssi_ext2_sel,
ssi_ext1_com_sel,
ssi_ext2_com_sel,
ssi1_root_pred,
ssi1_root_podf,
ssi2_root_pred,
ssi2_root_podf,
ssi_ext1_pred,
ssi_ext1_podf,
ssi_ext2_pred,
ssi_ext2_podf,
ssi1_root_gate,
ssi2_root_gate,
ssi3_root_gate,
ssi_ext1_gate,
ssi_ext2_gate,
epit1_ipg_gate,
epit1_hf_gate,
epit2_ipg_gate,
epit2_hf_gate,
can_sel,
can1_serial_gate,
can1_ipg_gate,
clk_max
} |