clk-provider.h

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/*
 *  linux/include/linux/clk-provider.h
 *
 *  Copyright (c) 2010-2011 Jeremy Kerr <[email protected]>
 *  Copyright (C) 2011-2012 Linaro Ltd <[email protected]>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#ifndef __LINUX_CLK_PROVIDER_H
#define __LINUX_CLK_PROVIDER_H

#include <linux/clk.h>

#ifdef CONFIG_COMMON_CLK

/*
 * flags used across common struct clk.  these flags should only affect the
 * top-level framework.  custom flags for dealing with hardware specifics
 * belong in struct clk_foo
 */
#define CLK_SET_RATE_GATE   BIT(0) /* must be gated across rate change */
#define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */
#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
#define CLK_IGNORE_UNUSED   BIT(3) /* do not gate even if unused */
#define CLK_IS_ROOT     BIT(4) /* root clk, has no parent */
#define CLK_IS_BASIC        BIT(5) /* Basic clk, can't do a to_clk_foo() */
#define CLK_GET_RATE_NOCACHE    BIT(6) /* do not use the cached clk rate */

struct clk_hw;

struct clk_ops {
    int     (*prepare)(struct clk_hw *hw);
    void        (*unprepare)(struct clk_hw *hw);
    int     (*enable)(struct clk_hw *hw);
    void        (*disable)(struct clk_hw *hw);
    int     (*is_enabled)(struct clk_hw *hw);
    unsigned long   (*recalc_rate)(struct clk_hw *hw,
                    unsigned long parent_rate);
    long        (*round_rate)(struct clk_hw *hw, unsigned long,
                    unsigned long *);
    int     (*set_parent)(struct clk_hw *hw, u8 index);
    u8      (*get_parent)(struct clk_hw *hw);
    int     (*set_rate)(struct clk_hw *hw, unsigned long,
                    unsigned long);
    void        (*init)(struct clk_hw *hw);
};

struct clk_init_data {
    const char      *name;
    const struct clk_ops    *ops;
    const char      **parent_names;
    u8          num_parents;
    unsigned long       flags;
};

struct clk_hw {
    struct clk *clk;
    const struct clk_init_data *init;
};

/*
 * DOC: Basic clock implementations common to many platforms
 *
 * Each basic clock hardware type is comprised of a structure describing the
 * clock hardware, implementations of the relevant callbacks in struct clk_ops,
 * unique flags for that hardware type, a registration function and an
 * alternative macro for static initialization
 */

struct clk_fixed_rate {
    struct      clk_hw hw;
    unsigned long   fixed_rate;
    u8      flags;
};

extern const struct clk_ops clk_fixed_rate_ops;
struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
        const char *parent_name, unsigned long flags,
        unsigned long fixed_rate);

void of_fixed_clk_setup(struct device_node *np);

struct clk_gate {
    struct clk_hw hw;
    void __iomem    *reg;
    u8      bit_idx;
    u8      flags;
    spinlock_t  *lock;
};

#define CLK_GATE_SET_TO_DISABLE     BIT(0)

extern const struct clk_ops clk_gate_ops;
struct clk *clk_register_gate(struct device *dev, const char *name,
        const char *parent_name, unsigned long flags,
        void __iomem *reg, u8 bit_idx,
        u8 clk_gate_flags, spinlock_t *lock);

struct clk_div_table {
    unsigned int    val;
    unsigned int    div;
};

struct clk_divider {
    struct clk_hw   hw;
    void __iomem    *reg;
    u8      shift;
    u8      width;
    u8      flags;
    const struct clk_div_table  *table;
    spinlock_t  *lock;
};

#define CLK_DIVIDER_ONE_BASED       BIT(0)
#define CLK_DIVIDER_POWER_OF_TWO    BIT(1)

extern const struct clk_ops clk_divider_ops;
struct clk *clk_register_divider(struct device *dev, const char *name,
        const char *parent_name, unsigned long flags,
        void __iomem *reg, u8 shift, u8 width,
        u8 clk_divider_flags, spinlock_t *lock);
struct clk *clk_register_divider_table(struct device *dev, const char *name,
        const char *parent_name, unsigned long flags,
        void __iomem *reg, u8 shift, u8 width,
        u8 clk_divider_flags, const struct clk_div_table *table,
        spinlock_t *lock);

struct clk_mux {
    struct clk_hw   hw;
    void __iomem    *reg;
    u8      shift;
    u8      width;
    u8      flags;
    spinlock_t  *lock;
};

#define CLK_MUX_INDEX_ONE       BIT(0)
#define CLK_MUX_INDEX_BIT       BIT(1)

extern const struct clk_ops clk_mux_ops;
struct clk *clk_register_mux(struct device *dev, const char *name,
        const char **parent_names, u8 num_parents, unsigned long flags,
        void __iomem *reg, u8 shift, u8 width,
        u8 clk_mux_flags, spinlock_t *lock);

struct clk_fixed_factor {
    struct clk_hw   hw;
    unsigned int    mult;
    unsigned int    div;
};

extern struct clk_ops clk_fixed_factor_ops;
struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
        const char *parent_name, unsigned long flags,
        unsigned int mult, unsigned int div);

struct clk *clk_register(struct device *dev, struct clk_hw *hw);

void clk_unregister(struct clk *clk);

/* helper functions */
const char *__clk_get_name(struct clk *clk);
struct clk_hw *__clk_get_hw(struct clk *clk);
u8 __clk_get_num_parents(struct clk *clk);
struct clk *__clk_get_parent(struct clk *clk);
int __clk_get_enable_count(struct clk *clk);
int __clk_get_prepare_count(struct clk *clk);
unsigned long __clk_get_rate(struct clk *clk);
unsigned long __clk_get_flags(struct clk *clk);
int __clk_is_enabled(struct clk *clk);
struct clk *__clk_lookup(const char *name);

/*
 * FIXME clock api without lock protection
 */
int __clk_prepare(struct clk *clk);
void __clk_unprepare(struct clk *clk);
void __clk_reparent(struct clk *clk, struct clk *new_parent);
unsigned long __clk_round_rate(struct clk *clk, unsigned long rate);

struct of_device_id;

typedef void (*of_clk_init_cb_t)(struct device_node *);

int of_clk_add_provider(struct device_node *np,
            struct clk *(*clk_src_get)(struct of_phandle_args *args,
                           void *data),
            void *data);
void of_clk_del_provider(struct device_node *np);
struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
                  void *data);
struct clk_onecell_data {
    struct clk **clks;
    unsigned int clk_num;
};
struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data);
const char *of_clk_get_parent_name(struct device_node *np, int index);
void of_clk_init(const struct of_device_id *matches);

#endif /* CONFIG_COMMON_CLK */
#endif /* CLK_PROVIDER_H */