clkgen_defs.h File Reference

Go to the source code of this file.

Data Structures
struct	reg_clkgen_r_bootsel
struct	reg_clkgen_rw_clk_ctrl

Macros
#define	REG_RD(scope, inst, reg)
#define	REG_WR(scope, inst, reg, val)
#define	REG_RD_VECT(scope, inst, reg, index)
#define	REG_WR_VECT(scope, inst, reg, index, val)
#define	REG_RD_INT(scope, inst, reg)   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
#define	REG_WR_INT(scope, inst, reg, val)   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#define	REG_RD_INT_VECT(scope, inst, reg, index)
#define	REG_WR_INT_VECT(scope, inst, reg, index, val)
#define	REG_TYPE_CONV(type, orgtype, val)   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
#define	reg_page_size   8192
#define	REG_ADDR(scope, inst, reg)   ( (inst) + REG_RD_ADDR_##scope##_##reg )
#define	REG_ADDR_VECT(scope, inst, reg, index)
#define	REG_RD_ADDR_clkgen_r_bootsel   0
#define	REG_RD_ADDR_clkgen_rw_clk_ctrl   4
#define	REG_WR_ADDR_clkgen_rw_clk_ctrl   4

Enumerations
enum	{   regk_clkgen_eth1000_rx = 0x0000000c, regk_clkgen_eth1000_tx = 0x0000000e, regk_clkgen_eth100_rx = 0x0000001d, regk_clkgen_eth100_rx_half = 0x0000001c,   regk_clkgen_eth100_tx = 0x0000001f, regk_clkgen_eth100_tx_half = 0x0000001e, regk_clkgen_nand_3_2 = 0x00000000, regk_clkgen_nand_3_2_0x30 = 0x00000002,   regk_clkgen_nand_3_2_0x30_pll = 0x00000012, regk_clkgen_nand_3_2_pll = 0x00000010, regk_clkgen_nand_3_3 = 0x00000001, regk_clkgen_nand_3_3_0x30 = 0x00000003,   regk_clkgen_nand_3_3_0x30_pll = 0x00000013, regk_clkgen_nand_3_3_pll = 0x00000011, regk_clkgen_nand_4_2 = 0x00000004, regk_clkgen_nand_4_2_0x30 = 0x00000006,   regk_clkgen_nand_4_2_0x30_pll = 0x00000016, regk_clkgen_nand_4_2_pll = 0x00000014, regk_clkgen_nand_4_3 = 0x00000005, regk_clkgen_nand_4_3_0x30 = 0x00000007,   regk_clkgen_nand_4_3_0x30_pll = 0x00000017, regk_clkgen_nand_4_3_pll = 0x00000015, regk_clkgen_nand_5_2 = 0x00000008, regk_clkgen_nand_5_2_0x30 = 0x0000000a,   regk_clkgen_nand_5_2_0x30_pll = 0x0000001a, regk_clkgen_nand_5_2_pll = 0x00000018, regk_clkgen_nand_5_3 = 0x00000009, regk_clkgen_nand_5_3_0x30 = 0x0000000b,   regk_clkgen_nand_5_3_0x30_pll = 0x0000001b, regk_clkgen_nand_5_3_pll = 0x00000019, regk_clkgen_no = 0x00000000, regk_clkgen_rw_clk_ctrl_default = 0x00000002,   regk_clkgen_ser = 0x0000000d, regk_clkgen_ser_pll = 0x0000000f, regk_clkgen_yes = 0x00000001 }

Macro Definition Documentation

#define REG_ADDR	(		scope,
			inst,
			reg
	)		( (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 72 of file clkgen_defs.h.

#define REG_ADDR_VECT	(		scope,
			inst,
			reg,
			index
	)

Value:

( (inst) + REG_RD_ADDR_##scope##_##reg + \
    (index) * STRIDE_##scope##_##reg )

Definition at line 77 of file clkgen_defs.h.

#define reg_page_size   8192

Definition at line 68 of file clkgen_defs.h.

#define REG_RD	(		scope,
			inst,
			reg
	)

Value:

REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 15 of file clkgen_defs.h.

#define REG_RD_ADDR_clkgen_r_bootsel   0

Definition at line 91 of file clkgen_defs.h.

#define REG_RD_ADDR_clkgen_rw_clk_ctrl   4

Definition at line 117 of file clkgen_defs.h.

#define REG_RD_INT	(		scope,
			inst,
			reg
	)		REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 41 of file clkgen_defs.h.

#define REG_RD_INT_VECT	(		scope,
			inst,
			reg,
			index
	)

Value:

REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
        (index) * STRIDE_##scope##_##reg )

Definition at line 51 of file clkgen_defs.h.

#define REG_RD_VECT	(		scope,
			inst,
			reg,
			index
	)

Value:

REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg + \
        (index) * STRIDE_##scope##_##reg )

Definition at line 27 of file clkgen_defs.h.

#define REG_TYPE_CONV	(		type,
			orgtype,
			val
	)		( { union { orgtype o; type n; } r; r.o = val; r.n; } )

Definition at line 63 of file clkgen_defs.h.

#define REG_WR	(		scope,
			inst,
			reg,
			val
	)

Value:

REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )

Definition at line 21 of file clkgen_defs.h.

#define REG_WR_ADDR_clkgen_rw_clk_ctrl   4

Definition at line 118 of file clkgen_defs.h.

#define REG_WR_INT	(		scope,
			inst,
			reg,
			val
	)		REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )

Definition at line 46 of file clkgen_defs.h.

#define REG_WR_INT_VECT	(		scope,
			inst,
			reg,
			index,
			val
	)

Value:

REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
         (index) * STRIDE_##scope##_##reg, (val) )

Definition at line 57 of file clkgen_defs.h.

#define REG_WR_VECT	(		scope,
			inst,
			reg,
			index,
			val
	)

Value:

REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg + \
         (index) * STRIDE_##scope##_##reg, (val) )

Definition at line 34 of file clkgen_defs.h.

Enumeration Type Documentation

anonymous enum

Enumerator:

regk_clkgen_eth1000_rx
regk_clkgen_eth1000_tx
regk_clkgen_eth100_rx
regk_clkgen_eth100_rx_half
regk_clkgen_eth100_tx
regk_clkgen_eth100_tx_half
regk_clkgen_nand_3_2
regk_clkgen_nand_3_2_0x30
regk_clkgen_nand_3_2_0x30_pll
regk_clkgen_nand_3_2_pll
regk_clkgen_nand_3_3
regk_clkgen_nand_3_3_0x30
regk_clkgen_nand_3_3_0x30_pll
regk_clkgen_nand_3_3_pll
regk_clkgen_nand_4_2
regk_clkgen_nand_4_2_0x30
regk_clkgen_nand_4_2_0x30_pll
regk_clkgen_nand_4_2_pll
regk_clkgen_nand_4_3
regk_clkgen_nand_4_3_0x30
regk_clkgen_nand_4_3_0x30_pll
regk_clkgen_nand_4_3_pll
regk_clkgen_nand_5_2
regk_clkgen_nand_5_2_0x30
regk_clkgen_nand_5_2_0x30_pll
regk_clkgen_nand_5_2_pll
regk_clkgen_nand_5_3
regk_clkgen_nand_5_3_0x30
regk_clkgen_nand_5_3_0x30_pll
regk_clkgen_nand_5_3_pll
regk_clkgen_no
regk_clkgen_rw_clk_ctrl_default
regk_clkgen_ser
regk_clkgen_ser_pll
regk_clkgen_yes

Definition at line 122 of file clkgen_defs.h.