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controlfb.c
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1 /*
2  * controlfb.c -- frame buffer device for the PowerMac 'control' display
3  *
4  * Created 12 July 1998 by Dan Jacobowitz <[email protected]>
5  * Copyright (C) 1998 Dan Jacobowitz
6  * Copyright (C) 2001 Takashi Oe
7  *
8  * Mmap code by Michel Lanners <[email protected]>
9  *
10  * Frame buffer structure from:
11  * drivers/video/chipsfb.c -- frame buffer device for
12  * Chips & Technologies 65550 chip.
13  *
14  * Copyright (C) 1998 Paul Mackerras
15  *
16  * This file is derived from the Powermac "chips" driver:
17  * Copyright (C) 1997 Fabio Riccardi.
18  * And from the frame buffer device for Open Firmware-initialized devices:
19  * Copyright (C) 1997 Geert Uytterhoeven.
20  *
21  * Hardware information from:
22  * control.c: Console support for PowerMac "control" display adaptor.
23  * Copyright (C) 1996 Paul Mackerras
24  *
25  * Updated to 2.5 framebuffer API by Ben Herrenschmidt
26  * <[email protected]>, Paul Mackerras <[email protected]>,
27  * and James Simmons <[email protected]>.
28  *
29  * This file is subject to the terms and conditions of the GNU General Public
30  * License. See the file COPYING in the main directory of this archive for
31  * more details.
32  */
33 
34 #include <linux/module.h>
35 #include <linux/kernel.h>
36 #include <linux/errno.h>
37 #include <linux/string.h>
38 #include <linux/mm.h>
39 #include <linux/slab.h>
40 #include <linux/vmalloc.h>
41 #include <linux/delay.h>
42 #include <linux/interrupt.h>
43 #include <linux/of.h>
44 #include <linux/of_address.h>
45 #include <linux/fb.h>
46 #include <linux/init.h>
47 #include <linux/pci.h>
48 #include <linux/nvram.h>
49 #include <linux/adb.h>
50 #include <linux/cuda.h>
51 #include <asm/io.h>
52 #include <asm/prom.h>
53 #include <asm/pgtable.h>
54 #include <asm/btext.h>
55 
56 #include "macmodes.h"
57 #include "controlfb.h"
58 
59 struct fb_par_control {
60  int vmode, cmode;
61  int xres, yres;
62  int vxres, vyres;
63  int xoffset, yoffset;
64  int pitch;
65  struct control_regvals regvals;
66  unsigned long sync;
67  unsigned char ctrl;
68 };
69 
70 #define DIRTY(z) ((x)->z != (y)->z)
71 #define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z)))
72 static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y)
73 {
74  int i, results;
75 
76  results = 1;
77  for (i = 0; i < 3; i++)
78  results &= !DIRTY(regvals.clock_params[i]);
79  if (!results)
80  return 0;
81  for (i = 0; i < 16; i++)
82  results &= !DIRTY(regvals.regs[i]);
83  if (!results)
84  return 0;
85  return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres)
86  && !DIRTY(vxres) && !DIRTY(vyres));
87 }
88 static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y)
89 {
90  return (!DIRTY(bits_per_pixel) && !DIRTY(xres)
91  && !DIRTY(yres) && !DIRTY(xres_virtual)
92  && !DIRTY(yres_virtual)
93  && !DIRTY_CMAP(red) && !DIRTY_CMAP(green) && !DIRTY_CMAP(blue));
94 }
95 
96 struct fb_info_control {
97  struct fb_info info;
98  struct fb_par_control par;
99  u32 pseudo_palette[16];
100 
101  struct cmap_regs __iomem *cmap_regs;
102  unsigned long cmap_regs_phys;
103 
104  struct control_regs __iomem *control_regs;
105  unsigned long control_regs_phys;
106  unsigned long control_regs_size;
107 
108  __u8 __iomem *frame_buffer;
109  unsigned long frame_buffer_phys;
110  unsigned long fb_orig_base;
111  unsigned long fb_orig_size;
112 
113  int control_use_bank2;
114  unsigned long total_vram;
115  unsigned char vram_attr;
116 };
117 
118 /* control register access macro */
119 #define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r))
120 
121 
122 /******************** Prototypes for exported functions ********************/
123 /*
124  * struct fb_ops
125  */
126 static int controlfb_pan_display(struct fb_var_screeninfo *var,
127  struct fb_info *info);
128 static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
129  u_int transp, struct fb_info *info);
130 static int controlfb_blank(int blank_mode, struct fb_info *info);
131 static int controlfb_mmap(struct fb_info *info,
132  struct vm_area_struct *vma);
133 static int controlfb_set_par (struct fb_info *info);
134 static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info);
135 
136 /******************** Prototypes for internal functions **********************/
137 
138 static void set_control_clock(unsigned char *params);
139 static int init_control(struct fb_info_control *p);
140 static void control_set_hardware(struct fb_info_control *p,
141  struct fb_par_control *par);
142 static int control_of_init(struct device_node *dp);
143 static void find_vram_size(struct fb_info_control *p);
144 static int read_control_sense(struct fb_info_control *p);
145 static int calc_clock_params(unsigned long clk, unsigned char *param);
146 static int control_var_to_par(struct fb_var_screeninfo *var,
147  struct fb_par_control *par, const struct fb_info *fb_info);
148 static inline void control_par_to_var(struct fb_par_control *par,
149  struct fb_var_screeninfo *var);
150 static void control_init_info(struct fb_info *info, struct fb_info_control *p);
151 static void control_cleanup(void);
152 
153 
154 /************************** Internal variables *******************************/
155 
156 static struct fb_info_control *control_fb;
157 
158 static int default_vmode __initdata = VMODE_NVRAM;
159 static int default_cmode __initdata = CMODE_NVRAM;
160 
161 
162 static struct fb_ops controlfb_ops = {
163  .owner = THIS_MODULE,
164  .fb_check_var = controlfb_check_var,
165  .fb_set_par = controlfb_set_par,
166  .fb_setcolreg = controlfb_setcolreg,
167  .fb_pan_display = controlfb_pan_display,
168  .fb_blank = controlfb_blank,
169  .fb_mmap = controlfb_mmap,
170  .fb_fillrect = cfb_fillrect,
171  .fb_copyarea = cfb_copyarea,
172  .fb_imageblit = cfb_imageblit,
173 };
174 
175 
176 /******************** The functions for controlfb_ops ********************/
177 
178 #ifdef MODULE
179 MODULE_LICENSE("GPL");
180 
181 int init_module(void)
182 {
183  struct device_node *dp;
184  int ret = -ENXIO;
185 
186  dp = of_find_node_by_name(NULL, "control");
187  if (dp != 0 && !control_of_init(dp))
188  ret = 0;
189  of_node_put(dp);
190 
191  return ret;
192 }
193 
194 void cleanup_module(void)
195 {
196  control_cleanup();
197 }
198 #endif
199 
200 /*
201  * Checks a var structure
202  */
203 static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info)
204 {
205  struct fb_par_control par;
206  int err;
207 
208  err = control_var_to_par(var, &par, info);
209  if (err)
210  return err;
211  control_par_to_var(&par, var);
212 
213  return 0;
214 }
215 
216 /*
217  * Applies current var to display
218  */
219 static int controlfb_set_par (struct fb_info *info)
220 {
221  struct fb_info_control *p = (struct fb_info_control *) info;
222  struct fb_par_control par;
223  int err;
224 
225  if((err = control_var_to_par(&info->var, &par, info))) {
226  printk (KERN_ERR "controlfb_set_par: error calling"
227  " control_var_to_par: %d.\n", err);
228  return err;
229  }
230 
231  control_set_hardware(p, &par);
232 
233  info->fix.visual = (p->par.cmode == CMODE_8) ?
234  FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
235  info->fix.line_length = p->par.pitch;
236  info->fix.xpanstep = 32 >> p->par.cmode;
237  info->fix.ypanstep = 1;
238 
239  return 0;
240 }
241 
242 /*
243  * Set screen start address according to var offset values
244  */
245 static inline void set_screen_start(int xoffset, int yoffset,
246  struct fb_info_control *p)
247 {
248  struct fb_par_control *par = &p->par;
249 
250  par->xoffset = xoffset;
251  par->yoffset = yoffset;
252  out_le32(CNTRL_REG(p,start_addr),
253  par->yoffset * par->pitch + (par->xoffset << par->cmode));
254 }
255 
256 
257 static int controlfb_pan_display(struct fb_var_screeninfo *var,
258  struct fb_info *info)
259 {
260  unsigned int xoffset, hstep;
261  struct fb_info_control *p = (struct fb_info_control *)info;
262  struct fb_par_control *par = &p->par;
263 
264  /*
265  * make sure start addr will be 32-byte aligned
266  */
267  hstep = 0x1f >> par->cmode;
268  xoffset = (var->xoffset + hstep) & ~hstep;
269 
270  if (xoffset+par->xres > par->vxres ||
271  var->yoffset+par->yres > par->vyres)
272  return -EINVAL;
273 
274  set_screen_start(xoffset, var->yoffset, p);
275 
276  return 0;
277 }
278 
279 
280 /*
281  * Private mmap since we want to have a different caching on the framebuffer
282  * for controlfb.
283  * Note there's no locking in here; it's done in fb_mmap() in fbmem.c.
284  */
285 static int controlfb_mmap(struct fb_info *info,
286  struct vm_area_struct *vma)
287 {
288  unsigned long off, start;
289  u32 len;
290 
291  off = vma->vm_pgoff << PAGE_SHIFT;
292 
293  /* frame buffer memory */
294  start = info->fix.smem_start;
295  len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.smem_len);
296  if (off >= len) {
297  /* memory mapped io */
298  off -= len;
299  if (info->var.accel_flags)
300  return -EINVAL;
301  start = info->fix.mmio_start;
302  len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.mmio_len);
303  vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
304  } else {
305  /* framebuffer */
306  vma->vm_page_prot = pgprot_cached_wthru(vma->vm_page_prot);
307  }
308  start &= PAGE_MASK;
309  if ((vma->vm_end - vma->vm_start + off) > len)
310  return -EINVAL;
311  off += start;
312  vma->vm_pgoff = off >> PAGE_SHIFT;
313  if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
314  vma->vm_end - vma->vm_start, vma->vm_page_prot))
315  return -EAGAIN;
316 
317  return 0;
318 }
319 
320 static int controlfb_blank(int blank_mode, struct fb_info *info)
321 {
322  struct fb_info_control *p = (struct fb_info_control *) info;
323  unsigned ctrl;
324 
325  ctrl = ld_le32(CNTRL_REG(p,ctrl));
326  if (blank_mode > 0)
327  switch (blank_mode) {
328  case FB_BLANK_VSYNC_SUSPEND:
329  ctrl &= ~3;
330  break;
331  case FB_BLANK_HSYNC_SUSPEND:
332  ctrl &= ~0x30;
333  break;
334  case FB_BLANK_POWERDOWN:
335  ctrl &= ~0x33;
336  /* fall through */
337  case FB_BLANK_NORMAL:
338  ctrl |= 0x400;
339  break;
340  default:
341  break;
342  }
343  else {
344  ctrl &= ~0x400;
345  ctrl |= 0x33;
346  }
347  out_le32(CNTRL_REG(p,ctrl), ctrl);
348 
349  return 0;
350 }
351 
352 static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
353  u_int transp, struct fb_info *info)
354 {
355  struct fb_info_control *p = (struct fb_info_control *) info;
356  __u8 r, g, b;
357 
358  if (regno > 255)
359  return 1;
360 
361  r = red >> 8;
362  g = green >> 8;
363  b = blue >> 8;
364 
365  out_8(&p->cmap_regs->addr, regno); /* tell clut what addr to fill */
366  out_8(&p->cmap_regs->lut, r); /* send one color channel at */
367  out_8(&p->cmap_regs->lut, g); /* a time... */
368  out_8(&p->cmap_regs->lut, b);
369 
370  if (regno < 16) {
371  int i;
372  switch (p->par.cmode) {
373  case CMODE_16:
374  p->pseudo_palette[regno] =
375  (regno << 10) | (regno << 5) | regno;
376  break;
377  case CMODE_32:
378  i = (regno << 8) | regno;
379  p->pseudo_palette[regno] = (i << 16) | i;
380  break;
381  }
382  }
383 
384  return 0;
385 }
386 
387 
388 /******************** End of controlfb_ops implementation ******************/
389 
390 
391 
392 static void set_control_clock(unsigned char *params)
393 {
394 #ifdef CONFIG_ADB_CUDA
395  struct adb_request req;
396  int i;
397 
398  for (i = 0; i < 3; ++i) {
399  cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC,
400  0x50, i + 1, params[i]);
401  while (!req.complete)
402  cuda_poll();
403  }
404 #endif
405 }
406 
407 
408 /*
409  * finish off the driver initialization and register
410  */
411 static int __init init_control(struct fb_info_control *p)
412 {
413  int full, sense, vmode, cmode, vyres;
414  struct fb_var_screeninfo var;
415  int rc;
416 
417  printk(KERN_INFO "controlfb: ");
418 
419  full = p->total_vram == 0x400000;
420 
421  /* Try to pick a video mode out of NVRAM if we have one. */
422 #ifdef CONFIG_NVRAM
423  if (default_cmode == CMODE_NVRAM) {
424  cmode = nvram_read_byte(NV_CMODE);
425  if(cmode < CMODE_8 || cmode > CMODE_32)
426  cmode = CMODE_8;
427  } else
428 #endif
429  cmode=default_cmode;
430 #ifdef CONFIG_NVRAM
431  if (default_vmode == VMODE_NVRAM) {
432  vmode = nvram_read_byte(NV_VMODE);
433  if (vmode < 1 || vmode > VMODE_MAX ||
434  control_mac_modes[vmode - 1].m[full] < cmode) {
435  sense = read_control_sense(p);
436  printk("Monitor sense value = 0x%x, ", sense);
437  vmode = mac_map_monitor_sense(sense);
438  if (control_mac_modes[vmode - 1].m[full] < cmode)
439  vmode = VMODE_640_480_60;
440  }
441  } else
442 #endif
443  {
444  vmode=default_vmode;
445  if (control_mac_modes[vmode - 1].m[full] < cmode) {
446  if (cmode > CMODE_8)
447  cmode--;
448  else
449  vmode = VMODE_640_480_60;
450  }
451  }
452 
453  /* Initialize info structure */
454  control_init_info(&p->info, p);
455 
456  /* Setup default var */
457  if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
458  /* This shouldn't happen! */
459  printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode);
460 try_again:
461  vmode = VMODE_640_480_60;
462  cmode = CMODE_8;
463  if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
464  printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n");
465  return -ENXIO;
466  }
467  printk(KERN_INFO "controlfb: ");
468  }
469  printk("using video mode %d and color mode %d.\n", vmode, cmode);
470 
471  vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode);
472  if (vyres > var.yres)
473  var.yres_virtual = vyres;
474 
475  /* Apply default var */
476  var.activate = FB_ACTIVATE_NOW;
477  rc = fb_set_var(&p->info, &var);
478  if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8))
479  goto try_again;
480 
481  /* Register with fbdev layer */
482  if (register_framebuffer(&p->info) < 0)
483  return -ENXIO;
484 
485  printk(KERN_INFO "fb%d: control display adapter\n", p->info.node);
486 
487  return 0;
488 }
489 
490 #define RADACAL_WRITE(a,d) \
491  out_8(&p->cmap_regs->addr, (a)); \
492  out_8(&p->cmap_regs->dat, (d))
493 
494 /* Now how about actually saying, Make it so! */
495 /* Some things in here probably don't need to be done each time. */
496 static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par)
497 {
498  struct control_regvals *r;
499  volatile struct preg __iomem *rp;
500  int i, cmode;
501 
502  if (PAR_EQUAL(&p->par, par)) {
503  /*
504  * check if only xoffset or yoffset differs.
505  * this prevents flickers in typical VT switch case.
506  */
507  if (p->par.xoffset != par->xoffset ||
508  p->par.yoffset != par->yoffset)
509  set_screen_start(par->xoffset, par->yoffset, p);
510 
511  return;
512  }
513 
514  p->par = *par;
515  cmode = p->par.cmode;
516  r = &par->regvals;
517 
518  /* Turn off display */
519  out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl);
520 
521  set_control_clock(r->clock_params);
522 
523  RADACAL_WRITE(0x20, r->radacal_ctrl);
524  RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1);
525  RADACAL_WRITE(0x10, 0);
526  RADACAL_WRITE(0x11, 0);
527 
528  rp = &p->control_regs->vswin;
529  for (i = 0; i < 16; ++i, ++rp)
530  out_le32(&rp->r, r->regs[i]);
531 
532  out_le32(CNTRL_REG(p,pitch), par->pitch);
533  out_le32(CNTRL_REG(p,mode), r->mode);
534  out_le32(CNTRL_REG(p,vram_attr), p->vram_attr);
535  out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch
536  + (par->xoffset << cmode));
537  out_le32(CNTRL_REG(p,rfrcnt), 0x1e5);
538  out_le32(CNTRL_REG(p,intr_ena), 0);
539 
540  /* Turn on display */
541  out_le32(CNTRL_REG(p,ctrl), par->ctrl);
542 
543 #ifdef CONFIG_BOOTX_TEXT
544  btext_update_display(p->frame_buffer_phys + CTRLFB_OFF,
545  p->par.xres, p->par.yres,
546  (cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8),
547  p->par.pitch);
548 #endif /* CONFIG_BOOTX_TEXT */
549 }
550 
551 
552 /*
553  * Parse user specified options (`video=controlfb:')
554  */
555 static void __init control_setup(char *options)
556 {
557  char *this_opt;
558 
559  if (!options || !*options)
560  return;
561 
562  while ((this_opt = strsep(&options, ",")) != NULL) {
563  if (!strncmp(this_opt, "vmode:", 6)) {
564  int vmode = simple_strtoul(this_opt+6, NULL, 0);
565  if (vmode > 0 && vmode <= VMODE_MAX &&
566  control_mac_modes[vmode - 1].m[1] >= 0)
567  default_vmode = vmode;
568  } else if (!strncmp(this_opt, "cmode:", 6)) {
569  int depth = simple_strtoul(this_opt+6, NULL, 0);
570  switch (depth) {
571  case CMODE_8:
572  case CMODE_16:
573  case CMODE_32:
574  default_cmode = depth;
575  break;
576  case 8:
577  default_cmode = CMODE_8;
578  break;
579  case 15:
580  case 16:
581  default_cmode = CMODE_16;
582  break;
583  case 24:
584  case 32:
585  default_cmode = CMODE_32;
586  break;
587  }
588  }
589  }
590 }
591 
592 static int __init control_init(void)
593 {
594  struct device_node *dp;
595  char *option = NULL;
596  int ret = -ENXIO;
597 
598  if (fb_get_options("controlfb", &option))
599  return -ENODEV;
600  control_setup(option);
601 
602  dp = of_find_node_by_name(NULL, "control");
603  if (dp != 0 && !control_of_init(dp))
604  ret = 0;
605  of_node_put(dp);
606 
607  return ret;
608 }
609 
610 module_init(control_init);
611 
612 /* Work out which banks of VRAM we have installed. */
613 /* danj: I guess the card just ignores writes to nonexistant VRAM... */
614 
615 static void __init find_vram_size(struct fb_info_control *p)
616 {
617  int bank1, bank2;
618 
619  /*
620  * Set VRAM in 2MB (bank 1) mode
621  * VRAM Bank 2 will be accessible through offset 0x600000 if present
622  * and VRAM Bank 1 will not respond at that offset even if present
623  */
624  out_le32(CNTRL_REG(p,vram_attr), 0x31);
625 
626  out_8(&p->frame_buffer[0x600000], 0xb3);
627  out_8(&p->frame_buffer[0x600001], 0x71);
628  asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0x600000])
629  : "memory" );
630  mb();
631  asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0x600000])
632  : "memory" );
633  mb();
634 
635  bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3)
636  && (in_8(&p->frame_buffer[0x600001]) == 0x71);
637 
638  /*
639  * Set VRAM in 2MB (bank 2) mode
640  * VRAM Bank 1 will be accessible through offset 0x000000 if present
641  * and VRAM Bank 2 will not respond at that offset even if present
642  */
643  out_le32(CNTRL_REG(p,vram_attr), 0x39);
644 
645  out_8(&p->frame_buffer[0], 0x5a);
646  out_8(&p->frame_buffer[1], 0xc7);
647  asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0])
648  : "memory" );
649  mb();
650  asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0])
651  : "memory" );
652  mb();
653 
654  bank1 = (in_8(&p->frame_buffer[0]) == 0x5a)
655  && (in_8(&p->frame_buffer[1]) == 0xc7);
656 
657  if (bank2) {
658  if (!bank1) {
659  /*
660  * vram bank 2 only
661  */
662  p->control_use_bank2 = 1;
663  p->vram_attr = 0x39;
664  p->frame_buffer += 0x600000;
665  p->frame_buffer_phys += 0x600000;
666  } else {
667  /*
668  * 4 MB vram
669  */
670  p->vram_attr = 0x51;
671  }
672  } else {
673  /*
674  * vram bank 1 only
675  */
676  p->vram_attr = 0x31;
677  }
678 
679  p->total_vram = (bank1 + bank2) * 0x200000;
680 
681  printk(KERN_INFO "controlfb: VRAM Total = %dMB "
682  "(%dMB @ bank 1, %dMB @ bank 2)\n",
683  (bank1 + bank2) << 1, bank1 << 1, bank2 << 1);
684 }
685 
686 
687 /*
688  * find "control" and initialize
689  */
690 static int __init control_of_init(struct device_node *dp)
691 {
692  struct fb_info_control *p;
693  struct resource fb_res, reg_res;
694 
695  if (control_fb) {
696  printk(KERN_ERR "controlfb: only one control is supported\n");
697  return -ENXIO;
698  }
699 
700  if (of_pci_address_to_resource(dp, 2, &fb_res) ||
701  of_pci_address_to_resource(dp, 1, &reg_res)) {
702  printk(KERN_ERR "can't get 2 addresses for control\n");
703  return -ENXIO;
704  }
705  p = kzalloc(sizeof(*p), GFP_KERNEL);
706  if (p == 0)
707  return -ENXIO;
708  control_fb = p; /* save it for cleanups */
709 
710  /* Map in frame buffer and registers */
711  p->fb_orig_base = fb_res.start;
712  p->fb_orig_size = resource_size(&fb_res);
713  /* use the big-endian aperture (??) */
714  p->frame_buffer_phys = fb_res.start + 0x800000;
715  p->control_regs_phys = reg_res.start;
716  p->control_regs_size = resource_size(&reg_res);
717 
718  if (!p->fb_orig_base ||
719  !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) {
720  p->fb_orig_base = 0;
721  goto error_out;
722  }
723  /* map at most 8MB for the frame buffer */
724  p->frame_buffer = __ioremap(p->frame_buffer_phys, 0x800000,
725  _PAGE_WRITETHRU);
726 
727  if (!p->control_regs_phys ||
728  !request_mem_region(p->control_regs_phys, p->control_regs_size,
729  "controlfb regs")) {
730  p->control_regs_phys = 0;
731  goto error_out;
732  }
733  p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size);
734 
735  p->cmap_regs_phys = 0xf301b000; /* XXX not in prom? */
736  if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) {
737  p->cmap_regs_phys = 0;
738  goto error_out;
739  }
740  p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000);
741 
742  if (!p->cmap_regs || !p->control_regs || !p->frame_buffer)
743  goto error_out;
744 
745  find_vram_size(p);
746  if (!p->total_vram)
747  goto error_out;
748 
749  if (init_control(p) < 0)
750  goto error_out;
751 
752  return 0;
753 
754 error_out:
755  control_cleanup();
756  return -ENXIO;
757 }
758 
759 /*
760  * Get the monitor sense value.
761  * Note that this can be called before calibrate_delay,
762  * so we can't use udelay.
763  */
764 static int read_control_sense(struct fb_info_control *p)
765 {
766  int sense;
767 
768  out_le32(CNTRL_REG(p,mon_sense), 7); /* drive all lines high */
769  __delay(200);
770  out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */
771  __delay(2000);
772  sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2;
773 
774  /* drive each sense line low in turn and collect the other 2 */
775  out_le32(CNTRL_REG(p,mon_sense), 033); /* drive A low */
776  __delay(2000);
777  sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2;
778  out_le32(CNTRL_REG(p,mon_sense), 055); /* drive B low */
779  __delay(2000);
780  sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5)
781  | ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4);
782  out_le32(CNTRL_REG(p,mon_sense), 066); /* drive C low */
783  __delay(2000);
784  sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7;
785 
786  out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */
787 
788  return sense;
789 }
790 
791 /********************** Various translation functions **********************/
792 
793 #define CONTROL_PIXCLOCK_BASE 256016
794 #define CONTROL_PIXCLOCK_MIN 5000 /* ~ 200 MHz dot clock */
795 
796 /*
797  * calculate the clock paramaters to be sent to CUDA according to given
798  * pixclock in pico second.
799  */
800 static int calc_clock_params(unsigned long clk, unsigned char *param)
801 {
802  unsigned long p0, p1, p2, k, l, m, n, min;
803 
804  if (clk > (CONTROL_PIXCLOCK_BASE << 3))
805  return 1;
806 
807  p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2;
808  l = clk << p2;
809  p0 = 0;
810  p1 = 0;
811  for (k = 1, min = l; k < 32; k++) {
812  unsigned long rem;
813 
814  m = CONTROL_PIXCLOCK_BASE * k;
815  n = m / l;
816  rem = m % l;
817  if (n && (n < 128) && rem < min) {
818  p0 = k;
819  p1 = n;
820  min = rem;
821  }
822  }
823  if (!p0 || !p1)
824  return 1;
825 
826  param[0] = p0;
827  param[1] = p1;
828  param[2] = p2;
829 
830  return 0;
831 }
832 
833 
834 /*
835  * This routine takes a user-supplied var, and picks the best vmode/cmode
836  * from it.
837  */
838 
839 static int control_var_to_par(struct fb_var_screeninfo *var,
840  struct fb_par_control *par, const struct fb_info *fb_info)
841 {
842  int cmode, piped_diff, hstep;
843  unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln,
844  hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin;
845  unsigned long pixclock;
846  struct fb_info_control *p = (struct fb_info_control *) fb_info;
847  struct control_regvals *r = &par->regvals;
848 
849  switch (var->bits_per_pixel) {
850  case 8:
851  par->cmode = CMODE_8;
852  if (p->total_vram > 0x200000) {
853  r->mode = 3;
854  r->radacal_ctrl = 0x20;
855  piped_diff = 13;
856  } else {
857  r->mode = 2;
858  r->radacal_ctrl = 0x10;
859  piped_diff = 9;
860  }
861  break;
862  case 15:
863  case 16:
864  par->cmode = CMODE_16;
865  if (p->total_vram > 0x200000) {
866  r->mode = 2;
867  r->radacal_ctrl = 0x24;
868  piped_diff = 5;
869  } else {
870  r->mode = 1;
871  r->radacal_ctrl = 0x14;
872  piped_diff = 3;
873  }
874  break;
875  case 32:
876  par->cmode = CMODE_32;
877  if (p->total_vram > 0x200000) {
878  r->mode = 1;
879  r->radacal_ctrl = 0x28;
880  } else {
881  r->mode = 0;
882  r->radacal_ctrl = 0x18;
883  }
884  piped_diff = 1;
885  break;
886  default:
887  return -EINVAL;
888  }
889 
890  /*
891  * adjust xres and vxres so that the corresponding memory widths are
892  * 32-byte aligned
893  */
894  hstep = 31 >> par->cmode;
895  par->xres = (var->xres + hstep) & ~hstep;
896  par->vxres = (var->xres_virtual + hstep) & ~hstep;
897  par->xoffset = (var->xoffset + hstep) & ~hstep;
898  if (par->vxres < par->xres)
899  par->vxres = par->xres;
900  par->pitch = par->vxres << par->cmode;
901 
902  par->yres = var->yres;
903  par->vyres = var->yres_virtual;
904  par->yoffset = var->yoffset;
905  if (par->vyres < par->yres)
906  par->vyres = par->yres;
907 
908  par->sync = var->sync;
909 
910  if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram)
911  return -EINVAL;
912 
913  if (par->xoffset + par->xres > par->vxres)
914  par->xoffset = par->vxres - par->xres;
915  if (par->yoffset + par->yres > par->vyres)
916  par->yoffset = par->vyres - par->yres;
917 
918  pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN:
919  var->pixclock;
920  if (calc_clock_params(pixclock, r->clock_params))
921  return -EINVAL;
922 
923  hperiod = ((var->left_margin + par->xres + var->right_margin
924  + var->hsync_len) >> 1) - 2;
925  hssync = hperiod + 1;
926  hsblank = hssync - (var->right_margin >> 1);
927  hesync = (var->hsync_len >> 1) - 1;
928  heblank = (var->left_margin >> 1) + hesync;
929  piped = heblank - piped_diff;
930  heq = var->hsync_len >> 2;
931  hlfln = (hperiod+2) >> 1;
932  hserr = hssync-hesync;
933  vperiod = (var->vsync_len + var->lower_margin + par->yres
934  + var->upper_margin) << 1;
935  vssync = vperiod - 2;
936  vesync = (var->vsync_len << 1) - vperiod + vssync;
937  veblank = (var->upper_margin << 1) + vesync;
938  vsblank = vssync - (var->lower_margin << 1);
939  vswin = (vsblank+vssync) >> 1;
940  vewin = (vesync+veblank) >> 1;
941 
942  r->regs[0] = vswin;
943  r->regs[1] = vsblank;
944  r->regs[2] = veblank;
945  r->regs[3] = vewin;
946  r->regs[4] = vesync;
947  r->regs[5] = vssync;
948  r->regs[6] = vperiod;
949  r->regs[7] = piped;
950  r->regs[8] = hperiod;
951  r->regs[9] = hsblank;
952  r->regs[10] = heblank;
953  r->regs[11] = hesync;
954  r->regs[12] = hssync;
955  r->regs[13] = heq;
956  r->regs[14] = hlfln;
957  r->regs[15] = hserr;
958 
959  if (par->xres >= 1280 && par->cmode >= CMODE_16)
960  par->ctrl = 0x7f;
961  else
962  par->ctrl = 0x3b;
963 
964  if (mac_var_to_vmode(var, &par->vmode, &cmode))
965  par->vmode = 0;
966 
967  return 0;
968 }
969 
970 
971 /*
972  * Convert hardware data in par to an fb_var_screeninfo
973  */
974 
975 static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var)
976 {
977  struct control_regints *rv;
978 
979  rv = (struct control_regints *) par->regvals.regs;
980 
981  memset(var, 0, sizeof(*var));
982  var->xres = par->xres;
983  var->yres = par->yres;
984  var->xres_virtual = par->vxres;
985  var->yres_virtual = par->vyres;
986  var->xoffset = par->xoffset;
987  var->yoffset = par->yoffset;
988 
989  switch(par->cmode) {
990  default:
991  case CMODE_8:
992  var->bits_per_pixel = 8;
993  var->red.length = 8;
994  var->green.length = 8;
995  var->blue.length = 8;
996  break;
997  case CMODE_16: /* RGB 555 */
998  var->bits_per_pixel = 16;
999  var->red.offset = 10;
1000  var->red.length = 5;
1001  var->green.offset = 5;
1002  var->green.length = 5;
1003  var->blue.length = 5;
1004  break;
1005  case CMODE_32: /* RGB 888 */
1006  var->bits_per_pixel = 32;
1007  var->red.offset = 16;
1008  var->red.length = 8;
1009  var->green.offset = 8;
1010  var->green.length = 8;
1011  var->blue.length = 8;
1012  var->transp.offset = 24;
1013  var->transp.length = 8;
1014  break;
1015  }
1016  var->height = -1;
1017  var->width = -1;
1018  var->vmode = FB_VMODE_NONINTERLACED;
1019 
1020  var->left_margin = (rv->heblank - rv->hesync) << 1;
1021  var->right_margin = (rv->hssync - rv->hsblank) << 1;
1022  var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1;
1023 
1024  var->upper_margin = (rv->veblank - rv->vesync) >> 1;
1025  var->lower_margin = (rv->vssync - rv->vsblank) >> 1;
1026  var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1;
1027 
1028  var->sync = par->sync;
1029 
1030  /*
1031  * 10^12 * clock_params[0] / (3906400 * clock_params[1]
1032  * * 2^clock_params[2])
1033  * (10^12 * clock_params[0] / (3906400 * clock_params[1]))
1034  * >> clock_params[2]
1035  */
1036  /* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */
1037  var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0];
1038  var->pixclock /= par->regvals.clock_params[1];
1039  var->pixclock >>= par->regvals.clock_params[2];
1040 }
1041 
1042 /*
1043  * Set misc info vars for this driver
1044  */
1045 static void __init control_init_info(struct fb_info *info, struct fb_info_control *p)
1046 {
1047  /* Fill fb_info */
1048  info->par = &p->par;
1049  info->fbops = &controlfb_ops;
1050  info->pseudo_palette = p->pseudo_palette;
1051  info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1052  info->screen_base = p->frame_buffer + CTRLFB_OFF;
1053 
1054  fb_alloc_cmap(&info->cmap, 256, 0);
1055 
1056  /* Fill fix common fields */
1057  strcpy(info->fix.id, "control");
1058  info->fix.mmio_start = p->control_regs_phys;
1059  info->fix.mmio_len = sizeof(struct control_regs);
1060  info->fix.type = FB_TYPE_PACKED_PIXELS;
1061  info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF;
1062  info->fix.smem_len = p->total_vram - CTRLFB_OFF;
1063  info->fix.ywrapstep = 0;
1064  info->fix.type_aux = 0;
1065  info->fix.accel = FB_ACCEL_NONE;
1066 }
1067 
1068 
1069 static void control_cleanup(void)
1070 {
1071  struct fb_info_control *p = control_fb;
1072 
1073  if (!p)
1074  return;
1075 
1076  if (p->cmap_regs)
1077  iounmap(p->cmap_regs);
1078  if (p->control_regs)
1079  iounmap(p->control_regs);
1080  if (p->frame_buffer) {
1081  if (p->control_use_bank2)
1082  p->frame_buffer -= 0x600000;
1083  iounmap(p->frame_buffer);
1084  }
1085  if (p->cmap_regs_phys)
1086  release_mem_region(p->cmap_regs_phys, 0x1000);
1087  if (p->control_regs_phys)
1088  release_mem_region(p->control_regs_phys, p->control_regs_size);
1089  if (p->fb_orig_base)
1090  release_mem_region(p->fb_orig_base, p->fb_orig_size);
1091  kfree(p);
1092 }
1093 
1094 
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