Linux Kernel
3.7.1
|
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include "cthw20k2.h"
#include "ct20k2reg.h"
Go to the source code of this file.
Data Structures | |
struct | hw20k2 |
union | src_dirty |
struct | src_rsc_ctrl_blk |
union | src_mgr_dirty |
struct | src_mgr_ctrl_blk |
struct | srcimap |
union | srcimp_mgr_dirty |
struct | srcimp_mgr_ctrl_blk |
union | amixer_dirty |
struct | amixer_rsc_ctrl_blk |
union | dai_dirty |
struct | dai_ctrl_blk |
struct | daoimap |
union | dao_dirty |
struct | dao_ctrl_blk |
union | daio_mgr_dirty |
struct | daio_mgr_ctrl_blk |
struct | dac_conf |
struct | adc_conf |
struct | daio_conf |
struct | trn_conf |
struct | regs_cs4382 |
Macros | |
#define | CT_XFI_DMA_MASK DMA_BIT_MASK(64) /* 64 bit PTE */ |
#define | SRCCTL_STATE 0x00000007 |
#define | SRCCTL_BM 0x00000008 |
#define | SRCCTL_RSR 0x00000030 |
#define | SRCCTL_SF 0x000001C0 |
#define | SRCCTL_WR 0x00000200 |
#define | SRCCTL_PM 0x00000400 |
#define | SRCCTL_ROM 0x00001800 |
#define | SRCCTL_VO 0x00002000 |
#define | SRCCTL_ST 0x00004000 |
#define | SRCCTL_IE 0x00008000 |
#define | SRCCTL_ILSZ 0x000F0000 |
#define | SRCCTL_BP 0x00100000 |
#define | SRCCCR_CISZ 0x000007FF |
#define | SRCCCR_CWA 0x001FF800 |
#define | SRCCCR_D 0x00200000 |
#define | SRCCCR_RS 0x01C00000 |
#define | SRCCCR_NAL 0x3E000000 |
#define | SRCCCR_RA 0xC0000000 |
#define | SRCCA_CA 0x0FFFFFFF |
#define | SRCCA_RS 0xE0000000 |
#define | SRCSA_SA 0x0FFFFFFF |
#define | SRCLA_LA 0x0FFFFFFF |
#define | MPRLH_PITCH 0xFFFFFFFF |
#define | SRCAIM_ARC 0x00000FFF |
#define | SRCAIM_NXT 0x00FF0000 |
#define | SRCAIM_SRC 0xFF000000 |
#define | AR_SLOT_SIZE 4096 |
#define | AR_SLOT_BLOCK_SIZE 16 |
#define | AR_PTS_PITCH 6 |
#define | AR_PARAM_SRC_OFFSET 0x60 |
#define | AMOPLO_M 0x00000003 |
#define | AMOPLO_IV 0x00000004 |
#define | AMOPLO_X 0x0003FFF0 |
#define | AMOPLO_Y 0xFFFC0000 |
#define | AMOPHI_SADR 0x000000FF |
#define | AMOPHI_SE 0x80000000 |
#define | SRTCTL_SRCO 0x000000FF |
#define | SRTCTL_SRCM 0x0000FF00 |
#define | SRTCTL_RSR 0x00030000 |
#define | SRTCTL_DRAT 0x00300000 |
#define | SRTCTL_EC 0x01000000 |
#define | SRTCTL_ET 0x10000000 |
#define | AIM_ARC 0x00000FFF |
#define | AIM_NXT 0x007F0000 |
#define | ATXCTL_EN 0x00000001 |
#define | ATXCTL_MODE 0x00000010 |
#define | ATXCTL_CD 0x00000020 |
#define | ATXCTL_RAW 0x00000100 |
#define | ATXCTL_MT 0x00000200 |
#define | ATXCTL_NUC 0x00003000 |
#define | ATXCTL_BEN 0x00010000 |
#define | ATXCTL_BMUX 0x00700000 |
#define | ATXCTL_B24 0x01000000 |
#define | ATXCTL_CPF 0x02000000 |
#define | ATXCTL_RIV 0x10000000 |
#define | ATXCTL_LIV 0x20000000 |
#define | ATXCTL_RSAT 0x40000000 |
#define | ATXCTL_LSAT 0x80000000 |
#define | ARXCTL_EN 0x00000001 |
#define | GCTL_AIE 0x00000001 |
#define | GCTL_UAA 0x00000002 |
#define | GCTL_DPC 0x00000004 |
#define | GCTL_DBP 0x00000008 |
#define | GCTL_ABP 0x00000010 |
#define | GCTL_TBP 0x00000020 |
#define | GCTL_SBP 0x00000040 |
#define | GCTL_FBP 0x00000080 |
#define | GCTL_ME 0x00000100 |
#define | GCTL_AID 0x00001000 |
#define | PLLCTL_SRC 0x00000007 |
#define | PLLCTL_SPE 0x00000008 |
#define | PLLCTL_RD 0x000000F0 |
#define | PLLCTL_FD 0x0001FF00 |
#define | PLLCTL_OD 0x00060000 |
#define | PLLCTL_B 0x00080000 |
#define | PLLCTL_AS 0x00100000 |
#define | PLLCTL_LF 0x03E00000 |
#define | PLLCTL_SPS 0x1C000000 |
#define | PLLCTL_AD 0x60000000 |
#define | PLLSTAT_CCS 0x00000007 |
#define | PLLSTAT_SPL 0x00000008 |
#define | PLLSTAT_CRD 0x000000F0 |
#define | PLLSTAT_CFD 0x0001FF00 |
#define | PLLSTAT_SL 0x00020000 |
#define | PLLSTAT_FAS 0x00040000 |
#define | PLLSTAT_B 0x00080000 |
#define | PLLSTAT_PD 0x00100000 |
#define | PLLSTAT_OCA 0x00200000 |
#define | PLLSTAT_NCA 0x00400000 |
#define | CS4382_MC1 0x1 |
#define | CS4382_MC2 0x2 |
#define | CS4382_MC3 0x3 |
#define | CS4382_FC 0x4 |
#define | CS4382_IC 0x5 |
#define | CS4382_XC1 0x6 |
#define | CS4382_VCA1 0x7 |
#define | CS4382_VCB1 0x8 |
#define | CS4382_XC2 0x9 |
#define | CS4382_VCA2 0xA |
#define | CS4382_VCB2 0xB |
#define | CS4382_XC3 0xC |
#define | CS4382_VCA3 0xD |
#define | CS4382_VCB3 0xE |
#define | CS4382_XC4 0xF |
#define | CS4382_VCA4 0x10 |
#define | CS4382_VCB4 0x11 |
#define | CS4382_CREV 0x12 |
#define | STATE_LOCKED 0x00 |
#define | STATE_UNLOCKED 0xAA |
#define | DATA_READY 0x800000 /* Used with I2C_IF_STATUS */ |
#define | DATA_ABORT 0x10000 /* Used with I2C_IF_STATUS */ |
#define | I2C_STATUS_DCM 0x00000001 |
#define | I2C_STATUS_BC 0x00000006 |
#define | I2C_STATUS_APD 0x00000008 |
#define | I2C_STATUS_AB 0x00010000 |
#define | I2C_STATUS_DR 0x00800000 |
#define | I2C_ADDRESS_PTAD 0x0000FFFF |
#define | I2C_ADDRESS_SLAD 0x007F0000 |
#define | MAKE_WM8775_ADDR(addr, data) (u32)(((addr<<1)&0xFE)|((data>>8)&0x1)) |
#define | MAKE_WM8775_DATA(data) (u32)(data&0xFF) |
#define | WM8775_IC 0x0B |
#define | WM8775_MMC 0x0C |
#define | WM8775_AADCL 0x0E |
#define | WM8775_AADCR 0x0F |
#define | WM8775_ADCMC 0x15 |
#define | WM8775_RESET 0x17 |
#define | MIC_BOOST_0DB 0xCF |
#define | MIC_BOOST_STEPS_PER_DB 2 |
Functions | |
int __devinit | create_20k2_hw_obj (struct hw **rhw) |
int | destroy_20k2_hw_obj (struct hw *hw) |
#define AIM_ARC 0x00000FFF |
Definition at line 762 of file cthw20k2.c.
#define AIM_NXT 0x007F0000 |
Definition at line 763 of file cthw20k2.c.
#define AMOPHI_SADR 0x000000FF |
Definition at line 589 of file cthw20k2.c.
#define AMOPHI_SE 0x80000000 |
Definition at line 590 of file cthw20k2.c.
#define AMOPLO_IV 0x00000004 |
Definition at line 585 of file cthw20k2.c.
#define AMOPLO_M 0x00000003 |
Definition at line 584 of file cthw20k2.c.
#define AMOPLO_X 0x0003FFF0 |
Definition at line 586 of file cthw20k2.c.
#define AMOPLO_Y 0xFFFC0000 |
Definition at line 587 of file cthw20k2.c.
#define AR_PARAM_SRC_OFFSET 0x60 |
Definition at line 360 of file cthw20k2.c.
#define AR_PTS_PITCH 6 |
Definition at line 359 of file cthw20k2.c.
#define AR_SLOT_BLOCK_SIZE 16 |
Definition at line 358 of file cthw20k2.c.
#define AR_SLOT_SIZE 4096 |
Definition at line 357 of file cthw20k2.c.
#define ARXCTL_EN 0x00000001 |
Definition at line 803 of file cthw20k2.c.
#define ATXCTL_B24 0x01000000 |
Definition at line 779 of file cthw20k2.c.
#define ATXCTL_BEN 0x00010000 |
Definition at line 777 of file cthw20k2.c.
#define ATXCTL_BMUX 0x00700000 |
Definition at line 778 of file cthw20k2.c.
#define ATXCTL_CD 0x00000020 |
Definition at line 773 of file cthw20k2.c.
#define ATXCTL_CPF 0x02000000 |
Definition at line 780 of file cthw20k2.c.
#define ATXCTL_EN 0x00000001 |
Definition at line 771 of file cthw20k2.c.
#define ATXCTL_LIV 0x20000000 |
Definition at line 782 of file cthw20k2.c.
#define ATXCTL_LSAT 0x80000000 |
Definition at line 784 of file cthw20k2.c.
#define ATXCTL_MODE 0x00000010 |
Definition at line 772 of file cthw20k2.c.
#define ATXCTL_MT 0x00000200 |
Definition at line 775 of file cthw20k2.c.
#define ATXCTL_NUC 0x00003000 |
Definition at line 776 of file cthw20k2.c.
#define ATXCTL_RAW 0x00000100 |
Definition at line 774 of file cthw20k2.c.
#define ATXCTL_RIV 0x10000000 |
Definition at line 781 of file cthw20k2.c.
#define ATXCTL_RSAT 0x40000000 |
Definition at line 783 of file cthw20k2.c.
#define CS4382_CREV 0x12 |
Definition at line 1405 of file cthw20k2.c.
#define CS4382_FC 0x4 |
Definition at line 1391 of file cthw20k2.c.
#define CS4382_IC 0x5 |
Definition at line 1392 of file cthw20k2.c.
#define CS4382_MC1 0x1 |
Definition at line 1388 of file cthw20k2.c.
#define CS4382_MC2 0x2 |
Definition at line 1389 of file cthw20k2.c.
#define CS4382_MC3 0x3 |
Definition at line 1390 of file cthw20k2.c.
#define CS4382_VCA1 0x7 |
Definition at line 1394 of file cthw20k2.c.
#define CS4382_VCA2 0xA |
Definition at line 1397 of file cthw20k2.c.
#define CS4382_VCA3 0xD |
Definition at line 1400 of file cthw20k2.c.
#define CS4382_VCA4 0x10 |
Definition at line 1403 of file cthw20k2.c.
#define CS4382_VCB1 0x8 |
Definition at line 1395 of file cthw20k2.c.
#define CS4382_VCB2 0xB |
Definition at line 1398 of file cthw20k2.c.
#define CS4382_VCB3 0xE |
Definition at line 1401 of file cthw20k2.c.
#define CS4382_VCB4 0x11 |
Definition at line 1404 of file cthw20k2.c.
#define CS4382_XC1 0x6 |
Definition at line 1393 of file cthw20k2.c.
#define CS4382_XC2 0x9 |
Definition at line 1396 of file cthw20k2.c.
#define CS4382_XC3 0xC |
Definition at line 1399 of file cthw20k2.c.
#define CS4382_XC4 0xF |
Definition at line 1402 of file cthw20k2.c.
#define CT_XFI_DMA_MASK DMA_BIT_MASK(64) /* 64 bit PTE */ |
Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
This source file is released under GPL v2 license (no other versions). See the COPYING file included in the main directory of this source distribution for the license terms and conditions.
cthw20k2.c
This file contains the implementation of hardware access method for 20k2.
Liu Chun May 14 2008
Definition at line 32 of file cthw20k2.c.
#define DATA_ABORT 0x10000 /* Used with I2C_IF_STATUS */ |
Definition at line 1411 of file cthw20k2.c.
#define DATA_READY 0x800000 /* Used with I2C_IF_STATUS */ |
Definition at line 1410 of file cthw20k2.c.
#define GCTL_ABP 0x00000010 |
Definition at line 1281 of file cthw20k2.c.
#define GCTL_AID 0x00001000 |
Definition at line 1286 of file cthw20k2.c.
#define GCTL_AIE 0x00000001 |
Definition at line 1277 of file cthw20k2.c.
#define GCTL_DBP 0x00000008 |
Definition at line 1280 of file cthw20k2.c.
#define GCTL_DPC 0x00000004 |
Definition at line 1279 of file cthw20k2.c.
#define GCTL_FBP 0x00000080 |
Definition at line 1284 of file cthw20k2.c.
#define GCTL_ME 0x00000100 |
Definition at line 1285 of file cthw20k2.c.
#define GCTL_SBP 0x00000040 |
Definition at line 1283 of file cthw20k2.c.
#define GCTL_TBP 0x00000020 |
Definition at line 1282 of file cthw20k2.c.
#define GCTL_UAA 0x00000002 |
Definition at line 1278 of file cthw20k2.c.
#define I2C_ADDRESS_PTAD 0x0000FFFF |
Definition at line 1419 of file cthw20k2.c.
#define I2C_ADDRESS_SLAD 0x007F0000 |
Definition at line 1420 of file cthw20k2.c.
#define I2C_STATUS_AB 0x00010000 |
Definition at line 1416 of file cthw20k2.c.
#define I2C_STATUS_APD 0x00000008 |
Definition at line 1415 of file cthw20k2.c.
#define I2C_STATUS_BC 0x00000006 |
Definition at line 1414 of file cthw20k2.c.
#define I2C_STATUS_DCM 0x00000001 |
Definition at line 1413 of file cthw20k2.c.
#define I2C_STATUS_DR 0x00800000 |
Definition at line 1417 of file cthw20k2.c.
Definition at line 1754 of file cthw20k2.c.
Definition at line 1755 of file cthw20k2.c.
#define MIC_BOOST_0DB 0xCF |
Definition at line 1786 of file cthw20k2.c.
#define MIC_BOOST_STEPS_PER_DB 2 |
Definition at line 1787 of file cthw20k2.c.
#define MPRLH_PITCH 0xFFFFFFFF |
Definition at line 87 of file cthw20k2.c.
#define PLLCTL_AD 0x60000000 |
Definition at line 1297 of file cthw20k2.c.
#define PLLCTL_AS 0x00100000 |
Definition at line 1294 of file cthw20k2.c.
#define PLLCTL_B 0x00080000 |
Definition at line 1293 of file cthw20k2.c.
#define PLLCTL_FD 0x0001FF00 |
Definition at line 1291 of file cthw20k2.c.
#define PLLCTL_LF 0x03E00000 |
Definition at line 1295 of file cthw20k2.c.
#define PLLCTL_OD 0x00060000 |
Definition at line 1292 of file cthw20k2.c.
#define PLLCTL_RD 0x000000F0 |
Definition at line 1290 of file cthw20k2.c.
#define PLLCTL_SPE 0x00000008 |
Definition at line 1289 of file cthw20k2.c.
#define PLLCTL_SPS 0x1C000000 |
Definition at line 1296 of file cthw20k2.c.
#define PLLCTL_SRC 0x00000007 |
Definition at line 1288 of file cthw20k2.c.
#define PLLSTAT_B 0x00080000 |
Definition at line 1305 of file cthw20k2.c.
#define PLLSTAT_CCS 0x00000007 |
Definition at line 1299 of file cthw20k2.c.
#define PLLSTAT_CFD 0x0001FF00 |
Definition at line 1302 of file cthw20k2.c.
#define PLLSTAT_CRD 0x000000F0 |
Definition at line 1301 of file cthw20k2.c.
#define PLLSTAT_FAS 0x00040000 |
Definition at line 1304 of file cthw20k2.c.
#define PLLSTAT_NCA 0x00400000 |
Definition at line 1308 of file cthw20k2.c.
#define PLLSTAT_OCA 0x00200000 |
Definition at line 1307 of file cthw20k2.c.
#define PLLSTAT_PD 0x00100000 |
Definition at line 1306 of file cthw20k2.c.
#define PLLSTAT_SL 0x00020000 |
Definition at line 1303 of file cthw20k2.c.
#define PLLSTAT_SPL 0x00000008 |
Definition at line 1300 of file cthw20k2.c.
#define SRCAIM_ARC 0x00000FFF |
Definition at line 138 of file cthw20k2.c.
#define SRCAIM_NXT 0x00FF0000 |
Definition at line 139 of file cthw20k2.c.
#define SRCAIM_SRC 0xFF000000 |
Definition at line 140 of file cthw20k2.c.
#define SRCCA_CA 0x0FFFFFFF |
Definition at line 78 of file cthw20k2.c.
#define SRCCA_RS 0xE0000000 |
Definition at line 79 of file cthw20k2.c.
#define SRCCCR_CISZ 0x000007FF |
Definition at line 71 of file cthw20k2.c.
#define SRCCCR_CWA 0x001FF800 |
Definition at line 72 of file cthw20k2.c.
#define SRCCCR_D 0x00200000 |
Definition at line 73 of file cthw20k2.c.
#define SRCCCR_NAL 0x3E000000 |
Definition at line 75 of file cthw20k2.c.
#define SRCCCR_RA 0xC0000000 |
Definition at line 76 of file cthw20k2.c.
#define SRCCCR_RS 0x01C00000 |
Definition at line 74 of file cthw20k2.c.
#define SRCCTL_BM 0x00000008 |
Definition at line 59 of file cthw20k2.c.
#define SRCCTL_BP 0x00100000 |
Definition at line 69 of file cthw20k2.c.
#define SRCCTL_IE 0x00008000 |
Definition at line 67 of file cthw20k2.c.
#define SRCCTL_ILSZ 0x000F0000 |
Definition at line 68 of file cthw20k2.c.
#define SRCCTL_PM 0x00000400 |
Definition at line 63 of file cthw20k2.c.
#define SRCCTL_ROM 0x00001800 |
Definition at line 64 of file cthw20k2.c.
#define SRCCTL_RSR 0x00000030 |
Definition at line 60 of file cthw20k2.c.
#define SRCCTL_SF 0x000001C0 |
Definition at line 61 of file cthw20k2.c.
#define SRCCTL_ST 0x00004000 |
Definition at line 66 of file cthw20k2.c.
#define SRCCTL_STATE 0x00000007 |
Definition at line 58 of file cthw20k2.c.
#define SRCCTL_VO 0x00002000 |
Definition at line 65 of file cthw20k2.c.
#define SRCCTL_WR 0x00000200 |
Definition at line 62 of file cthw20k2.c.
#define SRCLA_LA 0x0FFFFFFF |
Definition at line 83 of file cthw20k2.c.
#define SRCSA_SA 0x0FFFFFFF |
Definition at line 81 of file cthw20k2.c.
#define SRTCTL_DRAT 0x00300000 |
Definition at line 742 of file cthw20k2.c.
#define SRTCTL_EC 0x01000000 |
Definition at line 743 of file cthw20k2.c.
#define SRTCTL_ET 0x10000000 |
Definition at line 744 of file cthw20k2.c.
#define SRTCTL_RSR 0x00030000 |
Definition at line 741 of file cthw20k2.c.
#define SRTCTL_SRCM 0x0000FF00 |
Definition at line 740 of file cthw20k2.c.
#define SRTCTL_SRCO 0x000000FF |
Definition at line 739 of file cthw20k2.c.
#define STATE_LOCKED 0x00 |
Definition at line 1408 of file cthw20k2.c.
#define STATE_UNLOCKED 0xAA |
Definition at line 1409 of file cthw20k2.c.
#define WM8775_AADCL 0x0E |
Definition at line 1759 of file cthw20k2.c.
#define WM8775_AADCR 0x0F |
Definition at line 1760 of file cthw20k2.c.
#define WM8775_ADCMC 0x15 |
Definition at line 1761 of file cthw20k2.c.
#define WM8775_IC 0x0B |
Definition at line 1757 of file cthw20k2.c.
#define WM8775_MMC 0x0C |
Definition at line 1758 of file cthw20k2.c.
#define WM8775_RESET 0x17 |
Definition at line 1762 of file cthw20k2.c.
Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
This source file is released under GPL v2 license (no other versions). See the COPYING file included in the main directory of this source distribution for the license terms and conditions.
cthw20k2.h
This file contains the definition of hardware access methord.
Liu Chun May 13 2008
Definition at line 2348 of file cthw20k2.c.
Definition at line 2363 of file cthw20k2.c.