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Data Structures | Macros
denali.h File Reference
#include <linux/mtd/nand.h>

Go to the source code of this file.

Data Structures

struct  nand_buf
 
struct  denali_nand_info
 

Macros

#define DEVICE_RESET   0x0
 
#define DEVICE_RESET__BANK0   0x0001
 
#define DEVICE_RESET__BANK1   0x0002
 
#define DEVICE_RESET__BANK2   0x0004
 
#define DEVICE_RESET__BANK3   0x0008
 
#define TRANSFER_SPARE_REG   0x10
 
#define TRANSFER_SPARE_REG__FLAG   0x0001
 
#define LOAD_WAIT_CNT   0x20
 
#define LOAD_WAIT_CNT__VALUE   0xffff
 
#define PROGRAM_WAIT_CNT   0x30
 
#define PROGRAM_WAIT_CNT__VALUE   0xffff
 
#define ERASE_WAIT_CNT   0x40
 
#define ERASE_WAIT_CNT__VALUE   0xffff
 
#define INT_MON_CYCCNT   0x50
 
#define INT_MON_CYCCNT__VALUE   0xffff
 
#define RB_PIN_ENABLED   0x60
 
#define RB_PIN_ENABLED__BANK0   0x0001
 
#define RB_PIN_ENABLED__BANK1   0x0002
 
#define RB_PIN_ENABLED__BANK2   0x0004
 
#define RB_PIN_ENABLED__BANK3   0x0008
 
#define MULTIPLANE_OPERATION   0x70
 
#define MULTIPLANE_OPERATION__FLAG   0x0001
 
#define MULTIPLANE_READ_ENABLE   0x80
 
#define MULTIPLANE_READ_ENABLE__FLAG   0x0001
 
#define COPYBACK_DISABLE   0x90
 
#define COPYBACK_DISABLE__FLAG   0x0001
 
#define CACHE_WRITE_ENABLE   0xa0
 
#define CACHE_WRITE_ENABLE__FLAG   0x0001
 
#define CACHE_READ_ENABLE   0xb0
 
#define CACHE_READ_ENABLE__FLAG   0x0001
 
#define PREFETCH_MODE   0xc0
 
#define PREFETCH_MODE__PREFETCH_EN   0x0001
 
#define PREFETCH_MODE__PREFETCH_BURST_LENGTH   0xfff0
 
#define CHIP_ENABLE_DONT_CARE   0xd0
 
#define CHIP_EN_DONT_CARE__FLAG   0x01
 
#define ECC_ENABLE   0xe0
 
#define ECC_ENABLE__FLAG   0x0001
 
#define GLOBAL_INT_ENABLE   0xf0
 
#define GLOBAL_INT_EN_FLAG   0x01
 
#define WE_2_RE   0x100
 
#define WE_2_RE__VALUE   0x003f
 
#define ADDR_2_DATA   0x110
 
#define ADDR_2_DATA__VALUE   0x003f
 
#define RE_2_WE   0x120
 
#define RE_2_WE__VALUE   0x003f
 
#define ACC_CLKS   0x130
 
#define ACC_CLKS__VALUE   0x000f
 
#define NUMBER_OF_PLANES   0x140
 
#define NUMBER_OF_PLANES__VALUE   0x0007
 
#define PAGES_PER_BLOCK   0x150
 
#define PAGES_PER_BLOCK__VALUE   0xffff
 
#define DEVICE_WIDTH   0x160
 
#define DEVICE_WIDTH__VALUE   0x0003
 
#define DEVICE_MAIN_AREA_SIZE   0x170
 
#define DEVICE_MAIN_AREA_SIZE__VALUE   0xffff
 
#define DEVICE_SPARE_AREA_SIZE   0x180
 
#define DEVICE_SPARE_AREA_SIZE__VALUE   0xffff
 
#define TWO_ROW_ADDR_CYCLES   0x190
 
#define TWO_ROW_ADDR_CYCLES__FLAG   0x0001
 
#define MULTIPLANE_ADDR_RESTRICT   0x1a0
 
#define MULTIPLANE_ADDR_RESTRICT__FLAG   0x0001
 
#define ECC_CORRECTION   0x1b0
 
#define ECC_CORRECTION__VALUE   0x001f
 
#define READ_MODE   0x1c0
 
#define READ_MODE__VALUE   0x000f
 
#define WRITE_MODE   0x1d0
 
#define WRITE_MODE__VALUE   0x000f
 
#define COPYBACK_MODE   0x1e0
 
#define COPYBACK_MODE__VALUE   0x000f
 
#define RDWR_EN_LO_CNT   0x1f0
 
#define RDWR_EN_LO_CNT__VALUE   0x001f
 
#define RDWR_EN_HI_CNT   0x200
 
#define RDWR_EN_HI_CNT__VALUE   0x001f
 
#define MAX_RD_DELAY   0x210
 
#define MAX_RD_DELAY__VALUE   0x000f
 
#define CS_SETUP_CNT   0x220
 
#define CS_SETUP_CNT__VALUE   0x001f
 
#define SPARE_AREA_SKIP_BYTES   0x230
 
#define SPARE_AREA_SKIP_BYTES__VALUE   0x003f
 
#define SPARE_AREA_MARKER   0x240
 
#define SPARE_AREA_MARKER__VALUE   0xffff
 
#define DEVICES_CONNECTED   0x250
 
#define DEVICES_CONNECTED__VALUE   0x0007
 
#define DIE_MASK   0x260
 
#define DIE_MASK__VALUE   0x00ff
 
#define FIRST_BLOCK_OF_NEXT_PLANE   0x270
 
#define FIRST_BLOCK_OF_NEXT_PLANE__VALUE   0xffff
 
#define WRITE_PROTECT   0x280
 
#define WRITE_PROTECT__FLAG   0x0001
 
#define RE_2_RE   0x290
 
#define RE_2_RE__VALUE   0x003f
 
#define MANUFACTURER_ID   0x300
 
#define MANUFACTURER_ID__VALUE   0x00ff
 
#define DEVICE_ID   0x310
 
#define DEVICE_ID__VALUE   0x00ff
 
#define DEVICE_PARAM_0   0x320
 
#define DEVICE_PARAM_0__VALUE   0x00ff
 
#define DEVICE_PARAM_1   0x330
 
#define DEVICE_PARAM_1__VALUE   0x00ff
 
#define DEVICE_PARAM_2   0x340
 
#define DEVICE_PARAM_2__VALUE   0x00ff
 
#define LOGICAL_PAGE_DATA_SIZE   0x350
 
#define LOGICAL_PAGE_DATA_SIZE__VALUE   0xffff
 
#define LOGICAL_PAGE_SPARE_SIZE   0x360
 
#define LOGICAL_PAGE_SPARE_SIZE__VALUE   0xffff
 
#define REVISION   0x370
 
#define REVISION__VALUE   0xffff
 
#define ONFI_DEVICE_FEATURES   0x380
 
#define ONFI_DEVICE_FEATURES__VALUE   0x003f
 
#define ONFI_OPTIONAL_COMMANDS   0x390
 
#define ONFI_OPTIONAL_COMMANDS__VALUE   0x003f
 
#define ONFI_TIMING_MODE   0x3a0
 
#define ONFI_TIMING_MODE__VALUE   0x003f
 
#define ONFI_PGM_CACHE_TIMING_MODE   0x3b0
 
#define ONFI_PGM_CACHE_TIMING_MODE__VALUE   0x003f
 
#define ONFI_DEVICE_NO_OF_LUNS   0x3c0
 
#define ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS   0x00ff
 
#define ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE   0x0100
 
#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L   0x3d0
 
#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L__VALUE   0xffff
 
#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U   0x3e0
 
#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U__VALUE   0xffff
 
#define FEATURES   0x3f0
 
#define FEATURES__N_BANKS   0x0003
 
#define FEATURES__ECC_MAX_ERR   0x003c
 
#define FEATURES__DMA   0x0040
 
#define FEATURES__CMD_DMA   0x0080
 
#define FEATURES__PARTITION   0x0100
 
#define FEATURES__XDMA_SIDEBAND   0x0200
 
#define FEATURES__GPREG   0x0400
 
#define FEATURES__INDEX_ADDR   0x0800
 
#define TRANSFER_MODE   0x400
 
#define TRANSFER_MODE__VALUE   0x0003
 
#define INTR_STATUS(__bank)   (0x410 + ((__bank) * 0x50))
 
#define INTR_EN(__bank)   (0x420 + ((__bank) * 0x50))
 
#define INTR_STATUS__ECC_TRANSACTION_DONE   0x0001
 
#define INTR_STATUS__ECC_ERR   0x0002
 
#define INTR_STATUS__DMA_CMD_COMP   0x0004
 
#define INTR_STATUS__TIME_OUT   0x0008
 
#define INTR_STATUS__PROGRAM_FAIL   0x0010
 
#define INTR_STATUS__ERASE_FAIL   0x0020
 
#define INTR_STATUS__LOAD_COMP   0x0040
 
#define INTR_STATUS__PROGRAM_COMP   0x0080
 
#define INTR_STATUS__ERASE_COMP   0x0100
 
#define INTR_STATUS__PIPE_CPYBCK_CMD_COMP   0x0200
 
#define INTR_STATUS__LOCKED_BLK   0x0400
 
#define INTR_STATUS__UNSUP_CMD   0x0800
 
#define INTR_STATUS__INT_ACT   0x1000
 
#define INTR_STATUS__RST_COMP   0x2000
 
#define INTR_STATUS__PIPE_CMD_ERR   0x4000
 
#define INTR_STATUS__PAGE_XFER_INC   0x8000
 
#define INTR_EN__ECC_TRANSACTION_DONE   0x0001
 
#define INTR_EN__ECC_ERR   0x0002
 
#define INTR_EN__DMA_CMD_COMP   0x0004
 
#define INTR_EN__TIME_OUT   0x0008
 
#define INTR_EN__PROGRAM_FAIL   0x0010
 
#define INTR_EN__ERASE_FAIL   0x0020
 
#define INTR_EN__LOAD_COMP   0x0040
 
#define INTR_EN__PROGRAM_COMP   0x0080
 
#define INTR_EN__ERASE_COMP   0x0100
 
#define INTR_EN__PIPE_CPYBCK_CMD_COMP   0x0200
 
#define INTR_EN__LOCKED_BLK   0x0400
 
#define INTR_EN__UNSUP_CMD   0x0800
 
#define INTR_EN__INT_ACT   0x1000
 
#define INTR_EN__RST_COMP   0x2000
 
#define INTR_EN__PIPE_CMD_ERR   0x4000
 
#define INTR_EN__PAGE_XFER_INC   0x8000
 
#define PAGE_CNT(__bank)   (0x430 + ((__bank) * 0x50))
 
#define ERR_PAGE_ADDR(__bank)   (0x440 + ((__bank) * 0x50))
 
#define ERR_BLOCK_ADDR(__bank)   (0x450 + ((__bank) * 0x50))
 
#define DATA_INTR   0x550
 
#define DATA_INTR__WRITE_SPACE_AV   0x0001
 
#define DATA_INTR__READ_DATA_AV   0x0002
 
#define DATA_INTR_EN   0x560
 
#define DATA_INTR_EN__WRITE_SPACE_AV   0x0001
 
#define DATA_INTR_EN__READ_DATA_AV   0x0002
 
#define GPREG_0   0x570
 
#define GPREG_0__VALUE   0xffff
 
#define GPREG_1   0x580
 
#define GPREG_1__VALUE   0xffff
 
#define GPREG_2   0x590
 
#define GPREG_2__VALUE   0xffff
 
#define GPREG_3   0x5a0
 
#define GPREG_3__VALUE   0xffff
 
#define ECC_THRESHOLD   0x600
 
#define ECC_THRESHOLD__VALUE   0x03ff
 
#define ECC_ERROR_BLOCK_ADDRESS   0x610
 
#define ECC_ERROR_BLOCK_ADDRESS__VALUE   0xffff
 
#define ECC_ERROR_PAGE_ADDRESS   0x620
 
#define ECC_ERROR_PAGE_ADDRESS__VALUE   0x0fff
 
#define ECC_ERROR_PAGE_ADDRESS__BANK   0xf000
 
#define ECC_ERROR_ADDRESS   0x630
 
#define ECC_ERROR_ADDRESS__OFFSET   0x0fff
 
#define ECC_ERROR_ADDRESS__SECTOR_NR   0xf000
 
#define ERR_CORRECTION_INFO   0x640
 
#define ERR_CORRECTION_INFO__BYTEMASK   0x00ff
 
#define ERR_CORRECTION_INFO__DEVICE_NR   0x0f00
 
#define ERR_CORRECTION_INFO__ERROR_TYPE   0x4000
 
#define ERR_CORRECTION_INFO__LAST_ERR_INFO   0x8000
 
#define DMA_ENABLE   0x700
 
#define DMA_ENABLE__FLAG   0x0001
 
#define IGNORE_ECC_DONE   0x710
 
#define IGNORE_ECC_DONE__FLAG   0x0001
 
#define DMA_INTR   0x720
 
#define DMA_INTR__TARGET_ERROR   0x0001
 
#define DMA_INTR__DESC_COMP_CHANNEL0   0x0002
 
#define DMA_INTR__DESC_COMP_CHANNEL1   0x0004
 
#define DMA_INTR__DESC_COMP_CHANNEL2   0x0008
 
#define DMA_INTR__DESC_COMP_CHANNEL3   0x0010
 
#define DMA_INTR__MEMCOPY_DESC_COMP   0x0020
 
#define DMA_INTR_EN   0x730
 
#define DMA_INTR_EN__TARGET_ERROR   0x0001
 
#define DMA_INTR_EN__DESC_COMP_CHANNEL0   0x0002
 
#define DMA_INTR_EN__DESC_COMP_CHANNEL1   0x0004
 
#define DMA_INTR_EN__DESC_COMP_CHANNEL2   0x0008
 
#define DMA_INTR_EN__DESC_COMP_CHANNEL3   0x0010
 
#define DMA_INTR_EN__MEMCOPY_DESC_COMP   0x0020
 
#define TARGET_ERR_ADDR_LO   0x740
 
#define TARGET_ERR_ADDR_LO__VALUE   0xffff
 
#define TARGET_ERR_ADDR_HI   0x750
 
#define TARGET_ERR_ADDR_HI__VALUE   0xffff
 
#define CHNL_ACTIVE   0x760
 
#define CHNL_ACTIVE__CHANNEL0   0x0001
 
#define CHNL_ACTIVE__CHANNEL1   0x0002
 
#define CHNL_ACTIVE__CHANNEL2   0x0004
 
#define CHNL_ACTIVE__CHANNEL3   0x0008
 
#define ACTIVE_SRC_ID   0x800
 
#define ACTIVE_SRC_ID__VALUE   0x00ff
 
#define PTN_INTR   0x810
 
#define PTN_INTR__CONFIG_ERROR   0x0001
 
#define PTN_INTR__ACCESS_ERROR_BANK0   0x0002
 
#define PTN_INTR__ACCESS_ERROR_BANK1   0x0004
 
#define PTN_INTR__ACCESS_ERROR_BANK2   0x0008
 
#define PTN_INTR__ACCESS_ERROR_BANK3   0x0010
 
#define PTN_INTR__REG_ACCESS_ERROR   0x0020
 
#define PTN_INTR_EN   0x820
 
#define PTN_INTR_EN__CONFIG_ERROR   0x0001
 
#define PTN_INTR_EN__ACCESS_ERROR_BANK0   0x0002
 
#define PTN_INTR_EN__ACCESS_ERROR_BANK1   0x0004
 
#define PTN_INTR_EN__ACCESS_ERROR_BANK2   0x0008
 
#define PTN_INTR_EN__ACCESS_ERROR_BANK3   0x0010
 
#define PTN_INTR_EN__REG_ACCESS_ERROR   0x0020
 
#define PERM_SRC_ID(__bank)   (0x830 + ((__bank) * 0x40))
 
#define PERM_SRC_ID__SRCID   0x00ff
 
#define PERM_SRC_ID__DIRECT_ACCESS_ACTIVE   0x0800
 
#define PERM_SRC_ID__WRITE_ACTIVE   0x2000
 
#define PERM_SRC_ID__READ_ACTIVE   0x4000
 
#define PERM_SRC_ID__PARTITION_VALID   0x8000
 
#define MIN_BLK_ADDR(__bank)   (0x840 + ((__bank) * 0x40))
 
#define MIN_BLK_ADDR__VALUE   0xffff
 
#define MAX_BLK_ADDR(__bank)   (0x850 + ((__bank) * 0x40))
 
#define MAX_BLK_ADDR__VALUE   0xffff
 
#define MIN_MAX_BANK(__bank)   (0x860 + ((__bank) * 0x40))
 
#define MIN_MAX_BANK__MIN_VALUE   0x0003
 
#define MIN_MAX_BANK__MAX_VALUE   0x000c
 
#define CLEAR   0 /*use this to clear a field instead of "fail"*/
 
#define SET   1 /*use this to set a field instead of "pass"*/
 
#define FAIL   1 /*failed flag*/
 
#define PASS   0 /*success flag*/
 
#define ERR   -1 /*error flag*/
 
#define GOOD_BLOCK   0
 
#define DEFECTIVE_BLOCK   1
 
#define READ_ERROR   2
 
#define CLK_X   5
 
#define CLK_MULTI   4
 
#define CMD_DMA   0
 
#define SPECTRA_PARTITION_ID   0
 
#define SPECTRA_START_BLOCK   3
 
#define NUM_FREE_BLOCKS_GATE   30
 
#define SCRATCH_REG_ADDR   CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR
 
#define SCRATCH_REG_SIZE   64
 
#define GLOB_HWCTL_DEFAULT_BLKS   2048
 
#define SUPPORT_15BITECC   1
 
#define SUPPORT_8BITECC   1
 
#define CUSTOM_CONF_PARAMS   0
 
#define ONFI_BLOOM_TIME   1
 
#define MODE5_WORKAROUND   0
 
#define _LLD_NAND_
 
#define MODE_00   0x00000000
 
#define MODE_01   0x04000000
 
#define MODE_10   0x08000000
 
#define MODE_11   0x0C000000
 
#define DATA_TRANSFER_MODE   0
 
#define PROTECTION_PER_BLOCK   1
 
#define LOAD_WAIT_COUNT   2
 
#define PROGRAM_WAIT_COUNT   3
 
#define ERASE_WAIT_COUNT   4
 
#define INT_MONITOR_CYCLE_COUNT   5
 
#define READ_BUSY_PIN_ENABLED   6
 
#define MULTIPLANE_OPERATION_SUPPORT   7
 
#define PRE_FETCH_MODE   8
 
#define CE_DONT_CARE_SUPPORT   9
 
#define COPYBACK_SUPPORT   10
 
#define CACHE_WRITE_SUPPORT   11
 
#define CACHE_READ_SUPPORT   12
 
#define NUM_PAGES_IN_BLOCK   13
 
#define ECC_ENABLE_SELECT   14
 
#define WRITE_ENABLE_2_READ_ENABLE   15
 
#define ADDRESS_2_DATA   16
 
#define READ_ENABLE_2_WRITE_ENABLE   17
 
#define TWO_ROW_ADDRESS_CYCLES   18
 
#define MULTIPLANE_ADDRESS_RESTRICT   19
 
#define ACC_CLOCKS   20
 
#define READ_WRITE_ENABLE_LOW_COUNT   21
 
#define READ_WRITE_ENABLE_HIGH_COUNT   22
 
#define ECC_SECTOR_SIZE   512
 
#define DENALI_BUF_SIZE   (NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE)
 
#define INTEL_CE4100   1
 
#define INTEL_MRST   2
 

Macro Definition Documentation

#define _LLD_NAND_

Definition at line 424 of file denali.h.

#define ACC_CLKS   0x130

Definition at line 86 of file denali.h.

#define ACC_CLKS__VALUE   0x000f

Definition at line 87 of file denali.h.

#define ACC_CLOCKS   20

Definition at line 452 of file denali.h.

#define ACTIVE_SRC_ID   0x800

Definition at line 329 of file denali.h.

#define ACTIVE_SRC_ID__VALUE   0x00ff

Definition at line 330 of file denali.h.

#define ADDR_2_DATA   0x110

Definition at line 80 of file denali.h.

#define ADDR_2_DATA__VALUE   0x003f

Definition at line 81 of file denali.h.

#define ADDRESS_2_DATA   16

Definition at line 448 of file denali.h.

#define CACHE_READ_ENABLE   0xb0

Definition at line 61 of file denali.h.

#define CACHE_READ_ENABLE__FLAG   0x0001

Definition at line 62 of file denali.h.

#define CACHE_READ_SUPPORT   12

Definition at line 444 of file denali.h.

#define CACHE_WRITE_ENABLE   0xa0

Definition at line 58 of file denali.h.

#define CACHE_WRITE_ENABLE__FLAG   0x0001

Definition at line 59 of file denali.h.

#define CACHE_WRITE_SUPPORT   11

Definition at line 443 of file denali.h.

#define CE_DONT_CARE_SUPPORT   9

Definition at line 441 of file denali.h.

#define CHIP_EN_DONT_CARE__FLAG   0x01

Definition at line 69 of file denali.h.

#define CHIP_ENABLE_DONT_CARE   0xd0

Definition at line 68 of file denali.h.

#define CHNL_ACTIVE   0x760

Definition at line 323 of file denali.h.

#define CHNL_ACTIVE__CHANNEL0   0x0001

Definition at line 324 of file denali.h.

#define CHNL_ACTIVE__CHANNEL1   0x0002

Definition at line 325 of file denali.h.

#define CHNL_ACTIVE__CHANNEL2   0x0004

Definition at line 326 of file denali.h.

#define CHNL_ACTIVE__CHANNEL3   0x0008

Definition at line 327 of file denali.h.

#define CLEAR   0 /*use this to clear a field instead of "fail"*/

Definition at line 367 of file denali.h.

#define CLK_MULTI   4

Definition at line 379 of file denali.h.

#define CLK_X   5

Definition at line 378 of file denali.h.

#define CMD_DMA   0

Definition at line 382 of file denali.h.

#define COPYBACK_DISABLE   0x90

Definition at line 55 of file denali.h.

#define COPYBACK_DISABLE__FLAG   0x0001

Definition at line 56 of file denali.h.

#define COPYBACK_MODE   0x1e0

Definition at line 119 of file denali.h.

#define COPYBACK_MODE__VALUE   0x000f

Definition at line 120 of file denali.h.

#define COPYBACK_SUPPORT   10

Definition at line 442 of file denali.h.

#define CS_SETUP_CNT   0x220

Definition at line 131 of file denali.h.

#define CS_SETUP_CNT__VALUE   0x001f

Definition at line 132 of file denali.h.

#define CUSTOM_CONF_PARAMS   0

Definition at line 398 of file denali.h.

#define DATA_INTR   0x550

Definition at line 255 of file denali.h.

#define DATA_INTR__READ_DATA_AV   0x0002

Definition at line 257 of file denali.h.

#define DATA_INTR__WRITE_SPACE_AV   0x0001

Definition at line 256 of file denali.h.

#define DATA_INTR_EN   0x560

Definition at line 259 of file denali.h.

#define DATA_INTR_EN__READ_DATA_AV   0x0002

Definition at line 261 of file denali.h.

#define DATA_INTR_EN__WRITE_SPACE_AV   0x0001

Definition at line 260 of file denali.h.

#define DATA_TRANSFER_MODE   0

Definition at line 432 of file denali.h.

#define DEFECTIVE_BLOCK   1

Definition at line 375 of file denali.h.

#define DENALI_BUF_SIZE   (NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE)

Definition at line 458 of file denali.h.

#define DEVICE_ID   0x310

Definition at line 158 of file denali.h.

#define DEVICE_ID__VALUE   0x00ff

Definition at line 159 of file denali.h.

#define DEVICE_MAIN_AREA_SIZE   0x170

Definition at line 98 of file denali.h.

#define DEVICE_MAIN_AREA_SIZE__VALUE   0xffff

Definition at line 99 of file denali.h.

#define DEVICE_PARAM_0   0x320

Definition at line 161 of file denali.h.

#define DEVICE_PARAM_0__VALUE   0x00ff

Definition at line 162 of file denali.h.

#define DEVICE_PARAM_1   0x330

Definition at line 164 of file denali.h.

#define DEVICE_PARAM_1__VALUE   0x00ff

Definition at line 165 of file denali.h.

#define DEVICE_PARAM_2   0x340

Definition at line 167 of file denali.h.

#define DEVICE_PARAM_2__VALUE   0x00ff

Definition at line 168 of file denali.h.

#define DEVICE_RESET   0x0

Definition at line 22 of file denali.h.

#define DEVICE_RESET__BANK0   0x0001

Definition at line 23 of file denali.h.

#define DEVICE_RESET__BANK1   0x0002

Definition at line 24 of file denali.h.

#define DEVICE_RESET__BANK2   0x0004

Definition at line 25 of file denali.h.

#define DEVICE_RESET__BANK3   0x0008

Definition at line 26 of file denali.h.

#define DEVICE_SPARE_AREA_SIZE   0x180

Definition at line 101 of file denali.h.

#define DEVICE_SPARE_AREA_SIZE__VALUE   0xffff

Definition at line 102 of file denali.h.

#define DEVICE_WIDTH   0x160

Definition at line 95 of file denali.h.

#define DEVICE_WIDTH__VALUE   0x0003

Definition at line 96 of file denali.h.

#define DEVICES_CONNECTED   0x250

Definition at line 140 of file denali.h.

#define DEVICES_CONNECTED__VALUE   0x0007

Definition at line 141 of file denali.h.

#define DIE_MASK   0x260

Definition at line 143 of file denali.h.

#define DIE_MASK__VALUE   0x00ff

Definition at line 144 of file denali.h.

#define DMA_ENABLE   0x700

Definition at line 295 of file denali.h.

#define DMA_ENABLE__FLAG   0x0001

Definition at line 296 of file denali.h.

#define DMA_INTR   0x720

Definition at line 301 of file denali.h.

#define DMA_INTR__DESC_COMP_CHANNEL0   0x0002

Definition at line 303 of file denali.h.

#define DMA_INTR__DESC_COMP_CHANNEL1   0x0004

Definition at line 304 of file denali.h.

#define DMA_INTR__DESC_COMP_CHANNEL2   0x0008

Definition at line 305 of file denali.h.

#define DMA_INTR__DESC_COMP_CHANNEL3   0x0010

Definition at line 306 of file denali.h.

#define DMA_INTR__MEMCOPY_DESC_COMP   0x0020

Definition at line 307 of file denali.h.

#define DMA_INTR__TARGET_ERROR   0x0001

Definition at line 302 of file denali.h.

#define DMA_INTR_EN   0x730

Definition at line 309 of file denali.h.

#define DMA_INTR_EN__DESC_COMP_CHANNEL0   0x0002

Definition at line 311 of file denali.h.

#define DMA_INTR_EN__DESC_COMP_CHANNEL1   0x0004

Definition at line 312 of file denali.h.

#define DMA_INTR_EN__DESC_COMP_CHANNEL2   0x0008

Definition at line 313 of file denali.h.

#define DMA_INTR_EN__DESC_COMP_CHANNEL3   0x0010

Definition at line 314 of file denali.h.

#define DMA_INTR_EN__MEMCOPY_DESC_COMP   0x0020

Definition at line 315 of file denali.h.

#define DMA_INTR_EN__TARGET_ERROR   0x0001

Definition at line 310 of file denali.h.

#define ECC_CORRECTION   0x1b0

Definition at line 110 of file denali.h.

#define ECC_CORRECTION__VALUE   0x001f

Definition at line 111 of file denali.h.

#define ECC_ENABLE   0xe0

Definition at line 71 of file denali.h.

#define ECC_ENABLE__FLAG   0x0001

Definition at line 72 of file denali.h.

#define ECC_ENABLE_SELECT   14

Definition at line 446 of file denali.h.

#define ECC_ERROR_ADDRESS   0x630

Definition at line 285 of file denali.h.

#define ECC_ERROR_ADDRESS__OFFSET   0x0fff

Definition at line 286 of file denali.h.

#define ECC_ERROR_ADDRESS__SECTOR_NR   0xf000

Definition at line 287 of file denali.h.

#define ECC_ERROR_BLOCK_ADDRESS   0x610

Definition at line 278 of file denali.h.

#define ECC_ERROR_BLOCK_ADDRESS__VALUE   0xffff

Definition at line 279 of file denali.h.

#define ECC_ERROR_PAGE_ADDRESS   0x620

Definition at line 281 of file denali.h.

#define ECC_ERROR_PAGE_ADDRESS__BANK   0xf000

Definition at line 283 of file denali.h.

#define ECC_ERROR_PAGE_ADDRESS__VALUE   0x0fff

Definition at line 282 of file denali.h.

#define ECC_SECTOR_SIZE   512

Definition at line 456 of file denali.h.

#define ECC_THRESHOLD   0x600

Definition at line 275 of file denali.h.

#define ECC_THRESHOLD__VALUE   0x03ff

Definition at line 276 of file denali.h.

#define ERASE_WAIT_CNT   0x40

Definition at line 37 of file denali.h.

#define ERASE_WAIT_CNT__VALUE   0xffff

Definition at line 38 of file denali.h.

#define ERASE_WAIT_COUNT   4

Definition at line 436 of file denali.h.

#define ERR   -1 /*error flag*/

Definition at line 371 of file denali.h.

#define ERR_BLOCK_ADDR (   __bank)    (0x450 + ((__bank) * 0x50))

Definition at line 253 of file denali.h.

#define ERR_CORRECTION_INFO   0x640

Definition at line 289 of file denali.h.

#define ERR_CORRECTION_INFO__BYTEMASK   0x00ff

Definition at line 290 of file denali.h.

#define ERR_CORRECTION_INFO__DEVICE_NR   0x0f00

Definition at line 291 of file denali.h.

#define ERR_CORRECTION_INFO__ERROR_TYPE   0x4000

Definition at line 292 of file denali.h.

#define ERR_CORRECTION_INFO__LAST_ERR_INFO   0x8000

Definition at line 293 of file denali.h.

#define ERR_PAGE_ADDR (   __bank)    (0x440 + ((__bank) * 0x50))

Definition at line 252 of file denali.h.

#define FAIL   1 /*failed flag*/

Definition at line 369 of file denali.h.

#define FEATURES   0x3f0

Definition at line 201 of file denali.h.

#define FEATURES__CMD_DMA   0x0080

Definition at line 205 of file denali.h.

#define FEATURES__DMA   0x0040

Definition at line 204 of file denali.h.

#define FEATURES__ECC_MAX_ERR   0x003c

Definition at line 203 of file denali.h.

#define FEATURES__GPREG   0x0400

Definition at line 208 of file denali.h.

#define FEATURES__INDEX_ADDR   0x0800

Definition at line 209 of file denali.h.

#define FEATURES__N_BANKS   0x0003

Definition at line 202 of file denali.h.

#define FEATURES__PARTITION   0x0100

Definition at line 206 of file denali.h.

#define FEATURES__XDMA_SIDEBAND   0x0200

Definition at line 207 of file denali.h.

#define FIRST_BLOCK_OF_NEXT_PLANE   0x270

Definition at line 146 of file denali.h.

#define FIRST_BLOCK_OF_NEXT_PLANE__VALUE   0xffff

Definition at line 147 of file denali.h.

#define GLOB_HWCTL_DEFAULT_BLKS   2048

Definition at line 393 of file denali.h.

#define GLOBAL_INT_EN_FLAG   0x01

Definition at line 75 of file denali.h.

#define GLOBAL_INT_ENABLE   0xf0

Definition at line 74 of file denali.h.

#define GOOD_BLOCK   0

Definition at line 374 of file denali.h.

#define GPREG_0   0x570

Definition at line 263 of file denali.h.

#define GPREG_0__VALUE   0xffff

Definition at line 264 of file denali.h.

#define GPREG_1   0x580

Definition at line 266 of file denali.h.

#define GPREG_1__VALUE   0xffff

Definition at line 267 of file denali.h.

#define GPREG_2   0x590

Definition at line 269 of file denali.h.

#define GPREG_2__VALUE   0xffff

Definition at line 270 of file denali.h.

#define GPREG_3   0x5a0

Definition at line 272 of file denali.h.

#define GPREG_3__VALUE   0xffff

Definition at line 273 of file denali.h.

#define IGNORE_ECC_DONE   0x710

Definition at line 298 of file denali.h.

#define IGNORE_ECC_DONE__FLAG   0x0001

Definition at line 299 of file denali.h.

#define INT_MON_CYCCNT   0x50

Definition at line 40 of file denali.h.

#define INT_MON_CYCCNT__VALUE   0xffff

Definition at line 41 of file denali.h.

#define INT_MONITOR_CYCLE_COUNT   5

Definition at line 437 of file denali.h.

#define INTEL_CE4100   1

Definition at line 467 of file denali.h.

#define INTEL_MRST   2

Definition at line 468 of file denali.h.

#define INTR_EN (   __bank)    (0x420 + ((__bank) * 0x50))

Definition at line 215 of file denali.h.

#define INTR_EN__DMA_CMD_COMP   0x0004

Definition at line 236 of file denali.h.

#define INTR_EN__ECC_ERR   0x0002

Definition at line 235 of file denali.h.

#define INTR_EN__ECC_TRANSACTION_DONE   0x0001

Definition at line 234 of file denali.h.

#define INTR_EN__ERASE_COMP   0x0100

Definition at line 242 of file denali.h.

#define INTR_EN__ERASE_FAIL   0x0020

Definition at line 239 of file denali.h.

#define INTR_EN__INT_ACT   0x1000

Definition at line 246 of file denali.h.

#define INTR_EN__LOAD_COMP   0x0040

Definition at line 240 of file denali.h.

#define INTR_EN__LOCKED_BLK   0x0400

Definition at line 244 of file denali.h.

#define INTR_EN__PAGE_XFER_INC   0x8000

Definition at line 249 of file denali.h.

#define INTR_EN__PIPE_CMD_ERR   0x4000

Definition at line 248 of file denali.h.

#define INTR_EN__PIPE_CPYBCK_CMD_COMP   0x0200

Definition at line 243 of file denali.h.

#define INTR_EN__PROGRAM_COMP   0x0080

Definition at line 241 of file denali.h.

#define INTR_EN__PROGRAM_FAIL   0x0010

Definition at line 238 of file denali.h.

#define INTR_EN__RST_COMP   0x2000

Definition at line 247 of file denali.h.

#define INTR_EN__TIME_OUT   0x0008

Definition at line 237 of file denali.h.

#define INTR_EN__UNSUP_CMD   0x0800

Definition at line 245 of file denali.h.

#define INTR_STATUS (   __bank)    (0x410 + ((__bank) * 0x50))

Definition at line 214 of file denali.h.

#define INTR_STATUS__DMA_CMD_COMP   0x0004

Definition at line 219 of file denali.h.

#define INTR_STATUS__ECC_ERR   0x0002

Definition at line 218 of file denali.h.

#define INTR_STATUS__ECC_TRANSACTION_DONE   0x0001

Definition at line 217 of file denali.h.

#define INTR_STATUS__ERASE_COMP   0x0100

Definition at line 225 of file denali.h.

#define INTR_STATUS__ERASE_FAIL   0x0020

Definition at line 222 of file denali.h.

#define INTR_STATUS__INT_ACT   0x1000

Definition at line 229 of file denali.h.

#define INTR_STATUS__LOAD_COMP   0x0040

Definition at line 223 of file denali.h.

#define INTR_STATUS__LOCKED_BLK   0x0400

Definition at line 227 of file denali.h.

#define INTR_STATUS__PAGE_XFER_INC   0x8000

Definition at line 232 of file denali.h.

#define INTR_STATUS__PIPE_CMD_ERR   0x4000

Definition at line 231 of file denali.h.

#define INTR_STATUS__PIPE_CPYBCK_CMD_COMP   0x0200

Definition at line 226 of file denali.h.

#define INTR_STATUS__PROGRAM_COMP   0x0080

Definition at line 224 of file denali.h.

#define INTR_STATUS__PROGRAM_FAIL   0x0010

Definition at line 221 of file denali.h.

#define INTR_STATUS__RST_COMP   0x2000

Definition at line 230 of file denali.h.

#define INTR_STATUS__TIME_OUT   0x0008

Definition at line 220 of file denali.h.

#define INTR_STATUS__UNSUP_CMD   0x0800

Definition at line 228 of file denali.h.

#define LOAD_WAIT_CNT   0x20

Definition at line 31 of file denali.h.

#define LOAD_WAIT_CNT__VALUE   0xffff

Definition at line 32 of file denali.h.

#define LOAD_WAIT_COUNT   2

Definition at line 434 of file denali.h.

#define LOGICAL_PAGE_DATA_SIZE   0x350

Definition at line 170 of file denali.h.

#define LOGICAL_PAGE_DATA_SIZE__VALUE   0xffff

Definition at line 171 of file denali.h.

#define LOGICAL_PAGE_SPARE_SIZE   0x360

Definition at line 173 of file denali.h.

#define LOGICAL_PAGE_SPARE_SIZE__VALUE   0xffff

Definition at line 174 of file denali.h.

#define MANUFACTURER_ID   0x300

Definition at line 155 of file denali.h.

#define MANUFACTURER_ID__VALUE   0x00ff

Definition at line 156 of file denali.h.

#define MAX_BLK_ADDR (   __bank)    (0x850 + ((__bank) * 0x40))

Definition at line 358 of file denali.h.

#define MAX_BLK_ADDR__VALUE   0xffff

Definition at line 359 of file denali.h.

#define MAX_RD_DELAY   0x210

Definition at line 128 of file denali.h.

#define MAX_RD_DELAY__VALUE   0x000f

Definition at line 129 of file denali.h.

#define MIN_BLK_ADDR (   __bank)    (0x840 + ((__bank) * 0x40))

Definition at line 355 of file denali.h.

#define MIN_BLK_ADDR__VALUE   0xffff

Definition at line 356 of file denali.h.

#define MIN_MAX_BANK (   __bank)    (0x860 + ((__bank) * 0x40))

Definition at line 361 of file denali.h.

#define MIN_MAX_BANK__MAX_VALUE   0x000c

Definition at line 363 of file denali.h.

#define MIN_MAX_BANK__MIN_VALUE   0x0003

Definition at line 362 of file denali.h.

#define MODE5_WORKAROUND   0

Definition at line 401 of file denali.h.

#define MODE_00   0x00000000

Definition at line 426 of file denali.h.

#define MODE_01   0x04000000

Definition at line 427 of file denali.h.

#define MODE_10   0x08000000

Definition at line 428 of file denali.h.

#define MODE_11   0x0C000000

Definition at line 429 of file denali.h.

#define MULTIPLANE_ADDR_RESTRICT   0x1a0

Definition at line 107 of file denali.h.

#define MULTIPLANE_ADDR_RESTRICT__FLAG   0x0001

Definition at line 108 of file denali.h.

#define MULTIPLANE_ADDRESS_RESTRICT   19

Definition at line 451 of file denali.h.

#define MULTIPLANE_OPERATION   0x70

Definition at line 49 of file denali.h.

#define MULTIPLANE_OPERATION__FLAG   0x0001

Definition at line 50 of file denali.h.

#define MULTIPLANE_OPERATION_SUPPORT   7

Definition at line 439 of file denali.h.

#define MULTIPLANE_READ_ENABLE   0x80

Definition at line 52 of file denali.h.

#define MULTIPLANE_READ_ENABLE__FLAG   0x0001

Definition at line 53 of file denali.h.

#define NUM_FREE_BLOCKS_GATE   30

Definition at line 387 of file denali.h.

#define NUM_PAGES_IN_BLOCK   13

Definition at line 445 of file denali.h.

#define NUMBER_OF_PLANES   0x140

Definition at line 89 of file denali.h.

#define NUMBER_OF_PLANES__VALUE   0x0007

Definition at line 90 of file denali.h.

#define ONFI_BLOOM_TIME   1

Definition at line 400 of file denali.h.

#define ONFI_DEVICE_FEATURES   0x380

Definition at line 179 of file denali.h.

#define ONFI_DEVICE_FEATURES__VALUE   0x003f

Definition at line 180 of file denali.h.

#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L   0x3d0

Definition at line 195 of file denali.h.

#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L__VALUE   0xffff

Definition at line 196 of file denali.h.

#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U   0x3e0

Definition at line 198 of file denali.h.

#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U__VALUE   0xffff

Definition at line 199 of file denali.h.

#define ONFI_DEVICE_NO_OF_LUNS   0x3c0

Definition at line 191 of file denali.h.

#define ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS   0x00ff

Definition at line 192 of file denali.h.

#define ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE   0x0100

Definition at line 193 of file denali.h.

#define ONFI_OPTIONAL_COMMANDS   0x390

Definition at line 182 of file denali.h.

#define ONFI_OPTIONAL_COMMANDS__VALUE   0x003f

Definition at line 183 of file denali.h.

#define ONFI_PGM_CACHE_TIMING_MODE   0x3b0

Definition at line 188 of file denali.h.

#define ONFI_PGM_CACHE_TIMING_MODE__VALUE   0x003f

Definition at line 189 of file denali.h.

#define ONFI_TIMING_MODE   0x3a0

Definition at line 185 of file denali.h.

#define ONFI_TIMING_MODE__VALUE   0x003f

Definition at line 186 of file denali.h.

#define PAGE_CNT (   __bank)    (0x430 + ((__bank) * 0x50))

Definition at line 251 of file denali.h.

#define PAGES_PER_BLOCK   0x150

Definition at line 92 of file denali.h.

#define PAGES_PER_BLOCK__VALUE   0xffff

Definition at line 93 of file denali.h.

#define PASS   0 /*success flag*/

Definition at line 370 of file denali.h.

#define PERM_SRC_ID (   __bank)    (0x830 + ((__bank) * 0x40))

Definition at line 348 of file denali.h.

#define PERM_SRC_ID__DIRECT_ACCESS_ACTIVE   0x0800

Definition at line 350 of file denali.h.

#define PERM_SRC_ID__PARTITION_VALID   0x8000

Definition at line 353 of file denali.h.

#define PERM_SRC_ID__READ_ACTIVE   0x4000

Definition at line 352 of file denali.h.

#define PERM_SRC_ID__SRCID   0x00ff

Definition at line 349 of file denali.h.

#define PERM_SRC_ID__WRITE_ACTIVE   0x2000

Definition at line 351 of file denali.h.

#define PRE_FETCH_MODE   8

Definition at line 440 of file denali.h.

#define PREFETCH_MODE   0xc0

Definition at line 64 of file denali.h.

#define PREFETCH_MODE__PREFETCH_BURST_LENGTH   0xfff0

Definition at line 66 of file denali.h.

#define PREFETCH_MODE__PREFETCH_EN   0x0001

Definition at line 65 of file denali.h.

#define PROGRAM_WAIT_CNT   0x30

Definition at line 34 of file denali.h.

#define PROGRAM_WAIT_CNT__VALUE   0xffff

Definition at line 35 of file denali.h.

#define PROGRAM_WAIT_COUNT   3

Definition at line 435 of file denali.h.

#define PROTECTION_PER_BLOCK   1

Definition at line 433 of file denali.h.

#define PTN_INTR   0x810

Definition at line 332 of file denali.h.

#define PTN_INTR__ACCESS_ERROR_BANK0   0x0002

Definition at line 334 of file denali.h.

#define PTN_INTR__ACCESS_ERROR_BANK1   0x0004

Definition at line 335 of file denali.h.

#define PTN_INTR__ACCESS_ERROR_BANK2   0x0008

Definition at line 336 of file denali.h.

#define PTN_INTR__ACCESS_ERROR_BANK3   0x0010

Definition at line 337 of file denali.h.

#define PTN_INTR__CONFIG_ERROR   0x0001

Definition at line 333 of file denali.h.

#define PTN_INTR__REG_ACCESS_ERROR   0x0020

Definition at line 338 of file denali.h.

#define PTN_INTR_EN   0x820

Definition at line 340 of file denali.h.

#define PTN_INTR_EN__ACCESS_ERROR_BANK0   0x0002

Definition at line 342 of file denali.h.

#define PTN_INTR_EN__ACCESS_ERROR_BANK1   0x0004

Definition at line 343 of file denali.h.

#define PTN_INTR_EN__ACCESS_ERROR_BANK2   0x0008

Definition at line 344 of file denali.h.

#define PTN_INTR_EN__ACCESS_ERROR_BANK3   0x0010

Definition at line 345 of file denali.h.

#define PTN_INTR_EN__CONFIG_ERROR   0x0001

Definition at line 341 of file denali.h.

#define PTN_INTR_EN__REG_ACCESS_ERROR   0x0020

Definition at line 346 of file denali.h.

#define RB_PIN_ENABLED   0x60

Definition at line 43 of file denali.h.

#define RB_PIN_ENABLED__BANK0   0x0001

Definition at line 44 of file denali.h.

#define RB_PIN_ENABLED__BANK1   0x0002

Definition at line 45 of file denali.h.

#define RB_PIN_ENABLED__BANK2   0x0004

Definition at line 46 of file denali.h.

#define RB_PIN_ENABLED__BANK3   0x0008

Definition at line 47 of file denali.h.

#define RDWR_EN_HI_CNT   0x200

Definition at line 125 of file denali.h.

#define RDWR_EN_HI_CNT__VALUE   0x001f

Definition at line 126 of file denali.h.

#define RDWR_EN_LO_CNT   0x1f0

Definition at line 122 of file denali.h.

#define RDWR_EN_LO_CNT__VALUE   0x001f

Definition at line 123 of file denali.h.

#define RE_2_RE   0x290

Definition at line 152 of file denali.h.

#define RE_2_RE__VALUE   0x003f

Definition at line 153 of file denali.h.

#define RE_2_WE   0x120

Definition at line 83 of file denali.h.

#define RE_2_WE__VALUE   0x003f

Definition at line 84 of file denali.h.

#define READ_BUSY_PIN_ENABLED   6

Definition at line 438 of file denali.h.

#define READ_ENABLE_2_WRITE_ENABLE   17

Definition at line 449 of file denali.h.

#define READ_ERROR   2

Definition at line 376 of file denali.h.

#define READ_MODE   0x1c0

Definition at line 113 of file denali.h.

#define READ_MODE__VALUE   0x000f

Definition at line 114 of file denali.h.

#define READ_WRITE_ENABLE_HIGH_COUNT   22

Definition at line 454 of file denali.h.

#define READ_WRITE_ENABLE_LOW_COUNT   21

Definition at line 453 of file denali.h.

#define REVISION   0x370

Definition at line 176 of file denali.h.

#define REVISION__VALUE   0xffff

Definition at line 177 of file denali.h.

#define SCRATCH_REG_ADDR   CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR

Definition at line 390 of file denali.h.

#define SCRATCH_REG_SIZE   64

Definition at line 391 of file denali.h.

#define SET   1 /*use this to set a field instead of "pass"*/

Definition at line 368 of file denali.h.

#define SPARE_AREA_MARKER   0x240

Definition at line 137 of file denali.h.

#define SPARE_AREA_MARKER__VALUE   0xffff

Definition at line 138 of file denali.h.

#define SPARE_AREA_SKIP_BYTES   0x230

Definition at line 134 of file denali.h.

#define SPARE_AREA_SKIP_BYTES__VALUE   0x003f

Definition at line 135 of file denali.h.

#define SPECTRA_PARTITION_ID   0

Definition at line 384 of file denali.h.

#define SPECTRA_START_BLOCK   3

Definition at line 386 of file denali.h.

#define SUPPORT_15BITECC   1

Definition at line 395 of file denali.h.

#define SUPPORT_8BITECC   1

Definition at line 396 of file denali.h.

#define TARGET_ERR_ADDR_HI   0x750

Definition at line 320 of file denali.h.

#define TARGET_ERR_ADDR_HI__VALUE   0xffff

Definition at line 321 of file denali.h.

#define TARGET_ERR_ADDR_LO   0x740

Definition at line 317 of file denali.h.

#define TARGET_ERR_ADDR_LO__VALUE   0xffff

Definition at line 318 of file denali.h.

#define TRANSFER_MODE   0x400

Definition at line 211 of file denali.h.

#define TRANSFER_MODE__VALUE   0x0003

Definition at line 212 of file denali.h.

#define TRANSFER_SPARE_REG   0x10

Definition at line 28 of file denali.h.

#define TRANSFER_SPARE_REG__FLAG   0x0001

Definition at line 29 of file denali.h.

#define TWO_ROW_ADDR_CYCLES   0x190

Definition at line 104 of file denali.h.

#define TWO_ROW_ADDR_CYCLES__FLAG   0x0001

Definition at line 105 of file denali.h.

#define TWO_ROW_ADDRESS_CYCLES   18

Definition at line 450 of file denali.h.

#define WE_2_RE   0x100

Definition at line 77 of file denali.h.

#define WE_2_RE__VALUE   0x003f

Definition at line 78 of file denali.h.

#define WRITE_ENABLE_2_READ_ENABLE   15

Definition at line 447 of file denali.h.

#define WRITE_MODE   0x1d0

Definition at line 116 of file denali.h.

#define WRITE_MODE__VALUE   0x000f

Definition at line 117 of file denali.h.

#define WRITE_PROTECT   0x280

Definition at line 149 of file denali.h.

#define WRITE_PROTECT__FLAG   0x0001

Definition at line 150 of file denali.h.