dev-ahci.c File Reference

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/ahci_platform.h>
#include <plat/cpu.h>
#include <mach/irqs.h>
#include <mach/map.h>
#include <mach/regs-pmu.h>

Go to the source code of this file.

Data Structures
struct	phy_reg

Macros
#define	SATA_CTRL0   0x0
#define	SATA_CTRL1   0x4
#define	SATA_PHY_STATUS   0x8
#define	SATA_CTRL0_RX_DATA_VALID(x)   (x << 27)
#define	SATA_CTRL0_SPEED_MODE   (1 << 26)
#define	SATA_CTRL0_M_PHY_CAL   (1 << 19)
#define	SATA_CTRL0_PHY_CMU_RST_N   (1 << 10)
#define	SATA_CTRL0_M_PHY_LN_RST_N   (1 << 9)
#define	SATA_CTRL0_PHY_POR_N   (1 << 8)
#define	SATA_CTRL1_RST_PMALIVE_N   (1 << 8)
#define	SATA_CTRL1_RST_RXOOB_N   (1 << 7)
#define	SATA_CTRL1_RST_RX_N   (1 << 6)
#define	SATA_CTRL1_RST_TX_N   (1 << 5)
#define	SATA_PHY_STATUS_CMU_OK   (1 << 18)
#define	SATA_PHY_STATUS_LANE_OK   (1 << 16)
#define	LANE0   0x200
#define	COM_LANE   0xA00
#define	HOST_PORTS_IMPL   0xC
#define	SCLK_SATA_FREQ   (67 * MHZ)

Variables
struct platform_device	exynos4_device_ahci

Macro Definition Documentation

#define COM_LANE   0xA00

Definition at line 48 of file dev-ahci.c.

#define HOST_PORTS_IMPL   0xC

Definition at line 50 of file dev-ahci.c.

#define LANE0   0x200

Definition at line 47 of file dev-ahci.c.

#define SATA_CTRL0   0x0

Definition at line 26 of file dev-ahci.c.

#define SATA_CTRL0_M_PHY_CAL   (1 << 19)

Definition at line 34 of file dev-ahci.c.

#define SATA_CTRL0_M_PHY_LN_RST_N   (1 << 9)

Definition at line 36 of file dev-ahci.c.

#define SATA_CTRL0_PHY_CMU_RST_N   (1 << 10)

Definition at line 35 of file dev-ahci.c.

#define SATA_CTRL0_PHY_POR_N   (1 << 8)

Definition at line 37 of file dev-ahci.c.

#define SATA_CTRL0_RX_DATA_VALID

(

x

)

(x << 27)

Definition at line 32 of file dev-ahci.c.

#define SATA_CTRL0_SPEED_MODE   (1 << 26)

Definition at line 33 of file dev-ahci.c.

#define SATA_CTRL1   0x4

Definition at line 28 of file dev-ahci.c.

#define SATA_CTRL1_RST_PMALIVE_N   (1 << 8)

Definition at line 39 of file dev-ahci.c.

#define SATA_CTRL1_RST_RX_N   (1 << 6)

Definition at line 41 of file dev-ahci.c.

#define SATA_CTRL1_RST_RXOOB_N   (1 << 7)

Definition at line 40 of file dev-ahci.c.

#define SATA_CTRL1_RST_TX_N   (1 << 5)

Definition at line 42 of file dev-ahci.c.

#define SATA_PHY_STATUS   0x8

Definition at line 30 of file dev-ahci.c.

#define SATA_PHY_STATUS_CMU_OK   (1 << 18)

Definition at line 44 of file dev-ahci.c.

#define SATA_PHY_STATUS_LANE_OK   (1 << 16)

Definition at line 45 of file dev-ahci.c.

#define SCLK_SATA_FREQ   (67 * MHZ)

Definition at line 51 of file dev-ahci.c.

Variable Documentation

struct platform_device exynos4_device_ahci

Initial value:

= {
    .name       = "ahci",
    .id     = -1,
    .resource   = exynos4_ahci_resource,
    .num_resources  = ARRAY_SIZE(exynos4_ahci_resource),
    .dev        = {
        .platform_data      = &exynos4_ahci_pdata,
        .dma_mask       = &exynos4_ahci_dmamask,
        .coherent_dma_mask  = DMA_BIT_MASK(32),
    },
}

Definition at line 245 of file dev-ahci.c.