Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
Macros
reg.h File Reference

Go to the source code of this file.

Macros

#define REG_SYS_ISO_CTRL   0x0000
 
#define REG_SYS_FUNC_EN   0x0002
 
#define REG_APS_FSMCO   0x0004
 
#define REG_SYS_CLKR   0x0008
 
#define REG_9346CR   0x000A
 
#define REG_EE_VPD   0x000C
 
#define REG_AFE_MISC   0x0010
 
#define REG_SPS0_CTRL   0x0011
 
#define REG_SPS_OCP_CFG   0x0018
 
#define REG_RSV_CTRL   0x001C
 
#define REG_RF_CTRL   0x001F
 
#define REG_LDOA15_CTRL   0x0020
 
#define REG_LDOV12D_CTRL   0x0021
 
#define REG_LDOHCI12_CTRL   0x0022
 
#define REG_LPLDO_CTRL   0x0023
 
#define REG_AFE_XTAL_CTRL   0x0024
 
#define REG_AFE_PLL_CTRL   0x0028
 
#define REG_EFUSE_CTRL   0x0030
 
#define REG_EFUSE_TEST   0x0034
 
#define REG_PWR_DATA   0x0038
 
#define REG_CAL_TIMER   0x003C
 
#define REG_ACLK_MON   0x003E
 
#define REG_GPIO_MUXCFG   0x0040
 
#define REG_GPIO_IO_SEL   0x0042
 
#define REG_MAC_PINMUX_CFG   0x0043
 
#define REG_GPIO_PIN_CTRL   0x0044
 
#define REG_GPIO_INTM   0x0048
 
#define REG_LEDCFG0   0x004C
 
#define REG_LEDCFG1   0x004D
 
#define REG_LEDCFG2   0x004E
 
#define REG_LEDCFG3   0x004F
 
#define REG_FSIMR   0x0050
 
#define REG_FSISR   0x0054
 
#define REG_HSIMR   0x0058
 
#define REG_HSISR   0x005c
 
#define REG_GPIO_PIN_CTRL_2   0x0060
 
#define REG_GPIO_IO_SEL_2   0x0062
 
#define REG_MULTI_FUNC_CTRL   0x0068
 
#define REG_MCUFWDL   0x0080
 
#define REG_HMEBOX_EXT_0   0x0088
 
#define REG_HMEBOX_EXT_1   0x008A
 
#define REG_HMEBOX_EXT_2   0x008C
 
#define REG_HMEBOX_EXT_3   0x008E
 
#define REG_BIST_SCAN   0x00D0
 
#define REG_BIST_RPT   0x00D4
 
#define REG_BIST_ROM_RPT   0x00D8
 
#define REG_USB_SIE_INTF   0x00E0
 
#define REG_PCIE_MIO_INTF   0x00E4
 
#define REG_PCIE_MIO_INTD   0x00E8
 
#define REG_HPON_FSM   0x00EC
 
#define REG_SYS_CFG   0x00F0
 
#define REG_GPIO_OUTSTS   0x00F4 /* For RTL8723 only.*/
 
#define REG_CR   0x0100
 
#define REG_PBP   0x0104
 
#define REG_TRXDMA_CTRL   0x010C
 
#define REG_TRXFF_BNDY   0x0114
 
#define REG_TRXFF_STATUS   0x0118
 
#define REG_RXFF_PTR   0x011C
 
#define REG_HIMR   0x0120
 
#define REG_HISR   0x0124
 
#define REG_HIMRE   0x0128
 
#define REG_HISRE   0x012C
 
#define REG_CPWM   0x012F
 
#define REG_FWIMR   0x0130
 
#define REG_FWISR   0x0134
 
#define REG_PKTBUF_DBG_CTRL   0x0140
 
#define REG_PKTBUF_DBG_DATA_L   0x0144
 
#define REG_PKTBUF_DBG_DATA_H   0x0148
 
#define REG_TC0_CTRL   0x0150
 
#define REG_TC1_CTRL   0x0154
 
#define REG_TC2_CTRL   0x0158
 
#define REG_TC3_CTRL   0x015C
 
#define REG_TC4_CTRL   0x0160
 
#define REG_TCUNIT_BASE   0x0164
 
#define REG_MBIST_START   0x0174
 
#define REG_MBIST_DONE   0x0178
 
#define REG_MBIST_FAIL   0x017C
 
#define REG_C2HEVT_MSG_NORMAL   0x01A0
 
#define REG_C2HEVT_MSG_TEST   0x01B8
 
#define REG_C2HEVT_CLEAR   0x01BF
 
#define REG_MCUTST_1   0x01c0
 
#define REG_FMETHR   0x01C8
 
#define REG_HMETFR   0x01CC
 
#define REG_HMEBOX_0   0x01D0
 
#define REG_HMEBOX_1   0x01D4
 
#define REG_HMEBOX_2   0x01D8
 
#define REG_HMEBOX_3   0x01DC
 
#define REG_LLT_INIT   0x01E0
 
#define REG_BB_ACCEESS_CTRL   0x01E8
 
#define REG_BB_ACCESS_DATA   0x01EC
 
#define REG_RQPN   0x0200
 
#define REG_FIFOPAGE   0x0204
 
#define REG_TDECTRL   0x0208
 
#define REG_TXDMA_OFFSET_CHK   0x020C
 
#define REG_TXDMA_STATUS   0x0210
 
#define REG_RQPN_NPQ   0x0214
 
#define REG_RXDMA_AGG_PG_TH   0x0280
 
#define REG_RXPKT_NUM   0x0284
 
#define REG_RXDMA_STATUS   0x0288
 
#define REG_PCIE_CTRL_REG   0x0300
 
#define REG_INT_MIG   0x0304
 
#define REG_BCNQ_DESA   0x0308
 
#define REG_HQ_DESA   0x0310
 
#define REG_MGQ_DESA   0x0318
 
#define REG_VOQ_DESA   0x0320
 
#define REG_VIQ_DESA   0x0328
 
#define REG_BEQ_DESA   0x0330
 
#define REG_BKQ_DESA   0x0338
 
#define REG_RX_DESA   0x0340
 
#define REG_DBI   0x0348
 
#define REG_MDIO   0x0354
 
#define REG_DBG_SEL   0x0360
 
#define REG_PCIE_HRPWM   0x0361
 
#define REG_PCIE_HCPWM   0x0363
 
#define REG_UART_CTRL   0x0364
 
#define REG_UART_TX_DESA   0x0370
 
#define REG_UART_RX_DESA   0x0378
 
#define REG_HDAQ_DESA_NODEF   0x0000
 
#define REG_CMDQ_DESA_NODEF   0x0000
 
#define REG_VOQ_INFORMATION   0x0400
 
#define REG_VIQ_INFORMATION   0x0404
 
#define REG_BEQ_INFORMATION   0x0408
 
#define REG_BKQ_INFORMATION   0x040C
 
#define REG_MGQ_INFORMATION   0x0410
 
#define REG_HGQ_INFORMATION   0x0414
 
#define REG_BCNQ_INFORMATION   0x0418
 
#define REG_CPU_MGQ_INFORMATION   0x041C
 
#define REG_FWHW_TXQ_CTRL   0x0420
 
#define REG_HWSEQ_CTRL   0x0423
 
#define REG_TXPKTBUF_BCNQ_BDNY   0x0424
 
#define REG_TXPKTBUF_MGQ_BDNY   0x0425
 
#define REG_MULTI_BCNQ_EN   0x0426
 
#define REG_MULTI_BCNQ_OFFSET   0x0427
 
#define REG_SPEC_SIFS   0x0428
 
#define REG_RL   0x042A
 
#define REG_DARFRC   0x0430
 
#define REG_RARFRC   0x0438
 
#define REG_RRSR   0x0440
 
#define REG_ARFR0   0x0444
 
#define REG_ARFR1   0x0448
 
#define REG_ARFR2   0x044C
 
#define REG_ARFR3   0x0450
 
#define REG_AGGLEN_LMT   0x0458
 
#define REG_AMPDU_MIN_SPACE   0x045C
 
#define REG_TXPKTBUF_WMAC_LBK_BF_HD   0x045D
 
#define REG_FAST_EDCA_CTRL   0x0460
 
#define REG_RD_RESP_PKT_TH   0x0463
 
#define REG_INIRTS_RATE_SEL   0x0480
 
#define REG_INIDATA_RATE_SEL   0x0484
 
#define REG_POWER_STATUS   0x04A4
 
#define REG_POWER_STAGE1   0x04B4
 
#define REG_POWER_STAGE2   0x04B8
 
#define REG_PKT_LIFE_TIME   0x04C0
 
#define REG_STBC_SETTING   0x04C4
 
#define REG_PROT_MODE_CTRL   0x04C8
 
#define REG_BAR_MODE_CTRL   0x04CC
 
#define REG_RA_TRY_RATE_AGG_LMT   0x04CF
 
#define REG_NQOS_SEQ   0x04DC
 
#define REG_QOS_SEQ   0x04DE
 
#define REG_NEED_CPU_HANDLE   0x04E0
 
#define REG_PKT_LOSE_RPT   0x04E1
 
#define REG_PTCL_ERR_STATUS   0x04E2
 
#define REG_DUMMY   0x04FC
 
#define REG_EDCA_VO_PARAM   0x0500
 
#define REG_EDCA_VI_PARAM   0x0504
 
#define REG_EDCA_BE_PARAM   0x0508
 
#define REG_EDCA_BK_PARAM   0x050C
 
#define REG_BCNTCFG   0x0510
 
#define REG_PIFS   0x0512
 
#define REG_RDG_PIFS   0x0513
 
#define REG_SIFS_CTX   0x0514
 
#define REG_SIFS_TRX   0x0516
 
#define REG_SIFS_CCK   0x0514
 
#define REG_SIFS_OFDM   0x0516
 
#define REG_AGGR_BREAK_TIME   0x051A
 
#define REG_SLOT   0x051B
 
#define REG_TX_PTCL_CTRL   0x0520
 
#define REG_TXPAUSE   0x0522
 
#define REG_DIS_TXREQ_CLR   0x0523
 
#define REG_RD_CTRL   0x0524
 
#define REG_TBTT_PROHIBIT   0x0540
 
#define REG_RD_NAV_NXT   0x0544
 
#define REG_NAV_PROT_LEN   0x0546
 
#define REG_BCN_CTRL   0x0550
 
#define REG_USTIME_TSF   0x0551
 
#define REG_MBID_NUM   0x0552
 
#define REG_DUAL_TSF_RST   0x0553
 
#define REG_BCN_INTERVAL   0x0554
 
#define REG_MBSSID_BCN_SPACE   0x0554
 
#define REG_DRVERLYINT   0x0558
 
#define REG_BCNDMATIM   0x0559
 
#define REG_ATIMWND   0x055A
 
#define REG_BCN_MAX_ERR   0x055D
 
#define REG_RXTSF_OFFSET_CCK   0x055E
 
#define REG_RXTSF_OFFSET_OFDM   0x055F
 
#define REG_TSFTR   0x0560
 
#define REG_INIT_TSFTR   0x0564
 
#define REG_PSTIMER   0x0580
 
#define REG_TIMER0   0x0584
 
#define REG_TIMER1   0x0588
 
#define REG_ACMHWCTRL   0x05C0
 
#define REG_ACMRSTCTRL   0x05C1
 
#define REG_ACMAVG   0x05C2
 
#define REG_VO_ADMTIME   0x05C4
 
#define REG_VI_ADMTIME   0x05C6
 
#define REG_BE_ADMTIME   0x05C8
 
#define REG_EDCA_RANDOM_GEN   0x05CC
 
#define REG_SCH_TXCMD   0x05D0
 
#define REG_APSD_CTRL   0x0600
 
#define REG_BWOPMODE   0x0603
 
#define REG_TCR   0x0604
 
#define REG_RCR   0x0608
 
#define REG_RX_PKT_LIMIT   0x060C
 
#define REG_RX_DLK_TIME   0x060D
 
#define REG_RX_DRVINFO_SZ   0x060F
 
#define REG_MACID   0x0610
 
#define REG_BSSID   0x0618
 
#define REG_MAR   0x0620
 
#define REG_MBIDCAMCFG   0x0628
 
#define REG_USTIME_EDCA   0x0638
 
#define REG_MAC_SPEC_SIFS   0x063A
 
#define REG_RESP_SIFS_CCK   0x063C
 
#define REG_RESP_SIFS_OFDM   0x063E
 
#define REG_R2T_SIFS   0x063C
 
#define REG_T2T_SIFS   0x063E
 
#define REG_ACKTO   0x0640
 
#define REG_CTS2TO   0x0641
 
#define REG_EIFS   0x0642
 
#define REG_NAV_CTRL   0x0650
 
#define REG_BACAMCMD   0x0654
 
#define REG_BACAMCONTENT   0x0658
 
#define REG_LBDLY   0x0660
 
#define REG_FWDLY   0x0661
 
#define REG_RXERR_RPT   0x0664
 
#define REG_WMAC_TRXPTCL_CTL   0x0668
 
#define REG_CAMCMD   0x0670
 
#define REG_CAMWRITE   0x0674
 
#define REG_CAMREAD   0x0678
 
#define REG_CAMDBG   0x067C
 
#define REG_SECCFG   0x0680
 
#define REG_WOW_CTRL   0x0690
 
#define REG_PSSTATUS   0x0691
 
#define REG_PS_RX_INFO   0x0692
 
#define REG_LPNAV_CTRL   0x0694
 
#define REG_WKFMCAM_CMD   0x0698
 
#define REG_WKFMCAM_RWD   0x069C
 
#define REG_RXFLTMAP0   0x06A0
 
#define REG_RXFLTMAP1   0x06A2
 
#define REG_RXFLTMAP2   0x06A4
 
#define REG_BCN_PSR_RPT   0x06A8
 
#define REG_CALB32K_CTRL   0x06AC
 
#define REG_PKT_MON_CTRL   0x06B4
 
#define REG_BT_COEX_TABLE   0x06C0
 
#define REG_WMAC_RESP_TXINFO   0x06D8
 
#define REG_USB_INFO   0xFE17
 
#define REG_USB_SPECIAL_OPTION   0xFE55
 
#define REG_USB_DMA_AGG_TO   0xFE5B
 
#define REG_USB_AGG_TO   0xFE5C
 
#define REG_USB_AGG_TH   0xFE5D
 
#define REG_TEST_USB_TXQS   0xFE48
 
#define REG_TEST_SIE_VID   0xFE60
 
#define REG_TEST_SIE_PID   0xFE62
 
#define REG_TEST_SIE_OPTIONAL   0xFE64
 
#define REG_TEST_SIE_CHIRP_K   0xFE65
 
#define REG_TEST_SIE_PHY   0xFE66
 
#define REG_TEST_SIE_MAC_ADDR   0xFE70
 
#define REG_TEST_SIE_STRING   0xFE80
 
#define REG_NORMAL_SIE_VID   0xFE60
 
#define REG_NORMAL_SIE_PID   0xFE62
 
#define REG_NORMAL_SIE_OPTIONAL   0xFE64
 
#define REG_NORMAL_SIE_EP   0xFE65
 
#define REG_NORMAL_SIE_PHY   0xFE68
 
#define REG_NORMAL_SIE_MAC_ADDR   0xFE70
 
#define REG_NORMAL_SIE_STRING   0xFE80
 
#define CR9346   REG_9346CR
 
#define MSR   (REG_CR + 2)
 
#define ISR   REG_HISR
 
#define TSFR   REG_TSFTR
 
#define MACIDR0   REG_MACID
 
#define MACIDR4   (REG_MACID + 4)
 
#define PBP   REG_PBP
 
#define IDR0   MACIDR0
 
#define IDR4   MACIDR4
 
#define UNUSED_REGISTER   0x1BF
 
#define DCAM   UNUSED_REGISTER
 
#define PSR   UNUSED_REGISTER
 
#define BBADDR   UNUSED_REGISTER
 
#define PHYDATAR   UNUSED_REGISTER
 
#define INVALID_BBRF_VALUE   0x12345678
 
#define MAX_MSS_DENSITY_2T   0x13
 
#define MAX_MSS_DENSITY_1T   0x0A
 
#define CMDEEPROM_EN   BIT(5)
 
#define CMDEEPROM_SEL   BIT(4)
 
#define CMD9346CR_9356SEL   BIT(4)
 
#define AUTOLOAD_EEPROM   (CMDEEPROM_EN|CMDEEPROM_SEL)
 
#define AUTOLOAD_EFUSE   CMDEEPROM_EN
 
#define GPIOSEL_GPIO   0
 
#define GPIOSEL_ENBT   BIT(5)
 
#define GPIO_IN   REG_GPIO_PIN_CTRL
 
#define GPIO_OUT   (REG_GPIO_PIN_CTRL+1)
 
#define GPIO_IO_SEL   (REG_GPIO_PIN_CTRL+2)
 
#define GPIO_MOD   (REG_GPIO_PIN_CTRL+3)
 
#define MSR_NOLINK   0x00
 
#define MSR_ADHOC   0x01
 
#define MSR_INFRA   0x02
 
#define MSR_AP   0x03
 
#define RRSR_RSC_OFFSET   21
 
#define RRSR_SHORT_OFFSET   23
 
#define RRSR_RSC_BW_40M   0x600000
 
#define RRSR_RSC_UPSUBCHNL   0x400000
 
#define RRSR_RSC_LOWSUBCHNL   0x200000
 
#define RRSR_SHORT   0x800000
 
#define RRSR_1M   BIT(0)
 
#define RRSR_2M   BIT(1)
 
#define RRSR_5_5M   BIT(2)
 
#define RRSR_11M   BIT(3)
 
#define RRSR_6M   BIT(4)
 
#define RRSR_9M   BIT(5)
 
#define RRSR_12M   BIT(6)
 
#define RRSR_18M   BIT(7)
 
#define RRSR_24M   BIT(8)
 
#define RRSR_36M   BIT(9)
 
#define RRSR_48M   BIT(10)
 
#define RRSR_54M   BIT(11)
 
#define RRSR_MCS0   BIT(12)
 
#define RRSR_MCS1   BIT(13)
 
#define RRSR_MCS2   BIT(14)
 
#define RRSR_MCS3   BIT(15)
 
#define RRSR_MCS4   BIT(16)
 
#define RRSR_MCS5   BIT(17)
 
#define RRSR_MCS6   BIT(18)
 
#define RRSR_MCS7   BIT(19)
 
#define BRSR_ACKSHORTPMB   BIT(23)
 
#define RATR_1M   0x00000001
 
#define RATR_2M   0x00000002
 
#define RATR_55M   0x00000004
 
#define RATR_11M   0x00000008
 
#define RATR_6M   0x00000010
 
#define RATR_9M   0x00000020
 
#define RATR_12M   0x00000040
 
#define RATR_18M   0x00000080
 
#define RATR_24M   0x00000100
 
#define RATR_36M   0x00000200
 
#define RATR_48M   0x00000400
 
#define RATR_54M   0x00000800
 
#define RATR_MCS0   0x00001000
 
#define RATR_MCS1   0x00002000
 
#define RATR_MCS2   0x00004000
 
#define RATR_MCS3   0x00008000
 
#define RATR_MCS4   0x00010000
 
#define RATR_MCS5   0x00020000
 
#define RATR_MCS6   0x00040000
 
#define RATR_MCS7   0x00080000
 
#define RATR_MCS8   0x00100000
 
#define RATR_MCS9   0x00200000
 
#define RATR_MCS10   0x00400000
 
#define RATR_MCS11   0x00800000
 
#define RATR_MCS12   0x01000000
 
#define RATR_MCS13   0x02000000
 
#define RATR_MCS14   0x04000000
 
#define RATR_MCS15   0x08000000
 
#define RATE_1M   BIT(0)
 
#define RATE_2M   BIT(1)
 
#define RATE_5_5M   BIT(2)
 
#define RATE_11M   BIT(3)
 
#define RATE_6M   BIT(4)
 
#define RATE_9M   BIT(5)
 
#define RATE_12M   BIT(6)
 
#define RATE_18M   BIT(7)
 
#define RATE_24M   BIT(8)
 
#define RATE_36M   BIT(9)
 
#define RATE_48M   BIT(10)
 
#define RATE_54M   BIT(11)
 
#define RATE_MCS0   BIT(12)
 
#define RATE_MCS1   BIT(13)
 
#define RATE_MCS2   BIT(14)
 
#define RATE_MCS3   BIT(15)
 
#define RATE_MCS4   BIT(16)
 
#define RATE_MCS5   BIT(17)
 
#define RATE_MCS6   BIT(18)
 
#define RATE_MCS7   BIT(19)
 
#define RATE_MCS8   BIT(20)
 
#define RATE_MCS9   BIT(21)
 
#define RATE_MCS10   BIT(22)
 
#define RATE_MCS11   BIT(23)
 
#define RATE_MCS12   BIT(24)
 
#define RATE_MCS13   BIT(25)
 
#define RATE_MCS14   BIT(26)
 
#define RATE_MCS15   BIT(27)
 
#define RATE_ALL_CCK   (RATR_1M | RATR_2M | RATR_55M | RATR_11M)
 
#define RATE_ALL_OFDM_AG
 
#define RATE_ALL_OFDM_1SS
 
#define RATE_ALL_OFDM_2SS
 
#define BW_OPMODE_20MHZ   BIT(2)
 
#define BW_OPMODE_5G   BIT(1)
 
#define BW_OPMODE_11J   BIT(0)
 
#define CAM_VALID   BIT(15)
 
#define CAM_NOTVALID   0x0000
 
#define CAM_USEDK   BIT(5)
 
#define CAM_NONE   0x0
 
#define CAM_WEP40   0x01
 
#define CAM_TKIP   0x02
 
#define CAM_AES   0x04
 
#define CAM_WEP104   0x05
 
#define TOTAL_CAM_ENTRY   32
 
#define HALF_CAM_ENTRY   16
 
#define CAM_WRITE   BIT(16)
 
#define CAM_READ   0x00000000
 
#define CAM_POLLINIG   BIT(31)
 
#define SCR_USEDK   0x01
 
#define SCR_TXSEC_ENABLE   0x02
 
#define SCR_RXSEC_ENABLE   0x04
 
#define WOW_PMEN   BIT(0)
 
#define WOW_WOMEN   BIT(1)
 
#define WOW_MAGIC   BIT(2)
 
#define WOW_UWF   BIT(3)
 
#define IMR8190_DISABLED   0x0
 
#define IMR_BCNDMAINT6   BIT(31)
 
#define IMR_BCNDMAINT5   BIT(30)
 
#define IMR_BCNDMAINT4   BIT(29)
 
#define IMR_BCNDMAINT3   BIT(28)
 
#define IMR_BCNDMAINT2   BIT(27)
 
#define IMR_BCNDMAINT1   BIT(26)
 
#define IMR_BCNDOK8   BIT(25)
 
#define IMR_BCNDOK7   BIT(24)
 
#define IMR_BCNDOK6   BIT(23)
 
#define IMR_BCNDOK5   BIT(22)
 
#define IMR_BCNDOK4   BIT(21)
 
#define IMR_BCNDOK3   BIT(20)
 
#define IMR_BCNDOK2   BIT(19)
 
#define IMR_BCNDOK1   BIT(18)
 
#define IMR_TIMEOUT2   BIT(17)
 
#define IMR_TIMEOUT1   BIT(16)
 
#define IMR_TXFOVW   BIT(15)
 
#define IMR_PSTIMEOUT   BIT(14)
 
#define IMR_BCNINT   BIT(13)
 
#define IMR_RXFOVW   BIT(12)
 
#define IMR_RDU   BIT(11)
 
#define IMR_ATIMEND   BIT(10)
 
#define IMR_BDOK   BIT(9)
 
#define IMR_HIGHDOK   BIT(8)
 
#define IMR_TBDOK   BIT(7)
 
#define IMR_MGNTDOK   BIT(6)
 
#define IMR_TBDER   BIT(5)
 
#define IMR_BKDOK   BIT(4)
 
#define IMR_BEDOK   BIT(3)
 
#define IMR_VIDOK   BIT(2)
 
#define IMR_VODOK   BIT(1)
 
#define IMR_ROK   BIT(0)
 
#define IMR_TXERR   BIT(11)
 
#define IMR_RXERR   BIT(10)
 
#define IMR_C2HCMD   BIT(9)
 
#define IMR_CPWM   BIT(8)
 
#define IMR_OCPINT   BIT(1)
 
#define IMR_WLANOFF   BIT(0)
 
#define EFUSE_REAL_CONTENT_LEN   512
 
#define EEPROM_DEFAULT_TSSI   0x0
 
#define EEPROM_DEFAULT_TXPOWERDIFF   0x0
 
#define EEPROM_DEFAULT_CRYSTALCAP   0x5
 
#define EEPROM_DEFAULT_BOARDTYPE   0x02
 
#define EEPROM_DEFAULT_TXPOWER   0x1010
 
#define EEPROM_DEFAULT_HT2T_TXPWR   0x10
 
#define EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF   0x3
 
#define EEPROM_DEFAULT_THERMALMETER   0x12
 
#define EEPROM_DEFAULT_ANTTXPOWERDIFF   0x0
 
#define EEPROM_DEFAULT_TXPWDIFF_CRYSTALCAP   0x5
 
#define EEPROM_DEFAULT_TXPOWERLEVEL   0x22
 
#define EEPROM_DEFAULT_HT40_2SDIFF   0x0
 
#define EEPROM_DEFAULT_HT20_DIFF   2
 
#define EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF   0x3
 
#define EEPROM_DEFAULT_HT40_PWRMAXOFFSET   0
 
#define EEPROM_DEFAULT_HT20_PWRMAXOFFSET   0
 
#define RF_OPTION1   0x79
 
#define RF_OPTION2   0x7A
 
#define RF_OPTION3   0x7B
 
#define RF_OPTION4   0x7C
 
#define EEPROM_DEFAULT_PID   0x1234
 
#define EEPROM_DEFAULT_VID   0x5678
 
#define EEPROM_DEFAULT_CUSTOMERID   0xAB
 
#define EEPROM_DEFAULT_SUBCUSTOMERID   0xCD
 
#define EEPROM_DEFAULT_VERSION   0
 
#define EEPROM_CHANNEL_PLAN_FCC   0x0
 
#define EEPROM_CHANNEL_PLAN_IC   0x1
 
#define EEPROM_CHANNEL_PLAN_ETSI   0x2
 
#define EEPROM_CHANNEL_PLAN_SPAIN   0x3
 
#define EEPROM_CHANNEL_PLAN_FRANCE   0x4
 
#define EEPROM_CHANNEL_PLAN_MKK   0x5
 
#define EEPROM_CHANNEL_PLAN_MKK1   0x6
 
#define EEPROM_CHANNEL_PLAN_ISRAEL   0x7
 
#define EEPROM_CHANNEL_PLAN_TELEC   0x8
 
#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN   0x9
 
#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13   0xA
 
#define EEPROM_CHANNEL_PLAN_NCC   0xB
 
#define EEPROM_CHANNEL_PLAN_BY_HW_MASK   0x80
 
#define EEPROM_CID_DEFAULT   0x0
 
#define EEPROM_CID_TOSHIBA   0x4
 
#define EEPROM_CID_CCX   0x10
 
#define EEPROM_CID_QMI   0x0D
 
#define EEPROM_CID_WHQL   0xFE
 
#define RTL8192_EEPROM_ID   0x8129
 
#define RTL8190_EEPROM_ID   0x8129
 
#define EEPROM_HPON   0x02
 
#define EEPROM_CLK   0x06
 
#define EEPROM_TESTR   0x08
 
#define EEPROM_VID   0x0A
 
#define EEPROM_DID   0x0C
 
#define EEPROM_SVID   0x0E
 
#define EEPROM_SMID   0x10
 
#define EEPROM_MAC_ADDR   0x16
 
#define EEPROM_CCK_TX_PWR_INX   0x5A
 
#define EEPROM_HT40_1S_TX_PWR_INX   0x60
 
#define EEPROM_HT40_2S_TX_PWR_INX_DIFF   0x66
 
#define EEPROM_HT20_TX_PWR_INX_DIFF   0x69
 
#define EEPROM_OFDM_TX_PWR_INX_DIFF   0x6C
 
#define EEPROM_HT40_MAX_PWR_OFFSET   0x6F
 
#define EEPROM_HT20_MAX_PWR_OFFSET   0x72
 
#define EEPROM_TSSI_A   0x76
 
#define EEPROM_TSSI_B   0x77
 
#define EEPROM_THERMAL_METER   0x78
 
#define EEPROM_XTAL_K   0x78
 
#define EEPROM_RF_OPT1   0x79
 
#define EEPROM_RF_OPT2   0x7A
 
#define EEPROM_RF_OPT3   0x7B
 
#define EEPROM_RF_OPT4   0x7C
 
#define EEPROM_CHANNEL_PLAN   0x7D
 
#define EEPROM_VERSION   0x7E
 
#define EEPROM_CUSTOMER_ID   0x7F
 
#define EEPROM_PWRDIFF   0x54
 
#define EEPROM_TXPOWERCCK   0x5A
 
#define EEPROM_TXPOWERHT40_1S   0x60
 
#define EEPROM_TXPOWERHT40_2SDIFF   0x66
 
#define EEPROM_TXPOWERHT20DIFF   0x69
 
#define EEPROM_TXPOWER_OFDMDIFF   0x6C
 
#define EEPROM_TXPWR_GROUP   0x6F
 
#define EEPROM_TSSI_A   0x76
 
#define EEPROM_TSSI_B   0x77
 
#define EEPROM_THERMAL_METER   0x78
 
#define EEPROM_CHANNELPLAN   0x75
 
#define RF_OPTION1   0x79
 
#define RF_OPTION2   0x7A
 
#define RF_OPTION3   0x7B
 
#define RF_OPTION4   0x7C
 
#define STOPBECON   BIT(6)
 
#define STOPHIGHT   BIT(5)
 
#define STOPMGT   BIT(4)
 
#define STOPVO   BIT(3)
 
#define STOPVI   BIT(2)
 
#define STOPBE   BIT(1)
 
#define STOPBK   BIT(0)
 
#define RCR_APPFCS   BIT(31)
 
#define RCR_APP_FCS   BIT(31)
 
#define RCR_APP_MIC   BIT(30)
 
#define RCR_APP_ICV   BIT(29)
 
#define RCR_APP_PHYSTS   BIT(28)
 
#define RCR_APP_PHYST_RXFF   BIT(28)
 
#define RCR_APP_BA_SSN   BIT(27)
 
#define RCR_ENMBID   BIT(24)
 
#define RCR_LSIGEN   BIT(23)
 
#define RCR_MFBEN   BIT(22)
 
#define RCR_HTC_LOC_CTRL   BIT(14)
 
#define RCR_AMF   BIT(13)
 
#define RCR_ACF   BIT(12)
 
#define RCR_ADF   BIT(11)
 
#define RCR_AICV   BIT(9)
 
#define RCR_ACRC32   BIT(8)
 
#define RCR_CBSSID_BCN   BIT(7)
 
#define RCR_CBSSID_DATA   BIT(6)
 
#define RCR_CBSSID   RCR_CBSSID_DATA
 
#define RCR_APWRMGT   BIT(5)
 
#define RCR_ADD3   BIT(4)
 
#define RCR_AB   BIT(3)
 
#define RCR_AM   BIT(2)
 
#define RCR_APM   BIT(1)
 
#define RCR_AAP   BIT(0)
 
#define RCR_MXDMA_OFFSET   8
 
#define RCR_FIFO_OFFSET   13
 
#define RSV_CTRL   0x001C
 
#define RD_CTRL   0x0524
 
#define REG_USB_INFO   0xFE17
 
#define REG_USB_SPECIAL_OPTION   0xFE55
 
#define REG_USB_DMA_AGG_TO   0xFE5B
 
#define REG_USB_AGG_TO   0xFE5C
 
#define REG_USB_AGG_TH   0xFE5D
 
#define REG_USB_VID   0xFE60
 
#define REG_USB_PID   0xFE62
 
#define REG_USB_OPTIONAL   0xFE64
 
#define REG_USB_CHIRP_K   0xFE65
 
#define REG_USB_PHY   0xFE66
 
#define REG_USB_MAC_ADDR   0xFE70
 
#define REG_USB_HRPWM   0xFE58
 
#define REG_USB_HCPWM   0xFE57
 
#define SW18_FPWM   BIT(3)
 
#define ISO_MD2PP   BIT(0)
 
#define ISO_UA2USB   BIT(1)
 
#define ISO_UD2CORE   BIT(2)
 
#define ISO_PA2PCIE   BIT(3)
 
#define ISO_PD2CORE   BIT(4)
 
#define ISO_IP2MAC   BIT(5)
 
#define ISO_DIOP   BIT(6)
 
#define ISO_DIOE   BIT(7)
 
#define ISO_EB2CORE   BIT(8)
 
#define ISO_DIOR   BIT(9)
 
#define PWC_EV25V   BIT(14)
 
#define PWC_EV12V   BIT(15)
 
#define FEN_BBRSTB   BIT(0)
 
#define FEN_BB_GLB_RSTn   BIT(1)
 
#define FEN_USBA   BIT(2)
 
#define FEN_UPLL   BIT(3)
 
#define FEN_USBD   BIT(4)
 
#define FEN_DIO_PCIE   BIT(5)
 
#define FEN_PCIEA   BIT(6)
 
#define FEN_PPLL   BIT(7)
 
#define FEN_PCIED   BIT(8)
 
#define FEN_DIOE   BIT(9)
 
#define FEN_CPUEN   BIT(10)
 
#define FEN_DCORE   BIT(11)
 
#define FEN_ELDR   BIT(12)
 
#define FEN_DIO_RF   BIT(13)
 
#define FEN_HWPDN   BIT(14)
 
#define FEN_MREGEN   BIT(15)
 
#define PFM_LDALL   BIT(0)
 
#define PFM_ALDN   BIT(1)
 
#define PFM_LDKP   BIT(2)
 
#define PFM_WOWL   BIT(3)
 
#define EnPDN   BIT(4)
 
#define PDN_PL   BIT(5)
 
#define APFM_ONMAC   BIT(8)
 
#define APFM_OFF   BIT(9)
 
#define APFM_RSM   BIT(10)
 
#define AFSM_HSUS   BIT(11)
 
#define AFSM_PCIE   BIT(12)
 
#define APDM_MAC   BIT(13)
 
#define APDM_HOST   BIT(14)
 
#define APDM_HPDN   BIT(15)
 
#define RDY_MACON   BIT(16)
 
#define SUS_HOST   BIT(17)
 
#define ROP_ALD   BIT(20)
 
#define ROP_PWR   BIT(21)
 
#define ROP_SPS   BIT(22)
 
#define SOP_MRST   BIT(25)
 
#define SOP_FUSE   BIT(26)
 
#define SOP_ABG   BIT(27)
 
#define SOP_AMB   BIT(28)
 
#define SOP_RCK   BIT(29)
 
#define SOP_A8M   BIT(30)
 
#define XOP_BTCK   BIT(31)
 
#define ANAD16V_EN   BIT(0)
 
#define ANA8M   BIT(1)
 
#define MACSLP   BIT(4)
 
#define LOADER_CLK_EN   BIT(5)
 
#define _80M_SSC_DIS   BIT(7)
 
#define _80M_SSC_EN_HO   BIT(8)
 
#define PHY_SSC_RSTB   BIT(9)
 
#define SEC_CLK_EN   BIT(10)
 
#define MAC_CLK_EN   BIT(11)
 
#define SYS_CLK_EN   BIT(12)
 
#define RING_CLK_EN   BIT(13)
 
#define BOOT_FROM_EEPROM   BIT(4)
 
#define EEPROM_EN   BIT(5)
 
#define AFE_BGEN   BIT(0)
 
#define AFE_MBEN   BIT(1)
 
#define MAC_ID_EN   BIT(7)
 
#define WLOCK_ALL   BIT(0)
 
#define WLOCK_00   BIT(1)
 
#define WLOCK_04   BIT(2)
 
#define WLOCK_08   BIT(3)
 
#define WLOCK_40   BIT(4)
 
#define R_DIS_PRST_0   BIT(5)
 
#define R_DIS_PRST_1   BIT(6)
 
#define LOCK_ALL_EN   BIT(7)
 
#define RF_EN   BIT(0)
 
#define RF_RSTB   BIT(1)
 
#define RF_SDMRSTB   BIT(2)
 
#define LDA15_EN   BIT(0)
 
#define LDA15_STBY   BIT(1)
 
#define LDA15_OBUF   BIT(2)
 
#define LDA15_REG_VOS   BIT(3)
 
#define _LDA15_VOADJ(x)   (((x) & 0x7) << 4)
 
#define LDV12_EN   BIT(0)
 
#define LDV12_SDBY   BIT(1)
 
#define LPLDO_HSM   BIT(2)
 
#define LPLDO_LSM_DIS   BIT(3)
 
#define _LDV12_VADJ(x)   (((x) & 0xF) << 4)
 
#define XTAL_EN   BIT(0)
 
#define XTAL_BSEL   BIT(1)
 
#define _XTAL_BOSC(x)   (((x) & 0x3) << 2)
 
#define _XTAL_CADJ(x)   (((x) & 0xF) << 4)
 
#define XTAL_GATE_USB   BIT(8)
 
#define _XTAL_USB_DRV(x)   (((x) & 0x3) << 9)
 
#define XTAL_GATE_AFE   BIT(11)
 
#define _XTAL_AFE_DRV(x)   (((x) & 0x3) << 12)
 
#define XTAL_RF_GATE   BIT(14)
 
#define _XTAL_RF_DRV(x)   (((x) & 0x3) << 15)
 
#define XTAL_GATE_DIG   BIT(17)
 
#define _XTAL_DIG_DRV(x)   (((x) & 0x3) << 18)
 
#define XTAL_BT_GATE   BIT(20)
 
#define _XTAL_BT_DRV(x)   (((x) & 0x3) << 21)
 
#define _XTAL_GPIO(x)   (((x) & 0x7) << 23)
 
#define CKDLY_AFE   BIT(26)
 
#define CKDLY_USB   BIT(27)
 
#define CKDLY_DIG   BIT(28)
 
#define CKDLY_BT   BIT(29)
 
#define APLL_EN   BIT(0)
 
#define APLL_320_EN   BIT(1)
 
#define APLL_FREF_SEL   BIT(2)
 
#define APLL_EDGE_SEL   BIT(3)
 
#define APLL_WDOGB   BIT(4)
 
#define APLL_LPFEN   BIT(5)
 
#define APLL_REF_CLK_13MHZ   0x1
 
#define APLL_REF_CLK_19_2MHZ   0x2
 
#define APLL_REF_CLK_20MHZ   0x3
 
#define APLL_REF_CLK_25MHZ   0x4
 
#define APLL_REF_CLK_26MHZ   0x5
 
#define APLL_REF_CLK_38_4MHZ   0x6
 
#define APLL_REF_CLK_40MHZ   0x7
 
#define APLL_320EN   BIT(14)
 
#define APLL_80EN   BIT(15)
 
#define APLL_1MEN   BIT(24)
 
#define ALD_EN   BIT(18)
 
#define EF_PD   BIT(19)
 
#define EF_FLAG   BIT(31)
 
#define EF_TRPT   BIT(7)
 
#define LDOE25_EN   BIT(31)
 
#define RSM_EN   BIT(0)
 
#define Timer_EN   BIT(4)
 
#define TRSW0EN   BIT(2)
 
#define TRSW1EN   BIT(3)
 
#define EROM_EN   BIT(4)
 
#define EnBT   BIT(5)
 
#define EnUart   BIT(8)
 
#define Uart_910   BIT(9)
 
#define EnPMAC   BIT(10)
 
#define SIC_SWRST   BIT(11)
 
#define EnSIC   BIT(12)
 
#define SIC_23   BIT(13)
 
#define EnHDP   BIT(14)
 
#define SIC_LBK   BIT(15)
 
#define LED0PL   BIT(4)
 
#define LED1PL   BIT(12)
 
#define LED0DIS   BIT(7)
 
#define MCUFWDL_EN   BIT(0)
 
#define MCUFWDL_RDY   BIT(1)
 
#define FWDL_ChkSum_rpt   BIT(2)
 
#define MACINI_RDY   BIT(3)
 
#define BBINI_RDY   BIT(4)
 
#define RFINI_RDY   BIT(5)
 
#define WINTINI_RDY   BIT(6)
 
#define CPRST   BIT(23)
 
#define XCLK_VLD   BIT(0)
 
#define ACLK_VLD   BIT(1)
 
#define UCLK_VLD   BIT(2)
 
#define PCLK_VLD   BIT(3)
 
#define PCIRSTB   BIT(4)
 
#define V15_VLD   BIT(5)
 
#define TRP_B15V_EN   BIT(7)
 
#define SIC_IDLE   BIT(8)
 
#define BD_MAC2   BIT(9)
 
#define BD_MAC1   BIT(10)
 
#define IC_MACPHY_MODE   BIT(11)
 
#define BT_FUNC   BIT(16)
 
#define VENDOR_ID   BIT(19)
 
#define PAD_HWPD_IDN   BIT(22)
 
#define TRP_VAUX_EN   BIT(23)
 
#define TRP_BT_EN   BIT(24)
 
#define BD_PKG_SEL   BIT(25)
 
#define BD_HCI_SEL   BIT(26)
 
#define TYPE_ID   BIT(27)
 
#define RF_RL_ID   (BIT(31) | BIT(30) | BIT(29) | BIT(28))
 
#define CHIP_VER_RTL_MASK   0xF000
 
#define CHIP_VER_RTL_SHIFT   12
 
#define REG_LBMODE   (REG_CR + 3)
 
#define HCI_TXDMA_EN   BIT(0)
 
#define HCI_RXDMA_EN   BIT(1)
 
#define TXDMA_EN   BIT(2)
 
#define RXDMA_EN   BIT(3)
 
#define PROTOCOL_EN   BIT(4)
 
#define SCHEDULE_EN   BIT(5)
 
#define MACTXEN   BIT(6)
 
#define MACRXEN   BIT(7)
 
#define ENSWBCN   BIT(8)
 
#define ENSEC   BIT(9)
 
#define _NETTYPE(x)   (((x) & 0x3) << 16)
 
#define MASK_NETTYPE   0x30000
 
#define NT_NO_LINK   0x0
 
#define NT_LINK_AD_HOC   0x1
 
#define NT_LINK_AP   0x2
 
#define NT_AS_AP   0x3
 
#define _LBMODE(x)   (((x) & 0xF) << 24)
 
#define MASK_LBMODE   0xF000000
 
#define LOOPBACK_NORMAL   0x0
 
#define LOOPBACK_IMMEDIATELY   0xB
 
#define LOOPBACK_MAC_DELAY   0x3
 
#define LOOPBACK_PHY   0x1
 
#define LOOPBACK_DMA   0x7
 
#define GET_RX_PAGE_SIZE(value)   ((value) & 0xF)
 
#define GET_TX_PAGE_SIZE(value)   (((value) & 0xF0) >> 4)
 
#define _PSRX_MASK   0xF
 
#define _PSTX_MASK   0xF0
 
#define _PSRX(x)   (x)
 
#define _PSTX(x)   ((x) << 4)
 
#define PBP_64   0x0
 
#define PBP_128   0x1
 
#define PBP_256   0x2
 
#define PBP_512   0x3
 
#define PBP_1024   0x4
 
#define RXDMA_ARBBW_EN   BIT(0)
 
#define RXSHFT_EN   BIT(1)
 
#define RXDMA_AGG_EN   BIT(2)
 
#define QS_VO_QUEUE   BIT(8)
 
#define QS_VI_QUEUE   BIT(9)
 
#define QS_BE_QUEUE   BIT(10)
 
#define QS_BK_QUEUE   BIT(11)
 
#define QS_MANAGER_QUEUE   BIT(12)
 
#define QS_HIGH_QUEUE   BIT(13)
 
#define HQSEL_VOQ   BIT(0)
 
#define HQSEL_VIQ   BIT(1)
 
#define HQSEL_BEQ   BIT(2)
 
#define HQSEL_BKQ   BIT(3)
 
#define HQSEL_MGTQ   BIT(4)
 
#define HQSEL_HIQ   BIT(5)
 
#define _TXDMA_HIQ_MAP(x)   (((x)&0x3) << 14)
 
#define _TXDMA_MGQ_MAP(x)   (((x)&0x3) << 12)
 
#define _TXDMA_BKQ_MAP(x)   (((x)&0x3) << 10)
 
#define _TXDMA_BEQ_MAP(x)   (((x)&0x3) << 8)
 
#define _TXDMA_VIQ_MAP(x)   (((x)&0x3) << 6)
 
#define _TXDMA_VOQ_MAP(x)   (((x)&0x3) << 4)
 
#define QUEUE_LOW   1
 
#define QUEUE_NORMAL   2
 
#define QUEUE_HIGH   3
 
#define _LLT_NO_ACTIVE   0x0
 
#define _LLT_WRITE_ACCESS   0x1
 
#define _LLT_READ_ACCESS   0x2
 
#define _LLT_INIT_DATA(x)   ((x) & 0xFF)
 
#define _LLT_INIT_ADDR(x)   (((x) & 0xFF) << 8)
 
#define _LLT_OP(x)   (((x) & 0x3) << 30)
 
#define _LLT_OP_VALUE(x)   (((x) >> 30) & 0x3)
 
#define BB_WRITE_READ_MASK   (BIT(31) | BIT(30))
 
#define BB_WRITE_EN   BIT(30)
 
#define BB_READ_EN   BIT(31)
 
#define _HPQ(x)   ((x) & 0xFF)
 
#define _LPQ(x)   (((x) & 0xFF) << 8)
 
#define _PUBQ(x)   (((x) & 0xFF) << 16)
 
#define _NPQ(x)   ((x) & 0xFF)
 
#define HPQ_PUBLIC_DIS   BIT(24)
 
#define LPQ_PUBLIC_DIS   BIT(25)
 
#define LD_RQPN   BIT(31)
 
#define BCN_VALID   BIT(16)
 
#define BCN_HEAD(x)   (((x) & 0xFF) << 8)
 
#define BCN_HEAD_MASK   0xFF00
 
#define BLK_DESC_NUM_SHIFT   4
 
#define BLK_DESC_NUM_MASK   0xF
 
#define DROP_DATA_EN   BIT(9)
 
#define EN_AMPDU_RTY_NEW   BIT(7)
 
#define _INIRTSMCS_SEL(x)   ((x) & 0x3F)
 
#define _SPEC_SIFS_CCK(x)   ((x) & 0xFF)
 
#define _SPEC_SIFS_OFDM(x)   (((x) & 0xFF) << 8)
 
#define RATE_REG_BITMAP_ALL   0xFFFFF
 
#define _RRSC_BITMAP(x)   ((x) & 0xFFFFF)
 
#define _RRSR_RSC(x)   (((x) & 0x3) << 21)
 
#define RRSR_RSC_RESERVED   0x0
 
#define RRSR_RSC_UPPER_SUBCHANNEL   0x1
 
#define RRSR_RSC_LOWER_SUBCHANNEL   0x2
 
#define RRSR_RSC_DUPLICATE_MODE   0x3
 
#define USE_SHORT_G1   BIT(20)
 
#define _AGGLMT_MCS0(x)   ((x) & 0xF)
 
#define _AGGLMT_MCS1(x)   (((x) & 0xF) << 4)
 
#define _AGGLMT_MCS2(x)   (((x) & 0xF) << 8)
 
#define _AGGLMT_MCS3(x)   (((x) & 0xF) << 12)
 
#define _AGGLMT_MCS4(x)   (((x) & 0xF) << 16)
 
#define _AGGLMT_MCS5(x)   (((x) & 0xF) << 20)
 
#define _AGGLMT_MCS6(x)   (((x) & 0xF) << 24)
 
#define _AGGLMT_MCS7(x)   (((x) & 0xF) << 28)
 
#define RETRY_LIMIT_SHORT_SHIFT   8
 
#define RETRY_LIMIT_LONG_SHIFT   0
 
#define _DARF_RC1(x)   ((x) & 0x1F)
 
#define _DARF_RC2(x)   (((x) & 0x1F) << 8)
 
#define _DARF_RC3(x)   (((x) & 0x1F) << 16)
 
#define _DARF_RC4(x)   (((x) & 0x1F) << 24)
 
#define _DARF_RC5(x)   ((x) & 0x1F)
 
#define _DARF_RC6(x)   (((x) & 0x1F) << 8)
 
#define _DARF_RC7(x)   (((x) & 0x1F) << 16)
 
#define _DARF_RC8(x)   (((x) & 0x1F) << 24)
 
#define _RARF_RC1(x)   ((x) & 0x1F)
 
#define _RARF_RC2(x)   (((x) & 0x1F) << 8)
 
#define _RARF_RC3(x)   (((x) & 0x1F) << 16)
 
#define _RARF_RC4(x)   (((x) & 0x1F) << 24)
 
#define _RARF_RC5(x)   ((x) & 0x1F)
 
#define _RARF_RC6(x)   (((x) & 0x1F) << 8)
 
#define _RARF_RC7(x)   (((x) & 0x1F) << 16)
 
#define _RARF_RC8(x)   (((x) & 0x1F) << 24)
 
#define AC_PARAM_TXOP_OFFSET   16
 
#define AC_PARAM_TXOP_LIMIT_OFFSET   16
 
#define AC_PARAM_ECW_MAX_OFFSET   12
 
#define AC_PARAM_ECW_MIN_OFFSET   8
 
#define AC_PARAM_AIFS_OFFSET   0
 
#define _AIFS(x)   (x)
 
#define _ECW_MAX_MIN(x)   ((x) << 8)
 
#define _TXOP_LIMIT(x)   ((x) << 16)
 
#define _BCNIFS(x)   ((x) & 0xFF)
 
#define _BCNECW(x)   ((((x) & 0xF)) << 8)
 
#define _LRL(x)   ((x) & 0x3F)
 
#define _SRL(x)   (((x) & 0x3F) << 8)
 
#define _SIFS_CCK_CTX(x)   ((x) & 0xFF)
 
#define _SIFS_CCK_TRX(x)   (((x) & 0xFF) << 8)
 
#define _SIFS_OFDM_CTX(x)   ((x) & 0xFF)
 
#define _SIFS_OFDM_TRX(x)   (((x) & 0xFF) << 8)
 
#define _TBTT_PROHIBIT_HOLD(x)   (((x) & 0xFF) << 8)
 
#define DIS_EDCA_CNT_DWN   BIT(11)
 
#define EN_MBSSID   BIT(1)
 
#define EN_TXBCN_RPT   BIT(2)
 
#define EN_BCN_FUNCTION   BIT(3)
 
#define TSFTR_RST   BIT(0)
 
#define TSFTR1_RST   BIT(1)
 
#define STOP_BCNQ   BIT(6)
 
#define DIS_TSF_UDT0_NORMAL_CHIP   BIT(4)
 
#define DIS_TSF_UDT0_TEST_CHIP   BIT(5)
 
#define AcmHw_HwEn   BIT(0)
 
#define AcmHw_BeqEn   BIT(1)
 
#define AcmHw_ViqEn   BIT(2)
 
#define AcmHw_VoqEn   BIT(3)
 
#define AcmHw_BeqStatus   BIT(4)
 
#define AcmHw_ViqStatus   BIT(5)
 
#define AcmHw_VoqStatus   BIT(6)
 
#define APSDOFF   BIT(6)
 
#define APSDOFF_STATUS   BIT(7)
 
#define BW_20MHZ   BIT(2)
 
#define RATE_BITMAP_ALL   0xFFFFF
 
#define RATE_RRSR_CCK_ONLY_1M   0xFFFF1
 
#define TSFRST   BIT(0)
 
#define DIS_GCLK   BIT(1)
 
#define PAD_SEL   BIT(2)
 
#define PWR_ST   BIT(6)
 
#define PWRBIT_OW_EN   BIT(7)
 
#define ACRC   BIT(8)
 
#define CFENDFORM   BIT(9)
 
#define ICV   BIT(10)
 
#define AAP   BIT(0)
 
#define APM   BIT(1)
 
#define AM   BIT(2)
 
#define AB   BIT(3)
 
#define ADD3   BIT(4)
 
#define APWRMGT   BIT(5)
 
#define CBSSID   BIT(6)
 
#define CBSSID_DATA   BIT(6)
 
#define CBSSID_BCN   BIT(7)
 
#define ACRC32   BIT(8)
 
#define AICV   BIT(9)
 
#define ADF   BIT(11)
 
#define ACF   BIT(12)
 
#define AMF   BIT(13)
 
#define HTC_LOC_CTRL   BIT(14)
 
#define UC_DATA_EN   BIT(16)
 
#define BM_DATA_EN   BIT(17)
 
#define MFBEN   BIT(22)
 
#define LSIGEN   BIT(23)
 
#define EnMBID   BIT(24)
 
#define APP_BASSN   BIT(27)
 
#define APP_PHYSTS   BIT(28)
 
#define APP_ICV   BIT(29)
 
#define APP_MIC   BIT(30)
 
#define APP_FCS   BIT(31)
 
#define _MIN_SPACE(x)   ((x) & 0x7)
 
#define _SHORT_GI_PADDING(x)   (((x) & 0x1F) << 3)
 
#define RXERR_TYPE_OFDM_PPDU   0
 
#define RXERR_TYPE_OFDM_FALSE_ALARM   1
 
#define RXERR_TYPE_OFDM_MPDU_OK   2
 
#define RXERR_TYPE_OFDM_MPDU_FAIL   3
 
#define RXERR_TYPE_CCK_PPDU   4
 
#define RXERR_TYPE_CCK_FALSE_ALARM   5
 
#define RXERR_TYPE_CCK_MPDU_OK   6
 
#define RXERR_TYPE_CCK_MPDU_FAIL   7
 
#define RXERR_TYPE_HT_PPDU   8
 
#define RXERR_TYPE_HT_FALSE_ALARM   9
 
#define RXERR_TYPE_HT_MPDU_TOTAL   10
 
#define RXERR_TYPE_HT_MPDU_OK   11
 
#define RXERR_TYPE_HT_MPDU_FAIL   12
 
#define RXERR_TYPE_RX_FULL_DROP   15
 
#define RXERR_COUNTER_MASK   0xFFFFF
 
#define RXERR_RPT_RST   BIT(27)
 
#define _RXERR_RPT_SEL(type)   ((type) << 28)
 
#define SCR_TxUseDK   BIT(0)
 
#define SCR_RxUseDK   BIT(1)
 
#define SCR_TxEncEnable   BIT(2)
 
#define SCR_RxDecEnable   BIT(3)
 
#define SCR_SKByA2   BIT(4)
 
#define SCR_NoSKMC   BIT(5)
 
#define SCR_TXBCUSEDK   BIT(6)
 
#define SCR_RXBCUSEDK   BIT(7)
 
#define USB_IS_HIGH_SPEED   0
 
#define USB_IS_FULL_SPEED   1
 
#define USB_SPEED_MASK   BIT(5)
 
#define USB_NORMAL_SIE_EP_MASK   0xF
 
#define USB_NORMAL_SIE_EP_SHIFT   4
 
#define USB_TEST_EP_MASK   0x30
 
#define USB_TEST_EP_SHIFT   4
 
#define USB_AGG_EN   BIT(3)
 
#define LAST_ENTRY_OF_TX_PKT_BUFFER   255
 
#define POLLING_LLT_THRESHOLD   20
 
#define POLLING_READY_TIMEOUT_COUNT   1000
 
#define MAX_MSS_DENSITY_2T   0x13
 
#define MAX_MSS_DENSITY_1T   0x0A
 
#define EPROM_CMD_OPERATING_MODE_MASK   ((1<<7)|(1<<6))
 
#define EPROM_CMD_CONFIG   0x3
 
#define EPROM_CMD_LOAD   1
 
#define HWSET_MAX_SIZE   128
 
#define HWSET_MAX_SIZE_92S   HWSET_MAX_SIZE
 
#define EFUSE_MAX_SECTION   16
 
#define WL_HWPDN_EN   BIT(0)
 
#define HAL_8192C_HW_GPIO_WPS_BIT   BIT(2)
 
#define RPMAC_RESET   0x100
 
#define RPMAC_TXSTART   0x104
 
#define RPMAC_TXLEGACYSIG   0x108
 
#define RPMAC_TXHTSIG1   0x10c
 
#define RPMAC_TXHTSIG2   0x110
 
#define RPMAC_PHYDEBUG   0x114
 
#define RPMAC_TXPACKETNUM   0x118
 
#define RPMAC_TXIDLE   0x11c
 
#define RPMAC_TXMACHEADER0   0x120
 
#define RPMAC_TXMACHEADER1   0x124
 
#define RPMAC_TXMACHEADER2   0x128
 
#define RPMAC_TXMACHEADER3   0x12c
 
#define RPMAC_TXMACHEADER4   0x130
 
#define RPMAC_TXMACHEADER5   0x134
 
#define RPMAC_TXDADATYPE   0x138
 
#define RPMAC_TXRANDOMSEED   0x13c
 
#define RPMAC_CCKPLCPPREAMBLE   0x140
 
#define RPMAC_CCKPLCPHEADER   0x144
 
#define RPMAC_CCKCRC16   0x148
 
#define RPMAC_OFDMRXCRC32OK   0x170
 
#define RPMAC_OFDMRXCRC32Er   0x174
 
#define RPMAC_OFDMRXPARITYER   0x178
 
#define RPMAC_OFDMRXCRC8ER   0x17c
 
#define RPMAC_CCKCRXRC16ER   0x180
 
#define RPMAC_CCKCRXRC32ER   0x184
 
#define RPMAC_CCKCRXRC32OK   0x188
 
#define RPMAC_TXSTATUS   0x18c
 
#define RFPGA0_RFMOD   0x800
 
#define RFPGA0_TXINFO   0x804
 
#define RFPGA0_PSDFUNCTION   0x808
 
#define RFPGA0_TXGAINSTAGE   0x80c
 
#define RFPGA0_RFTIMING1   0x810
 
#define RFPGA0_RFTIMING2   0x814
 
#define RFPGA0_XA_HSSIPARAMETER1   0x820
 
#define RFPGA0_XA_HSSIPARAMETER2   0x824
 
#define RFPGA0_XB_HSSIPARAMETER1   0x828
 
#define RFPGA0_XB_HSSIPARAMETER2   0x82c
 
#define RFPGA0_XA_LSSIPARAMETER   0x840
 
#define RFPGA0_XB_LSSIPARAMETER   0x844
 
#define RFPGA0_RFWAKEUPPARAMETER   0x850
 
#define RFPGA0_RFSLEEPUPPARAMETER   0x854
 
#define RFPGA0_XAB_SWITCHCONTROL   0x858
 
#define RFPGA0_XCD_SWITCHCONTROL   0x85c
 
#define RFPGA0_XA_RFINTERFACEOE   0x860
 
#define RFPGA0_XB_RFINTERFACEOE   0x864
 
#define RFPGA0_XAB_RFINTERFACESW   0x870
 
#define RFPGA0_XCD_RFINTERFACESW   0x874
 
#define rFPGA0_XAB_RFPARAMETER   0x878
 
#define rFPGA0_XCD_RFPARAMETER   0x87c
 
#define RFPGA0_ANALOGPARAMETER1   0x880
 
#define RFPGA0_ANALOGPARAMETER2   0x884
 
#define RFPGA0_ANALOGPARAMETER3   0x888
 
#define RFPGA0_ANALOGPARAMETER4   0x88c
 
#define RFPGA0_XA_LSSIREADBACK   0x8a0
 
#define RFPGA0_XB_LSSIREADBACK   0x8a4
 
#define RFPGA0_XC_LSSIREADBACK   0x8a8
 
#define RFPGA0_XD_LSSIREADBACK   0x8ac
 
#define RFPGA0_PSDREPORT   0x8b4
 
#define TRANSCEIVEA_HSPI_READBACK   0x8b8
 
#define TRANSCEIVEB_HSPI_READBACK   0x8bc
 
#define RFPGA0_XAB_RFINTERFACERB   0x8e0
 
#define RFPGA0_XCD_RFINTERFACERB   0x8e4
 
#define RFPGA1_RFMOD   0x900
 
#define RFPGA1_TXBLOCK   0x904
 
#define RFPGA1_DEBUGSELECT   0x908
 
#define RFPGA1_TXINFO   0x90c
 
#define RCCK0_SYSTEM   0xa00
 
#define RCCK0_AFESETTING   0xa04
 
#define RCCK0_CCA   0xa08
 
#define RCCK0_RXAGC1   0xa0c
 
#define RCCK0_RXAGC2   0xa10
 
#define RCCK0_RXHP   0xa14
 
#define RCCK0_DSPPARAMETER1   0xa18
 
#define RCCK0_DSPPARAMETER2   0xa1c
 
#define RCCK0_TXFILTER1   0xa20
 
#define RCCK0_TXFILTER2   0xa24
 
#define RCCK0_DEBUGPORT   0xa28
 
#define RCCK0_FALSEALARMREPORT   0xa2c
 
#define RCCK0_TRSSIREPORT   0xa50
 
#define RCCK0_RXREPORT   0xa54
 
#define RCCK0_FACOUNTERLOWER   0xa5c
 
#define RCCK0_FACOUNTERUPPER   0xa58
 
#define ROFDM0_LSTF   0xc00
 
#define ROFDM0_TRXPATHENABLE   0xc04
 
#define ROFDM0_TRMUXPAR   0xc08
 
#define ROFDM0_TRSWISOLATION   0xc0c
 
#define ROFDM0_XARXAFE   0xc10
 
#define ROFDM0_XARXIQIMBALANCE   0xc14
 
#define ROFDM0_XBRXAFE   0xc18
 
#define ROFDM0_XBRXIQIMBALANCE   0xc1c
 
#define ROFDM0_XCRXAFE   0xc20
 
#define ROFDM0_XCRXIQIMBANLANCE   0xc24
 
#define ROFDM0_XDRXAFE   0xc28
 
#define ROFDM0_XDRXIQIMBALANCE   0xc2c
 
#define ROFDM0_RXDETECTOR1   0xc30
 
#define ROFDM0_RXDETECTOR2   0xc34
 
#define ROFDM0_RXDETECTOR3   0xc38
 
#define ROFDM0_RXDETECTOR4   0xc3c
 
#define ROFDM0_RXDSP   0xc40
 
#define ROFDM0_CFOANDDAGC   0xc44
 
#define ROFDM0_CCADROPTHRESHOLD   0xc48
 
#define ROFDM0_ECCATHRESHOLD   0xc4c
 
#define ROFDM0_XAAGCCORE1   0xc50
 
#define ROFDM0_XAAGCCORE2   0xc54
 
#define ROFDM0_XBAGCCORE1   0xc58
 
#define ROFDM0_XBAGCCORE2   0xc5c
 
#define ROFDM0_XCAGCCORE1   0xc60
 
#define ROFDM0_XCAGCCORE2   0xc64
 
#define ROFDM0_XDAGCCORE1   0xc68
 
#define ROFDM0_XDAGCCORE2   0xc6c
 
#define ROFDM0_AGCPARAMETER1   0xc70
 
#define ROFDM0_AGCPARAMETER2   0xc74
 
#define ROFDM0_AGCRSSITABLE   0xc78
 
#define ROFDM0_HTSTFAGC   0xc7c
 
#define ROFDM0_XATXIQIMBALANCE   0xc80
 
#define ROFDM0_XATXAFE   0xc84
 
#define ROFDM0_XBTXIQIMBALANCE   0xc88
 
#define ROFDM0_XBTXAFE   0xc8c
 
#define ROFDM0_XCTXIQIMBALANCE   0xc90
 
#define ROFDM0_XCTXAFE   0xc94
 
#define ROFDM0_XDTXIQIMBALANCE   0xc98
 
#define ROFDM0_XDTXAFE   0xc9c
 
#define ROFDM0_RXIQEXTANTA   0xca0
 
#define ROFDM0_RXHPPARAMETER   0xce0
 
#define ROFDM0_TXPSEUDONOISEWGT   0xce4
 
#define ROFDM0_FRAMESYNC   0xcf0
 
#define ROFDM0_DFSREPORT   0xcf4
 
#define ROFDM0_TXCOEFF1   0xca4
 
#define ROFDM0_TXCOEFF2   0xca8
 
#define ROFDM0_TXCOEFF3   0xcac
 
#define ROFDM0_TXCOEFF4   0xcb0
 
#define ROFDM0_TXCOEFF5   0xcb4
 
#define ROFDM0_TXCOEFF6   0xcb8
 
#define ROFDM1_LSTF   0xd00
 
#define ROFDM1_TRXPATHENABLE   0xd04
 
#define ROFDM1_CF0   0xd08
 
#define ROFDM1_CSI1   0xd10
 
#define ROFDM1_SBD   0xd14
 
#define ROFDM1_CSI2   0xd18
 
#define ROFDM1_CFOTRACKING   0xd2c
 
#define ROFDM1_TRXMESAURE1   0xd34
 
#define ROFDM1_INTFDET   0xd3c
 
#define ROFDM1_PSEUDONOISESTATEAB   0xd50
 
#define ROFDM1_PSEUDONOISESTATECD   0xd54
 
#define ROFDM1_RXPSEUDONOISEWGT   0xd58
 
#define ROFDM_PHYCOUNTER1   0xda0
 
#define ROFDM_PHYCOUNTER2   0xda4
 
#define ROFDM_PHYCOUNTER3   0xda8
 
#define ROFDM_SHORTCFOAB   0xdac
 
#define ROFDM_SHORTCFOCD   0xdb0
 
#define ROFDM_LONGCFOAB   0xdb4
 
#define ROFDM_LONGCFOCD   0xdb8
 
#define ROFDM_TAILCF0AB   0xdbc
 
#define ROFDM_TAILCF0CD   0xdc0
 
#define ROFDM_PWMEASURE1   0xdc4
 
#define ROFDM_PWMEASURE2   0xdc8
 
#define ROFDM_BWREPORT   0xdcc
 
#define ROFDM_AGCREPORT   0xdd0
 
#define ROFDM_RXSNR   0xdd4
 
#define ROFDM_RXEVMCSI   0xdd8
 
#define ROFDM_SIGREPORT   0xddc
 
#define RTXAGC_A_RATE18_06   0xe00
 
#define RTXAGC_A_RATE54_24   0xe04
 
#define RTXAGC_A_CCK1_MCS32   0xe08
 
#define RTXAGC_A_MCS03_MCS00   0xe10
 
#define RTXAGC_A_MCS07_MCS04   0xe14
 
#define RTXAGC_A_MCS11_MCS08   0xe18
 
#define RTXAGC_A_MCS15_MCS12   0xe1c
 
#define RTXAGC_B_RATE18_06   0x830
 
#define RTXAGC_B_RATE54_24   0x834
 
#define RTXAGC_B_CCK1_55_MCS32   0x838
 
#define RTXAGC_B_MCS03_MCS00   0x83c
 
#define RTXAGC_B_MCS07_MCS04   0x848
 
#define RTXAGC_B_MCS11_MCS08   0x84c
 
#define RTXAGC_B_MCS15_MCS12   0x868
 
#define RTXAGC_B_CCK11_A_CCK2_11   0x86c
 
#define RZEBRA1_HSSIENABLE   0x0
 
#define RZEBRA1_TRXENABLE1   0x1
 
#define RZEBRA1_TRXENABLE2   0x2
 
#define RZEBRA1_AGC   0x4
 
#define RZEBRA1_CHARGEPUMP   0x5
 
#define RZEBRA1_CHANNEL   0x7
 
#define RZEBRA1_TXGAIN   0x8
 
#define RZEBRA1_TXLPF   0x9
 
#define RZEBRA1_RXLPF   0xb
 
#define RZEBRA1_RXHPFCORNER   0xc
 
#define RGLOBALCTRL   0
 
#define RRTL8256_TXLPF   19
 
#define RRTL8256_RXLPF   11
 
#define RRTL8258_TXLPF   0x11
 
#define RRTL8258_RXLPF   0x13
 
#define RRTL8258_RSSILPF   0xa
 
#define RF_AC   0x00
 
#define RF_IQADJ_G1   0x01
 
#define RF_IQADJ_G2   0x02
 
#define RF_POW_TRSW   0x05
 
#define RF_GAIN_RX   0x06
 
#define RF_GAIN_TX   0x07
 
#define RF_TXM_IDAC   0x08
 
#define RF_BS_IQGEN   0x0F
 
#define RF_MODE1   0x10
 
#define RF_MODE2   0x11
 
#define RF_RX_AGC_HP   0x12
 
#define RF_TX_AGC   0x13
 
#define RF_BIAS   0x14
 
#define RF_IPA   0x15
 
#define RF_POW_ABILITY   0x17
 
#define RF_MODE_AG   0x18
 
#define RRFCHANNEL   0x18
 
#define RF_CHNLBW   0x18
 
#define RF_TOP   0x19
 
#define RF_RX_G1   0x1A
 
#define RF_RX_G2   0x1B
 
#define RF_RX_BB2   0x1C
 
#define RF_RX_BB1   0x1D
 
#define RF_RCK1   0x1E
 
#define RF_RCK2   0x1F
 
#define RF_TX_G1   0x20
 
#define RF_TX_G2   0x21
 
#define RF_TX_G3   0x22
 
#define RF_TX_BB1   0x23
 
#define RF_T_METER   0x24
 
#define RF_SYN_G1   0x25
 
#define RF_SYN_G2   0x26
 
#define RF_SYN_G3   0x27
 
#define RF_SYN_G4   0x28
 
#define RF_SYN_G5   0x29
 
#define RF_SYN_G6   0x2A
 
#define RF_SYN_G7   0x2B
 
#define RF_SYN_G8   0x2C
 
#define RF_RCK_OS   0x30
 
#define RF_TXPA_G1   0x31
 
#define RF_TXPA_G2   0x32
 
#define RF_TXPA_G3   0x33
 
#define BBBRESETB   0x100
 
#define BGLOBALRESETB   0x200
 
#define BOFDMTXSTART   0x4
 
#define BCCKTXSTART   0x8
 
#define BCRC32DEBUG   0x100
 
#define BPMACLOOPBACK   0x10
 
#define BTXLSIG   0xffffff
 
#define BOFDMTXRATE   0xf
 
#define BOFDMTXRESERVED   0x10
 
#define BOFDMTXLENGTH   0x1ffe0
 
#define BOFDMTXPARITY   0x20000
 
#define BTXHTSIG1   0xffffff
 
#define BTXHTMCSRATE   0x7f
 
#define BTXHTBW   0x80
 
#define BTXHTLENGTH   0xffff00
 
#define BTXHTSIG2   0xffffff
 
#define BTXHTSMOOTHING   0x1
 
#define BTXHTSOUNDING   0x2
 
#define BTXHTRESERVED   0x4
 
#define BTXHTAGGREATION   0x8
 
#define BTXHTSTBC   0x30
 
#define BTXHTADVANCECODING   0x40
 
#define BTXHTSHORTGI   0x80
 
#define BTXHTNUMBERHT_LTF   0x300
 
#define BTXHTCRC8   0x3fc00
 
#define BCOUNTERRESET   0x10000
 
#define BNUMOFOFDMTX   0xffff
 
#define BNUMOFCCKTX   0xffff0000
 
#define BTXIDLEINTERVAL   0xffff
 
#define BOFDMSERVICE   0xffff0000
 
#define BTXMACHEADER   0xffffffff
 
#define BTXDATAINIT   0xff
 
#define BTXHTMODE   0x100
 
#define BTXDATATYPE   0x30000
 
#define BTXRANDOMSEED   0xffffffff
 
#define BCCKTXPREAMBLE   0x1
 
#define BCCKTXSFD   0xffff0000
 
#define BCCKTXSIG   0xff
 
#define BCCKTXSERVICE   0xff00
 
#define BCCKLENGTHEXT   0x8000
 
#define BCCKTXLENGHT   0xffff0000
 
#define BCCKTXCRC16   0xffff
 
#define BCCKTXSTATUS   0x1
 
#define BOFDMTXSTATUS   0x2
 
#define IS_BB_REG_OFFSET_92S(_Offset)   ((_Offset >= 0x800) && (_Offset <= 0xfff))
 
#define BRFMOD   0x1
 
#define BJAPANMODE   0x2
 
#define BCCKTXSC   0x30
 
#define BCCKEN   0x1000000
 
#define BOFDMEN   0x2000000
 
#define BOFDMRXADCPHASE   0x10000
 
#define BOFDMTXDACPHASE   0x40000
 
#define BXATXAGC   0x3f
 
#define BXBTXAGC   0xf00
 
#define BXCTXAGC   0xf000
 
#define BXDTXAGC   0xf0000
 
#define BPASTART   0xf0000000
 
#define BTRSTART   0x00f00000
 
#define BRFSTART   0x0000f000
 
#define BBBSTART   0x000000f0
 
#define BBBCCKSTART   0x0000000f
 
#define BPAEND   0xf
 
#define BTREND   0x0f000000
 
#define BRFEND   0x000f0000
 
#define BCCAMASK   0x000000f0
 
#define BR2RCCAMASK   0x00000f00
 
#define BHSSI_R2TDELAY   0xf8000000
 
#define BHSSI_T2RDELAY   0xf80000
 
#define BCONTXHSSI   0x400
 
#define BIGFROMCCK   0x200
 
#define BAGCADDRESS   0x3f
 
#define BRXHPTX   0x7000
 
#define BRXHP2RX   0x38000
 
#define BRXHPCCKINI   0xc0000
 
#define BAGCTXCODE   0xc00000
 
#define BAGCRXCODE   0x300000
 
#define B3WIREDATALENGTH   0x800
 
#define B3WIREADDREAALENGTH   0x400
 
#define B3WIRERFPOWERDOWN   0x1
 
#define B5GPAPEPOLARITY   0x40000000
 
#define B2GPAPEPOLARITY   0x80000000
 
#define BRFSW_TXDEFAULTANT   0x3
 
#define BRFSW_TXOPTIONANT   0x30
 
#define BRFSW_RXDEFAULTANT   0x300
 
#define BRFSW_RXOPTIONANT   0x3000
 
#define BRFSI_3WIREDATA   0x1
 
#define BRFSI_3WIRECLOCK   0x2
 
#define BRFSI_3WIRELOAD   0x4
 
#define BRFSI_3WIRERW   0x8
 
#define BRFSI_3WIRE   0xf
 
#define BRFSI_RFENV   0x10
 
#define BRFSI_TRSW   0x20
 
#define BRFSI_TRSWB   0x40
 
#define BRFSI_ANTSW   0x100
 
#define BRFSI_ANTSWB   0x200
 
#define BRFSI_PAPE   0x400
 
#define BRFSI_PAPE5G   0x800
 
#define BBANDSELECT   0x1
 
#define BHTSIG2_GI   0x80
 
#define BHTSIG2_SMOOTHING   0x01
 
#define BHTSIG2_SOUNDING   0x02
 
#define BHTSIG2_AGGREATON   0x08
 
#define BHTSIG2_STBC   0x30
 
#define BHTSIG2_ADVCODING   0x40
 
#define BHTSIG2_NUMOFHTLTF   0x300
 
#define BHTSIG2_CRC8   0x3fc
 
#define BHTSIG1_MCS   0x7f
 
#define BHTSIG1_BANDWIDTH   0x80
 
#define BHTSIG1_HTLENGTH   0xffff
 
#define BLSIG_RATE   0xf
 
#define BLSIG_RESERVED   0x10
 
#define BLSIG_LENGTH   0x1fffe
 
#define BLSIG_PARITY   0x20
 
#define BCCKRXPHASE   0x4
 
#define BLSSIREADADDRESS   0x7f800000
 
#define BLSSIREADEDGE   0x80000000
 
#define BLSSIREADBACKDATA   0xfffff
 
#define BLSSIREADOKFLAG   0x1000
 
#define BCCKSAMPLERATE   0x8
 
#define BREGULATOR0STANDBY   0x1
 
#define BREGULATORPLLSTANDBY   0x2
 
#define BREGULATOR1STANDBY   0x4
 
#define BPLLPOWERUP   0x8
 
#define BDPLLPOWERUP   0x10
 
#define BDA10POWERUP   0x20
 
#define BAD7POWERUP   0x200
 
#define BDA6POWERUP   0x2000
 
#define BXTALPOWERUP   0x4000
 
#define B40MDCLKPOWERUP   0x8000
 
#define BDA6DEBUGMODE   0x20000
 
#define BDA6SWING   0x380000
 
#define BADCLKPHASE   0x4000000
 
#define B80MCLKDELAY   0x18000000
 
#define BAFEWATCHDOGENABLE   0x20000000
 
#define BXTALCAP01   0xc0000000
 
#define BXTALCAP23   0x3
 
#define BXTALCAP92X   0x0f000000
 
#define BXTALCAP   0x0f000000
 
#define BINTDIFCLKENABLE   0x400
 
#define BEXTSIGCLKENABLE   0x800
 
#define BBANDGAP_MBIAS_POWERUP   0x10000
 
#define BAD11SH_GAIN   0xc0000
 
#define BAD11NPUT_RANGE   0x700000
 
#define BAD110P_CURRENT   0x3800000
 
#define BLPATH_LOOPBACK   0x4000000
 
#define BQPATH_LOOPBACK   0x8000000
 
#define BAFE_LOOPBACK   0x10000000
 
#define BDA10_SWING   0x7e0
 
#define BDA10_REVERSE   0x800
 
#define BDA_CLK_SOURCE   0x1000
 
#define BDA7INPUT_RANGE   0x6000
 
#define BDA7_GAIN   0x38000
 
#define BDA7OUTPUT_CM_MODE   0x40000
 
#define BDA7INPUT_CM_MODE   0x380000
 
#define BDA7CURRENT   0xc00000
 
#define BREGULATOR_ADJUST   0x7000000
 
#define BAD11POWERUP_ATTX   0x1
 
#define BDA10PS_ATTX   0x10
 
#define BAD11POWERUP_ATRX   0x100
 
#define BDA10PS_ATRX   0x1000
 
#define BCCKRX_AGC_FORMAT   0x200
 
#define BPSDFFT_SAMPLE_POINT   0xc000
 
#define BPSD_AVERAGE_NUM   0x3000
 
#define BIQPATH_CONTROL   0xc00
 
#define BPSD_FREQ   0x3ff
 
#define BPSD_ANTENNA_PATH   0x30
 
#define BPSD_IQ_SWITCH   0x40
 
#define BPSD_RX_TRIGGER   0x400000
 
#define BPSD_TX_TRIGGER   0x80000000
 
#define BPSD_SINE_TONE_SCALE   0x7f000000
 
#define BPSD_REPORT   0xffff
 
#define BOFDM_TXSC   0x30000000
 
#define BCCK_TXON   0x1
 
#define BOFDM_TXON   0x2
 
#define BDEBUG_PAGE   0xfff
 
#define BDEBUG_ITEM   0xff
 
#define BANTL   0x10
 
#define BANT_NONHT   0x100
 
#define BANT_HT1   0x1000
 
#define BANT_HT2   0x10000
 
#define BANT_HT1S1   0x100000
 
#define BANT_NONHTS1   0x1000000
 
#define BCCK_BBMODE   0x3
 
#define BCCK_TXPOWERSAVING   0x80
 
#define BCCK_RXPOWERSAVING   0x40
 
#define BCCK_SIDEBAND   0x10
 
#define BCCK_SCRAMBLE   0x8
 
#define BCCK_ANTDIVERSITY   0x8000
 
#define BCCK_CARRIER_RECOVERY   0x4000
 
#define BCCK_TXRATE   0x3000
 
#define BCCK_DCCANCEL   0x0800
 
#define BCCK_ISICANCEL   0x0400
 
#define BCCK_MATCH_FILTER   0x0200
 
#define BCCK_EQUALIZER   0x0100
 
#define BCCK_PREAMBLE_DETECT   0x800000
 
#define BCCK_FAST_FALSECCA   0x400000
 
#define BCCK_CH_ESTSTART   0x300000
 
#define BCCK_CCA_COUNT   0x080000
 
#define BCCK_CS_LIM   0x070000
 
#define BCCK_BIST_MODE   0x80000000
 
#define BCCK_CCAMASK   0x40000000
 
#define BCCK_TX_DAC_PHASE   0x4
 
#define BCCK_RX_ADC_PHASE   0x20000000
 
#define BCCKR_CP_MODE   0x0100
 
#define BCCK_TXDC_OFFSET   0xf0
 
#define BCCK_RXDC_OFFSET   0xf
 
#define BCCK_CCA_MODE   0xc000
 
#define BCCK_FALSECS_LIM   0x3f00
 
#define BCCK_CS_RATIO   0xc00000
 
#define BCCK_CORGBIT_SEL   0x300000
 
#define BCCK_PD_LIM   0x0f0000
 
#define BCCK_NEWCCA   0x80000000
 
#define BCCK_RXHP_OF_IG   0x8000
 
#define BCCK_RXIG   0x7f00
 
#define BCCK_LNA_POLARITY   0x800000
 
#define BCCK_RX1ST_BAIN   0x7f0000
 
#define BCCK_RF_EXTEND   0x20000000
 
#define BCCK_RXAGC_SATLEVEL   0x1f000000
 
#define BCCK_RXAGC_SATCOUNT   0xe0
 
#define bCCKRxRFSettle   0x1f
 
#define BCCK_FIXED_RXAGC   0x8000
 
#define BCCK_ANTENNA_POLARITY   0x2000
 
#define BCCK_TXFILTER_TYPE   0x0c00
 
#define BCCK_RXAGC_REPORTTYPE   0x0300
 
#define BCCK_RXDAGC_EN   0x80000000
 
#define BCCK_RXDAGC_PERIOD   0x20000000
 
#define BCCK_RXDAGC_SATLEVEL   0x1f000000
 
#define BCCK_TIMING_RECOVERY   0x800000
 
#define BCCK_TXC0   0x3f0000
 
#define BCCK_TXC1   0x3f000000
 
#define BCCK_TXC2   0x3f
 
#define BCCK_TXC3   0x3f00
 
#define BCCK_TXC4   0x3f0000
 
#define BCCK_TXC5   0x3f000000
 
#define BCCK_TXC6   0x3f
 
#define BCCK_TXC7   0x3f00
 
#define BCCK_DEBUGPORT   0xff0000
 
#define BCCK_DAC_DEBUG   0x0f000000
 
#define BCCK_FALSEALARM_ENABLE   0x8000
 
#define BCCK_FALSEALARM_READ   0x4000
 
#define BCCK_TRSSI   0x7f
 
#define BCCK_RXAGC_REPORT   0xfe
 
#define BCCK_RXREPORT_ANTSEL   0x80000000
 
#define BCCK_RXREPORT_MFOFF   0x40000000
 
#define BCCK_RXREPORT_SQLOSS   0x20000000
 
#define BCCK_RXREPORT_PKTLOSS   0x10000000
 
#define BCCK_RXREPORT_LOCKEDBIT   0x08000000
 
#define BCCK_RXREPORT_RATEERROR   0x04000000
 
#define BCCK_RXREPORT_RXRATE   0x03000000
 
#define BCCK_RXFA_COUNTER_LOWER   0xff
 
#define BCCK_RXFA_COUNTER_UPPER   0xff000000
 
#define BCCK_RXHPAGC_START   0xe000
 
#define BCCK_RXHPAGC_FINAL   0x1c00
 
#define BCCK_RXFALSEALARM_ENABLE   0x8000
 
#define BCCK_FACOUNTER_FREEZE   0x4000
 
#define BCCK_TXPATH_SEL   0x10000000
 
#define BCCK_DEFAULT_RXPATH   0xc000000
 
#define BCCK_OPTION_RXPATH   0x3000000
 
#define BNUM_OFSTF   0x3
 
#define BSHIFT_L   0xc0
 
#define BGI_TH   0xc
 
#define BRXPATH_A   0x1
 
#define BRXPATH_B   0x2
 
#define BRXPATH_C   0x4
 
#define BRXPATH_D   0x8
 
#define BTXPATH_A   0x1
 
#define BTXPATH_B   0x2
 
#define BTXPATH_C   0x4
 
#define BTXPATH_D   0x8
 
#define BTRSSI_FREQ   0x200
 
#define BADC_BACKOFF   0x3000
 
#define BDFIR_BACKOFF   0xc000
 
#define BTRSSI_LATCH_PHASE   0x10000
 
#define BRX_LDC_OFFSET   0xff
 
#define BRX_QDC_OFFSET   0xff00
 
#define BRX_DFIR_MODE   0x1800000
 
#define BRX_DCNF_TYPE   0xe000000
 
#define BRXIQIMB_A   0x3ff
 
#define BRXIQIMB_B   0xfc00
 
#define BRXIQIMB_C   0x3f0000
 
#define BRXIQIMB_D   0xffc00000
 
#define BDC_DC_NOTCH   0x60000
 
#define BRXNB_NOTCH   0x1f000000
 
#define BPD_TH   0xf
 
#define BPD_TH_OPT2   0xc000
 
#define BPWED_TH   0x700
 
#define BIFMF_WIN_L   0x800
 
#define BPD_OPTION   0x1000
 
#define BMF_WIN_L   0xe000
 
#define BBW_SEARCH_L   0x30000
 
#define BWIN_ENH_L   0xc0000
 
#define BBW_TH   0x700000
 
#define BED_TH2   0x3800000
 
#define BBW_OPTION   0x4000000
 
#define BRADIO_TH   0x18000000
 
#define BWINDOW_L   0xe0000000
 
#define BSBD_OPTION   0x1
 
#define BFRAME_TH   0x1c
 
#define BFS_OPTION   0x60
 
#define BDC_SLOPE_CHECK   0x80
 
#define BFGUARD_COUNTER_DC_L   0xe00
 
#define BFRAME_WEIGHT_SHORT   0x7000
 
#define BSUB_TUNE   0xe00000
 
#define BFRAME_DC_LENGTH   0xe000000
 
#define BSBD_START_OFFSET   0x30000000
 
#define BFRAME_TH_2   0x7
 
#define BFRAME_GI2_TH   0x38
 
#define BGI2_SYNC_EN   0x40
 
#define BSARCH_SHORT_EARLY   0x300
 
#define BSARCH_SHORT_LATE   0xc00
 
#define BSARCH_GI2_LATE   0x70000
 
#define BCFOANTSUM   0x1
 
#define BCFOACC   0x2
 
#define BCFOSTARTOFFSET   0xc
 
#define BCFOLOOPBACK   0x70
 
#define BCFOSUMWEIGHT   0x80
 
#define BDAGCENABLE   0x10000
 
#define BTXIQIMB_A   0x3ff
 
#define BTXIQIMB_b   0xfc00
 
#define BTXIQIMB_C   0x3f0000
 
#define BTXIQIMB_D   0xffc00000
 
#define BTXIDCOFFSET   0xff
 
#define BTXIQDCOFFSET   0xff00
 
#define BTXDFIRMODE   0x10000
 
#define BTXPESUDO_NOISEON   0x4000000
 
#define BTXPESUDO_NOISE_A   0xff
 
#define BTXPESUDO_NOISE_B   0xff00
 
#define BTXPESUDO_NOISE_C   0xff0000
 
#define BTXPESUDO_NOISE_D   0xff000000
 
#define BCCA_DROPOPTION   0x20000
 
#define BCCA_DROPTHRES   0xfff00000
 
#define BEDCCA_H   0xf
 
#define BEDCCA_L   0xf0
 
#define BLAMBDA_ED   0x300
 
#define BRX_INITIALGAIN   0x7f
 
#define BRX_ANTDIV_EN   0x80
 
#define BRX_AGC_ADDRESS_FOR_LNA   0x7f00
 
#define BRX_HIGHPOWER_FLOW   0x8000
 
#define BRX_AGC_FREEZE_THRES   0xc0000
 
#define BRX_FREEZESTEP_AGC1   0x300000
 
#define BRX_FREEZESTEP_AGC2   0xc00000
 
#define BRX_FREEZESTEP_AGC3   0x3000000
 
#define BRX_FREEZESTEP_AGC0   0xc000000
 
#define BRXRSSI_CMP_EN   0x10000000
 
#define BRXQUICK_AGCEN   0x20000000
 
#define BRXAGC_FREEZE_THRES_MODE   0x40000000
 
#define BRX_OVERFLOW_CHECKTYPE   0x80000000
 
#define BRX_AGCSHIFT   0x7f
 
#define BTRSW_TRI_ONLY   0x80
 
#define BPOWER_THRES   0x300
 
#define BRXAGC_EN   0x1
 
#define BRXAGC_TOGETHER_EN   0x2
 
#define BRXAGC_MIN   0x4
 
#define BRXHP_INI   0x7
 
#define BRXHP_TRLNA   0x70
 
#define BRXHP_RSSI   0x700
 
#define BRXHP_BBP1   0x7000
 
#define BRXHP_BBP2   0x70000
 
#define BRXHP_BBP3   0x700000
 
#define BRSSI_H   0x7f0000
 
#define BRSSI_GEN   0x7f000000
 
#define BRXSETTLE_TRSW   0x7
 
#define BRXSETTLE_LNA   0x38
 
#define BRXSETTLE_RSSI   0x1c0
 
#define BRXSETTLE_BBP   0xe00
 
#define BRXSETTLE_RXHP   0x7000
 
#define BRXSETTLE_ANTSW_RSSI   0x38000
 
#define BRXSETTLE_ANTSW   0xc0000
 
#define BRXPROCESS_TIME_DAGC   0x300000
 
#define BRXSETTLE_HSSI   0x400000
 
#define BRXPROCESS_TIME_BBPPW   0x800000
 
#define BRXANTENNA_POWER_SHIFT   0x3000000
 
#define BRSSI_TABLE_SELECT   0xc000000
 
#define BRXHP_FINAL   0x7000000
 
#define BRXHPSETTLE_BBP   0x7
 
#define BRXHTSETTLE_HSSI   0x8
 
#define BRXHTSETTLE_RXHP   0x70
 
#define BRXHTSETTLE_BBPPW   0x80
 
#define BRXHTSETTLE_IDLE   0x300
 
#define BRXHTSETTLE_RESERVED   0x1c00
 
#define BRXHT_RXHP_EN   0x8000
 
#define BRXAGC_FREEZE_THRES   0x30000
 
#define BRXAGC_TOGETHEREN   0x40000
 
#define BRXHTAGC_MIN   0x80000
 
#define BRXHTAGC_EN   0x100000
 
#define BRXHTDAGC_EN   0x200000
 
#define BRXHT_RXHP_BBP   0x1c00000
 
#define BRXHT_RXHP_FINAL   0xe0000000
 
#define BRXPW_RADIO_TH   0x3
 
#define BRXPW_RADIO_EN   0x4
 
#define BRXMF_HOLD   0x3800
 
#define BRXPD_DELAY_TH1   0x38
 
#define BRXPD_DELAY_TH2   0x1c0
 
#define BRXPD_DC_COUNT_MAX   0x600
 
#define BRXPD_DELAY_TH   0x8000
 
#define BRXPROCESS_DELAY   0xf0000
 
#define BRXSEARCHRANGE_GI2_EARLY   0x700000
 
#define BRXFRAME_FUARD_COUNTER_L   0x3800000
 
#define BRXSGI_GUARD_L   0xc000000
 
#define BRXSGI_SEARCH_L   0x30000000
 
#define BRXSGI_TH   0xc0000000
 
#define BDFSCNT0   0xff
 
#define BDFSCNT1   0xff00
 
#define BDFSFLAG   0xf0000
 
#define BMF_WEIGHT_SUM   0x300000
 
#define BMINIDX_TH   0x7f000000
 
#define BDAFORMAT   0x40000
 
#define BTXCH_EMU_ENABLE   0x01000000
 
#define BTRSW_ISOLATION_A   0x7f
 
#define BTRSW_ISOLATION_B   0x7f00
 
#define BTRSW_ISOLATION_C   0x7f0000
 
#define BTRSW_ISOLATION_D   0x7f000000
 
#define BEXT_LNA_GAIN   0x7c00
 
#define BSTBC_EN   0x4
 
#define BANTENNA_MAPPING   0x10
 
#define BNSS   0x20
 
#define BCFO_ANTSUM_ID   0x200
 
#define BPHY_COUNTER_RESET   0x8000000
 
#define BCFO_REPORT_GET   0x4000000
 
#define BOFDM_CONTINUE_TX   0x10000000
 
#define BOFDM_SINGLE_CARRIER   0x20000000
 
#define BOFDM_SINGLE_TONE   0x40000000
 
#define BHT_DETECT   0x100
 
#define BCFOEN   0x10000
 
#define BCFOVALUE   0xfff00000
 
#define BSIGTONE_RE   0x3f
 
#define BSIGTONE_IM   0x7f00
 
#define BCOUNTER_CCA   0xffff
 
#define BCOUNTER_PARITYFAIL   0xffff0000
 
#define BCOUNTER_RATEILLEGAL   0xffff
 
#define BCOUNTER_CRC8FAIL   0xffff0000
 
#define BCOUNTER_MCSNOSUPPORT   0xffff
 
#define BCOUNTER_FASTSYNC   0xffff
 
#define BSHORTCFO   0xfff
 
#define BSHORTCFOT_LENGTH   12
 
#define BSHORTCFOF_LENGTH   11
 
#define BLONGCFO   0x7ff
 
#define BLONGCFOT_LENGTH   11
 
#define BLONGCFOF_LENGTH   11
 
#define BTAILCFO   0x1fff
 
#define BTAILCFOT_LENGTH   13
 
#define BTAILCFOF_LENGTH   12
 
#define BNOISE_EN_PWDB   0xffff
 
#define BCC_POWER_DB   0xffff0000
 
#define BMOISE_PWDB   0xffff
 
#define BPOWERMEAST_LENGTH   10
 
#define BPOWERMEASF_LENGTH   3
 
#define BRX_HT_BW   0x1
 
#define BRXSC   0x6
 
#define BRX_HT   0x8
 
#define BNB_INTF_DET_ON   0x1
 
#define BINTF_WIN_LEN_CFG   0x30
 
#define BNB_INTF_TH_CFG   0x1c0
 
#define BRFGAIN   0x3f
 
#define BTABLESEL   0x40
 
#define BTRSW   0x80
 
#define BRXSNR_A   0xff
 
#define BRXSNR_B   0xff00
 
#define BRXSNR_C   0xff0000
 
#define BRXSNR_D   0xff000000
 
#define BSNR_EVMT_LENGTH   8
 
#define BSNR_EVMF_LENGTH   1
 
#define BCSI1ST   0xff
 
#define BCSI2ND   0xff00
 
#define BRXEVM1ST   0xff0000
 
#define BRXEVM2ND   0xff000000
 
#define BSIGEVM   0xff
 
#define BPWDB   0xff00
 
#define BSGIEN   0x10000
 
#define BSFACTOR_QMA1   0xf
 
#define BSFACTOR_QMA2   0xf0
 
#define BSFACTOR_QMA3   0xf00
 
#define BSFACTOR_QMA4   0xf000
 
#define BSFACTOR_QMA5   0xf0000
 
#define BSFACTOR_QMA6   0xf0000
 
#define BSFACTOR_QMA7   0xf00000
 
#define BSFACTOR_QMA8   0xf000000
 
#define BSFACTOR_QMA9   0xf0000000
 
#define BCSI_SCHEME   0x100000
 
#define BNOISE_LVL_TOP_SET   0x3
 
#define BCHSMOOTH   0x4
 
#define BCHSMOOTH_CFG1   0x38
 
#define BCHSMOOTH_CFG2   0x1c0
 
#define BCHSMOOTH_CFG3   0xe00
 
#define BCHSMOOTH_CFG4   0x7000
 
#define BMRCMODE   0x800000
 
#define BTHEVMCFG   0x7000000
 
#define BLOOP_FIT_TYPE   0x1
 
#define BUPD_CFO   0x40
 
#define BUPD_CFO_OFFDATA   0x80
 
#define BADV_UPD_CFO   0x100
 
#define BADV_TIME_CTRL   0x800
 
#define BUPD_CLKO   0x1000
 
#define BFC   0x6000
 
#define BTRACKING_MODE   0x8000
 
#define BPHCMP_ENABLE   0x10000
 
#define BUPD_CLKO_LTF   0x20000
 
#define BCOM_CH_CFO   0x40000
 
#define BCSI_ESTI_MODE   0x80000
 
#define BADV_UPD_EQZ   0x100000
 
#define BUCHCFG   0x7000000
 
#define BUPDEQZ   0x8000000
 
#define BRX_PESUDO_NOISE_ON   0x20000000
 
#define BRX_PESUDO_NOISE_A   0xff
 
#define BRX_PESUDO_NOISE_B   0xff00
 
#define BRX_PESUDO_NOISE_C   0xff0000
 
#define BRX_PESUDO_NOISE_D   0xff000000
 
#define BRX_PESUDO_NOISESTATE_A   0xffff
 
#define BRX_PESUDO_NOISESTATE_B   0xffff0000
 
#define BRX_PESUDO_NOISESTATE_C   0xffff
 
#define BRX_PESUDO_NOISESTATE_D   0xffff0000
 
#define BZEBRA1_HSSIENABLE   0x8
 
#define BZEBRA1_TRXCONTROL   0xc00
 
#define BZEBRA1_TRXGAINSETTING   0x07f
 
#define BZEBRA1_RXCOUNTER   0xc00
 
#define BZEBRA1_TXCHANGEPUMP   0x38
 
#define BZEBRA1_RXCHANGEPUMP   0x7
 
#define BZEBRA1_CHANNEL_NUM   0xf80
 
#define BZEBRA1_TXLPFBW   0x400
 
#define BZEBRA1_RXLPFBW   0x600
 
#define BRTL8256REG_MODE_CTRL1   0x100
 
#define BRTL8256REG_MODE_CTRL0   0x40
 
#define BRTL8256REG_TXLPFBW   0x18
 
#define BRTL8256REG_RXLPFBW   0x600
 
#define BRTL8258_TXLPFBW   0xc
 
#define BRTL8258_RXLPFBW   0xc00
 
#define BRTL8258_RSSILPFBW   0xc0
 
#define BBYTE0   0x1
 
#define BBYTE1   0x2
 
#define BBYTE2   0x4
 
#define BBYTE3   0x8
 
#define BWORD0   0x3
 
#define BWORD1   0xc
 
#define BWORD   0xf
 
#define MASKBYTE0   0xff
 
#define MASKBYTE1   0xff00
 
#define MASKBYTE2   0xff0000
 
#define MASKBYTE3   0xff000000
 
#define MASKHWORD   0xffff0000
 
#define MASKLWORD   0x0000ffff
 
#define MASKDWORD   0xffffffff
 
#define MASK12BITS   0xfff
 
#define MASKH4BITS   0xf0000000
 
#define MASKOFDM_D   0xffc00000
 
#define MASKCCK   0x3f3f3f3f
 
#define MASK4BITS   0x0f
 
#define MASK20BITS   0xfffff
 
#define RFREG_OFFSET_MASK   0xfffff
 
#define BENABLE   0x1
 
#define BDISABLE   0x0
 
#define LEFT_ANTENNA   0x0
 
#define RIGHT_ANTENNA   0x1
 
#define TCHECK_TXSTATUS   500
 
#define TUPDATE_RXCOUNTER   100
 

Macro Definition Documentation

#define _80M_SSC_DIS   BIT(7)

Definition at line 771 of file reg.h.

#define _80M_SSC_EN_HO   BIT(8)

Definition at line 772 of file reg.h.

#define _AGGLMT_MCS0 (   x)    ((x) & 0xF)

Definition at line 1030 of file reg.h.

#define _AGGLMT_MCS1 (   x)    (((x) & 0xF) << 4)

Definition at line 1031 of file reg.h.

#define _AGGLMT_MCS2 (   x)    (((x) & 0xF) << 8)

Definition at line 1032 of file reg.h.

#define _AGGLMT_MCS3 (   x)    (((x) & 0xF) << 12)

Definition at line 1033 of file reg.h.

#define _AGGLMT_MCS4 (   x)    (((x) & 0xF) << 16)

Definition at line 1034 of file reg.h.

#define _AGGLMT_MCS5 (   x)    (((x) & 0xF) << 20)

Definition at line 1035 of file reg.h.

#define _AGGLMT_MCS6 (   x)    (((x) & 0xF) << 24)

Definition at line 1036 of file reg.h.

#define _AGGLMT_MCS7 (   x)    (((x) & 0xF) << 28)

Definition at line 1037 of file reg.h.

#define _AIFS (   x)    (x)

Definition at line 1066 of file reg.h.

#define _BCNECW (   x)    ((((x) & 0xF)) << 8)

Definition at line 1071 of file reg.h.

#define _BCNIFS (   x)    ((x) & 0xFF)

Definition at line 1070 of file reg.h.

#define _DARF_RC1 (   x)    ((x) & 0x1F)

Definition at line 1042 of file reg.h.

#define _DARF_RC2 (   x)    (((x) & 0x1F) << 8)

Definition at line 1043 of file reg.h.

#define _DARF_RC3 (   x)    (((x) & 0x1F) << 16)

Definition at line 1044 of file reg.h.

#define _DARF_RC4 (   x)    (((x) & 0x1F) << 24)

Definition at line 1045 of file reg.h.

#define _DARF_RC5 (   x)    ((x) & 0x1F)

Definition at line 1046 of file reg.h.

#define _DARF_RC6 (   x)    (((x) & 0x1F) << 8)

Definition at line 1047 of file reg.h.

#define _DARF_RC7 (   x)    (((x) & 0x1F) << 16)

Definition at line 1048 of file reg.h.

#define _DARF_RC8 (   x)    (((x) & 0x1F) << 24)

Definition at line 1049 of file reg.h.

#define _ECW_MAX_MIN (   x)    ((x) << 8)

Definition at line 1067 of file reg.h.

#define _HPQ (   x)    ((x) & 0xFF)

Definition at line 993 of file reg.h.

#define _INIRTSMCS_SEL (   x)    ((x) & 0x3F)

Definition at line 1013 of file reg.h.

#define _LBMODE (   x)    (((x) & 0xF) << 24)

Definition at line 931 of file reg.h.

#define _LDA15_VOADJ (   x)    (((x) & 0x7) << 4)

Definition at line 803 of file reg.h.

#define _LDV12_VADJ (   x)    (((x) & 0xF) << 4)

Definition at line 809 of file reg.h.

#define _LLT_INIT_ADDR (   x)    (((x) & 0xFF) << 8)

Definition at line 985 of file reg.h.

#define _LLT_INIT_DATA (   x)    ((x) & 0xFF)

Definition at line 984 of file reg.h.

#define _LLT_NO_ACTIVE   0x0

Definition at line 980 of file reg.h.

#define _LLT_OP (   x)    (((x) & 0x3) << 30)

Definition at line 986 of file reg.h.

#define _LLT_OP_VALUE (   x)    (((x) >> 30) & 0x3)

Definition at line 987 of file reg.h.

#define _LLT_READ_ACCESS   0x2

Definition at line 982 of file reg.h.

#define _LLT_WRITE_ACCESS   0x1

Definition at line 981 of file reg.h.

#define _LPQ (   x)    (((x) & 0xFF) << 8)

Definition at line 994 of file reg.h.

#define _LRL (   x)    ((x) & 0x3F)

Definition at line 1073 of file reg.h.

#define _MIN_SPACE (   x)    ((x) & 0x7)

Definition at line 1150 of file reg.h.

#define _NETTYPE (   x)    (((x) & 0x3) << 16)

Definition at line 924 of file reg.h.

#define _NPQ (   x)    ((x) & 0xFF)

Definition at line 996 of file reg.h.

#define _PSRX (   x)    (x)

Definition at line 943 of file reg.h.

#define _PSRX_MASK   0xF

Definition at line 941 of file reg.h.

#define _PSTX (   x)    ((x) << 4)

Definition at line 944 of file reg.h.

#define _PSTX_MASK   0xF0

Definition at line 942 of file reg.h.

#define _PUBQ (   x)    (((x) & 0xFF) << 16)

Definition at line 995 of file reg.h.

#define _RARF_RC1 (   x)    ((x) & 0x1F)

Definition at line 1051 of file reg.h.

#define _RARF_RC2 (   x)    (((x) & 0x1F) << 8)

Definition at line 1052 of file reg.h.

#define _RARF_RC3 (   x)    (((x) & 0x1F) << 16)

Definition at line 1053 of file reg.h.

#define _RARF_RC4 (   x)    (((x) & 0x1F) << 24)

Definition at line 1054 of file reg.h.

#define _RARF_RC5 (   x)    ((x) & 0x1F)

Definition at line 1055 of file reg.h.

#define _RARF_RC6 (   x)    (((x) & 0x1F) << 8)

Definition at line 1056 of file reg.h.

#define _RARF_RC7 (   x)    (((x) & 0x1F) << 16)

Definition at line 1057 of file reg.h.

#define _RARF_RC8 (   x)    (((x) & 0x1F) << 24)

Definition at line 1058 of file reg.h.

#define _RRSC_BITMAP (   x)    ((x) & 0xFFFFF)

Definition at line 1020 of file reg.h.

#define _RRSR_RSC (   x)    (((x) & 0x3) << 21)

Definition at line 1022 of file reg.h.

#define _RXERR_RPT_SEL (   type)    ((type) << 28)

Definition at line 1170 of file reg.h.

#define _SHORT_GI_PADDING (   x)    (((x) & 0x1F) << 3)

Definition at line 1151 of file reg.h.

#define _SIFS_CCK_CTX (   x)    ((x) & 0xFF)

Definition at line 1076 of file reg.h.

#define _SIFS_CCK_TRX (   x)    (((x) & 0xFF) << 8)

Definition at line 1077 of file reg.h.

#define _SIFS_OFDM_CTX (   x)    ((x) & 0xFF)

Definition at line 1079 of file reg.h.

#define _SIFS_OFDM_TRX (   x)    (((x) & 0xFF) << 8)

Definition at line 1080 of file reg.h.

#define _SPEC_SIFS_CCK (   x)    ((x) & 0xFF)

Definition at line 1015 of file reg.h.

#define _SPEC_SIFS_OFDM (   x)    (((x) & 0xFF) << 8)

Definition at line 1016 of file reg.h.

#define _SRL (   x)    (((x) & 0x3F) << 8)

Definition at line 1074 of file reg.h.

#define _TBTT_PROHIBIT_HOLD (   x)    (((x) & 0xFF) << 8)

Definition at line 1082 of file reg.h.

#define _TXDMA_BEQ_MAP (   x)    (((x)&0x3) << 8)

Definition at line 972 of file reg.h.

#define _TXDMA_BKQ_MAP (   x)    (((x)&0x3) << 10)

Definition at line 971 of file reg.h.

#define _TXDMA_HIQ_MAP (   x)    (((x)&0x3) << 14)

Definition at line 969 of file reg.h.

#define _TXDMA_MGQ_MAP (   x)    (((x)&0x3) << 12)

Definition at line 970 of file reg.h.

#define _TXDMA_VIQ_MAP (   x)    (((x)&0x3) << 6)

Definition at line 973 of file reg.h.

#define _TXDMA_VOQ_MAP (   x)    (((x)&0x3) << 4)

Definition at line 974 of file reg.h.

#define _TXOP_LIMIT (   x)    ((x) << 16)

Definition at line 1068 of file reg.h.

#define _XTAL_AFE_DRV (   x)    (((x) & 0x3) << 12)

Definition at line 818 of file reg.h.

#define _XTAL_BOSC (   x)    (((x) & 0x3) << 2)

Definition at line 813 of file reg.h.

#define _XTAL_BT_DRV (   x)    (((x) & 0x3) << 21)

Definition at line 824 of file reg.h.

#define _XTAL_CADJ (   x)    (((x) & 0xF) << 4)

Definition at line 814 of file reg.h.

#define _XTAL_DIG_DRV (   x)    (((x) & 0x3) << 18)

Definition at line 822 of file reg.h.

#define _XTAL_GPIO (   x)    (((x) & 0x7) << 23)

Definition at line 825 of file reg.h.

#define _XTAL_RF_DRV (   x)    (((x) & 0x3) << 15)

Definition at line 820 of file reg.h.

#define _XTAL_USB_DRV (   x)    (((x) & 0x3) << 9)

Definition at line 816 of file reg.h.

#define AAP   BIT(0)

Definition at line 1124 of file reg.h.

#define AB   BIT(3)

Definition at line 1127 of file reg.h.

#define AC_PARAM_AIFS_OFFSET   0

Definition at line 1064 of file reg.h.

#define AC_PARAM_ECW_MAX_OFFSET   12

Definition at line 1062 of file reg.h.

#define AC_PARAM_ECW_MIN_OFFSET   8

Definition at line 1063 of file reg.h.

#define AC_PARAM_TXOP_LIMIT_OFFSET   16

Definition at line 1061 of file reg.h.

#define AC_PARAM_TXOP_OFFSET   16

Definition at line 1060 of file reg.h.

#define ACF   BIT(12)

Definition at line 1136 of file reg.h.

#define ACLK_VLD   BIT(1)

Definition at line 888 of file reg.h.

#define AcmHw_BeqEn   BIT(1)

Definition at line 1099 of file reg.h.

#define AcmHw_BeqStatus   BIT(4)

Definition at line 1102 of file reg.h.

#define AcmHw_HwEn   BIT(0)

Definition at line 1098 of file reg.h.

#define AcmHw_ViqEn   BIT(2)

Definition at line 1100 of file reg.h.

#define AcmHw_ViqStatus   BIT(5)

Definition at line 1103 of file reg.h.

#define AcmHw_VoqEn   BIT(3)

Definition at line 1101 of file reg.h.

#define AcmHw_VoqStatus   BIT(6)

Definition at line 1104 of file reg.h.

#define ACRC   BIT(8)

Definition at line 1120 of file reg.h.

#define ACRC32   BIT(8)

Definition at line 1133 of file reg.h.

#define ADD3   BIT(4)

Definition at line 1128 of file reg.h.

#define ADF   BIT(11)

Definition at line 1135 of file reg.h.

#define AFE_BGEN   BIT(0)

Definition at line 782 of file reg.h.

#define AFE_MBEN   BIT(1)

Definition at line 783 of file reg.h.

#define AFSM_HSUS   BIT(11)

Definition at line 749 of file reg.h.

#define AFSM_PCIE   BIT(12)

Definition at line 750 of file reg.h.

#define AICV   BIT(9)

Definition at line 1134 of file reg.h.

#define ALD_EN   BIT(18)

Definition at line 851 of file reg.h.

#define AM   BIT(2)

Definition at line 1126 of file reg.h.

#define AMF   BIT(13)

Definition at line 1137 of file reg.h.

#define ANA8M   BIT(1)

Definition at line 768 of file reg.h.

#define ANAD16V_EN   BIT(0)

Definition at line 767 of file reg.h.

#define APDM_HOST   BIT(14)

Definition at line 752 of file reg.h.

#define APDM_HPDN   BIT(15)

Definition at line 753 of file reg.h.

#define APDM_MAC   BIT(13)

Definition at line 751 of file reg.h.

#define APFM_OFF   BIT(9)

Definition at line 747 of file reg.h.

#define APFM_ONMAC   BIT(8)

Definition at line 746 of file reg.h.

#define APFM_RSM   BIT(10)

Definition at line 748 of file reg.h.

#define APLL_1MEN   BIT(24)

Definition at line 849 of file reg.h.

#define APLL_320_EN   BIT(1)

Definition at line 833 of file reg.h.

#define APLL_320EN   BIT(14)

Definition at line 847 of file reg.h.

#define APLL_80EN   BIT(15)

Definition at line 848 of file reg.h.

#define APLL_EDGE_SEL   BIT(3)

Definition at line 835 of file reg.h.

#define APLL_EN   BIT(0)

Definition at line 832 of file reg.h.

#define APLL_FREF_SEL   BIT(2)

Definition at line 834 of file reg.h.

#define APLL_LPFEN   BIT(5)

Definition at line 837 of file reg.h.

#define APLL_REF_CLK_13MHZ   0x1

Definition at line 839 of file reg.h.

#define APLL_REF_CLK_19_2MHZ   0x2

Definition at line 840 of file reg.h.

#define APLL_REF_CLK_20MHZ   0x3

Definition at line 841 of file reg.h.

#define APLL_REF_CLK_25MHZ   0x4

Definition at line 842 of file reg.h.

#define APLL_REF_CLK_26MHZ   0x5

Definition at line 843 of file reg.h.

#define APLL_REF_CLK_38_4MHZ   0x6

Definition at line 844 of file reg.h.

#define APLL_REF_CLK_40MHZ   0x7

Definition at line 845 of file reg.h.

#define APLL_WDOGB   BIT(4)

Definition at line 836 of file reg.h.

#define APM   BIT(1)

Definition at line 1125 of file reg.h.

#define APP_BASSN   BIT(27)

Definition at line 1144 of file reg.h.

#define APP_FCS   BIT(31)

Definition at line 1148 of file reg.h.

#define APP_ICV   BIT(29)

Definition at line 1146 of file reg.h.

#define APP_MIC   BIT(30)

Definition at line 1147 of file reg.h.

#define APP_PHYSTS   BIT(28)

Definition at line 1145 of file reg.h.

#define APSDOFF   BIT(6)

Definition at line 1106 of file reg.h.

#define APSDOFF_STATUS   BIT(7)

Definition at line 1107 of file reg.h.

#define APWRMGT   BIT(5)

Definition at line 1129 of file reg.h.

#define AUTOLOAD_EEPROM   (CMDEEPROM_EN|CMDEEPROM_SEL)

Definition at line 363 of file reg.h.

#define AUTOLOAD_EFUSE   CMDEEPROM_EN

Definition at line 364 of file reg.h.

#define B2GPAPEPOLARITY   0x80000000

Definition at line 1589 of file reg.h.

#define B3WIREADDREAALENGTH   0x400

Definition at line 1585 of file reg.h.

#define B3WIREDATALENGTH   0x800

Definition at line 1584 of file reg.h.

#define B3WIRERFPOWERDOWN   0x1

Definition at line 1587 of file reg.h.

#define B40MDCLKPOWERUP   0x8000

Definition at line 1642 of file reg.h.

#define B5GPAPEPOLARITY   0x40000000

Definition at line 1588 of file reg.h.

#define B80MCLKDELAY   0x18000000

Definition at line 1647 of file reg.h.

#define BAD110P_CURRENT   0x3800000

Definition at line 1660 of file reg.h.

#define BAD11NPUT_RANGE   0x700000

Definition at line 1659 of file reg.h.

#define BAD11POWERUP_ATRX   0x100

Definition at line 1675 of file reg.h.

#define BAD11POWERUP_ATTX   0x1

Definition at line 1673 of file reg.h.

#define BAD11SH_GAIN   0xc0000

Definition at line 1658 of file reg.h.

#define BAD7POWERUP   0x200

Definition at line 1639 of file reg.h.

#define BADC_BACKOFF   0x3000

Definition at line 1792 of file reg.h.

#define BADCLKPHASE   0x4000000

Definition at line 1646 of file reg.h.

#define BADV_TIME_CTRL   0x800

Definition at line 2017 of file reg.h.

#define BADV_UPD_CFO   0x100

Definition at line 2016 of file reg.h.

#define BADV_UPD_EQZ   0x100000

Definition at line 2025 of file reg.h.

#define BAFE_LOOPBACK   0x10000000

Definition at line 1663 of file reg.h.

#define BAFEWATCHDOGENABLE   0x20000000

Definition at line 1648 of file reg.h.

#define BAGCADDRESS   0x3f

Definition at line 1577 of file reg.h.

#define BAGCRXCODE   0x300000

Definition at line 1582 of file reg.h.

#define BAGCTXCODE   0xc00000

Definition at line 1581 of file reg.h.

#define BANT_HT1   0x1000

Definition at line 1696 of file reg.h.

#define BANT_HT1S1   0x100000

Definition at line 1698 of file reg.h.

#define BANT_HT2   0x10000

Definition at line 1697 of file reg.h.

#define BANT_NONHT   0x100

Definition at line 1695 of file reg.h.

#define BANT_NONHTS1   0x1000000

Definition at line 1699 of file reg.h.

#define BANTENNA_MAPPING   0x10

Definition at line 1937 of file reg.h.

#define BANTL   0x10

Definition at line 1694 of file reg.h.

#define BB_READ_EN   BIT(31)

Definition at line 991 of file reg.h.

#define BB_WRITE_EN   BIT(30)

Definition at line 990 of file reg.h.

#define BB_WRITE_READ_MASK   (BIT(31) | BIT(30))

Definition at line 989 of file reg.h.

#define BBADDR   UNUSED_REGISTER

Definition at line 352 of file reg.h.

#define BBANDGAP_MBIAS_POWERUP   0x10000

Definition at line 1657 of file reg.h.

#define BBANDSELECT   0x1

Definition at line 1608 of file reg.h.

#define BBBCCKSTART   0x0000000f

Definition at line 1567 of file reg.h.

#define BBBRESETB   0x100

Definition at line 1502 of file reg.h.

#define BBBSTART   0x000000f0

Definition at line 1566 of file reg.h.

#define BBINI_RDY   BIT(4)

Definition at line 882 of file reg.h.

#define BBW_OPTION   0x4000000

Definition at line 1815 of file reg.h.

#define BBW_SEARCH_L   0x30000

Definition at line 1811 of file reg.h.

#define BBW_TH   0x700000

Definition at line 1813 of file reg.h.

#define BBYTE0   0x1

Definition at line 2058 of file reg.h.

#define BBYTE1   0x2

Definition at line 2059 of file reg.h.

#define BBYTE2   0x4

Definition at line 2060 of file reg.h.

#define BBYTE3   0x8

Definition at line 2061 of file reg.h.

#define BCC_POWER_DB   0xffff0000

Definition at line 1966 of file reg.h.

#define BCCA_DROPOPTION   0x20000

Definition at line 1851 of file reg.h.

#define BCCA_DROPTHRES   0xfff00000

Definition at line 1852 of file reg.h.

#define BCCAMASK   0x000000f0

Definition at line 1571 of file reg.h.

#define BCCK_ANTDIVERSITY   0x8000

Definition at line 1708 of file reg.h.

#define BCCK_ANTENNA_POLARITY   0x2000

Definition at line 1742 of file reg.h.

#define BCCK_BBMODE   0x3

Definition at line 1701 of file reg.h.

#define BCCK_BIST_MODE   0x80000000

Definition at line 1720 of file reg.h.

#define BCCK_CARRIER_RECOVERY   0x4000

Definition at line 1709 of file reg.h.

#define BCCK_CCA_COUNT   0x080000

Definition at line 1718 of file reg.h.

#define BCCK_CCA_MODE   0xc000

Definition at line 1727 of file reg.h.

#define BCCK_CCAMASK   0x40000000

Definition at line 1721 of file reg.h.

#define BCCK_CH_ESTSTART   0x300000

Definition at line 1717 of file reg.h.

#define BCCK_CORGBIT_SEL   0x300000

Definition at line 1730 of file reg.h.

#define BCCK_CS_LIM   0x070000

Definition at line 1719 of file reg.h.

#define BCCK_CS_RATIO   0xc00000

Definition at line 1729 of file reg.h.

#define BCCK_DAC_DEBUG   0x0f000000

Definition at line 1758 of file reg.h.

#define BCCK_DCCANCEL   0x0800

Definition at line 1711 of file reg.h.

#define BCCK_DEBUGPORT   0xff0000

Definition at line 1757 of file reg.h.

#define BCCK_DEFAULT_RXPATH   0xc000000

Definition at line 1777 of file reg.h.

#define BCCK_EQUALIZER   0x0100

Definition at line 1714 of file reg.h.

#define BCCK_FACOUNTER_FREEZE   0x4000

Definition at line 1775 of file reg.h.

#define BCCK_FALSEALARM_ENABLE   0x8000

Definition at line 1759 of file reg.h.

#define BCCK_FALSEALARM_READ   0x4000

Definition at line 1760 of file reg.h.

#define BCCK_FALSECS_LIM   0x3f00

Definition at line 1728 of file reg.h.

#define BCCK_FAST_FALSECCA   0x400000

Definition at line 1716 of file reg.h.

#define BCCK_FIXED_RXAGC   0x8000

Definition at line 1741 of file reg.h.

#define BCCK_ISICANCEL   0x0400

Definition at line 1712 of file reg.h.

#define BCCK_LNA_POLARITY   0x800000

Definition at line 1735 of file reg.h.

#define BCCK_MATCH_FILTER   0x0200

Definition at line 1713 of file reg.h.

#define BCCK_NEWCCA   0x80000000

Definition at line 1732 of file reg.h.

#define BCCK_OPTION_RXPATH   0x3000000

Definition at line 1778 of file reg.h.

#define BCCK_PD_LIM   0x0f0000

Definition at line 1731 of file reg.h.

#define BCCK_PREAMBLE_DETECT   0x800000

Definition at line 1715 of file reg.h.

#define BCCK_RF_EXTEND   0x20000000

Definition at line 1737 of file reg.h.

#define BCCK_RX1ST_BAIN   0x7f0000

Definition at line 1736 of file reg.h.

#define BCCK_RX_ADC_PHASE   0x20000000

Definition at line 1723 of file reg.h.

#define BCCK_RXAGC_REPORT   0xfe

Definition at line 1762 of file reg.h.

#define BCCK_RXAGC_REPORTTYPE   0x0300

Definition at line 1744 of file reg.h.

#define BCCK_RXAGC_SATCOUNT   0xe0

Definition at line 1739 of file reg.h.

#define BCCK_RXAGC_SATLEVEL   0x1f000000

Definition at line 1738 of file reg.h.

#define BCCK_RXDAGC_EN   0x80000000

Definition at line 1745 of file reg.h.

#define BCCK_RXDAGC_PERIOD   0x20000000

Definition at line 1746 of file reg.h.

#define BCCK_RXDAGC_SATLEVEL   0x1f000000

Definition at line 1747 of file reg.h.

#define BCCK_RXDC_OFFSET   0xf

Definition at line 1726 of file reg.h.

#define BCCK_RXFA_COUNTER_LOWER   0xff

Definition at line 1770 of file reg.h.

#define BCCK_RXFA_COUNTER_UPPER   0xff000000

Definition at line 1771 of file reg.h.

#define BCCK_RXFALSEALARM_ENABLE   0x8000

Definition at line 1774 of file reg.h.

#define BCCK_RXHP_OF_IG   0x8000

Definition at line 1733 of file reg.h.

#define BCCK_RXHPAGC_FINAL   0x1c00

Definition at line 1773 of file reg.h.

#define BCCK_RXHPAGC_START   0xe000

Definition at line 1772 of file reg.h.

#define BCCK_RXIG   0x7f00

Definition at line 1734 of file reg.h.

#define BCCK_RXPOWERSAVING   0x40

Definition at line 1703 of file reg.h.

#define BCCK_RXREPORT_ANTSEL   0x80000000

Definition at line 1763 of file reg.h.

#define BCCK_RXREPORT_LOCKEDBIT   0x08000000

Definition at line 1767 of file reg.h.

#define BCCK_RXREPORT_MFOFF   0x40000000

Definition at line 1764 of file reg.h.

#define BCCK_RXREPORT_PKTLOSS   0x10000000

Definition at line 1766 of file reg.h.

#define BCCK_RXREPORT_RATEERROR   0x04000000

Definition at line 1768 of file reg.h.

#define BCCK_RXREPORT_RXRATE   0x03000000

Definition at line 1769 of file reg.h.

#define BCCK_RXREPORT_SQLOSS   0x20000000

Definition at line 1765 of file reg.h.

#define BCCK_SCRAMBLE   0x8

Definition at line 1707 of file reg.h.

#define BCCK_SIDEBAND   0x10

Definition at line 1705 of file reg.h.

#define BCCK_TIMING_RECOVERY   0x800000

Definition at line 1748 of file reg.h.

#define BCCK_TRSSI   0x7f

Definition at line 1761 of file reg.h.

#define BCCK_TX_DAC_PHASE   0x4

Definition at line 1722 of file reg.h.

#define BCCK_TXC0   0x3f0000

Definition at line 1749 of file reg.h.

#define BCCK_TXC1   0x3f000000

Definition at line 1750 of file reg.h.

#define BCCK_TXC2   0x3f

Definition at line 1751 of file reg.h.

#define BCCK_TXC3   0x3f00

Definition at line 1752 of file reg.h.

#define BCCK_TXC4   0x3f0000

Definition at line 1753 of file reg.h.

#define BCCK_TXC5   0x3f000000

Definition at line 1754 of file reg.h.

#define BCCK_TXC6   0x3f

Definition at line 1755 of file reg.h.

#define BCCK_TXC7   0x3f00

Definition at line 1756 of file reg.h.

#define BCCK_TXDC_OFFSET   0xf0

Definition at line 1725 of file reg.h.

#define BCCK_TXFILTER_TYPE   0x0c00

Definition at line 1743 of file reg.h.

#define BCCK_TXON   0x1

Definition at line 1690 of file reg.h.

#define BCCK_TXPATH_SEL   0x10000000

Definition at line 1776 of file reg.h.

#define BCCK_TXPOWERSAVING   0x80

Definition at line 1702 of file reg.h.

#define BCCK_TXRATE   0x3000

Definition at line 1710 of file reg.h.

#define BCCKEN   0x1000000

Definition at line 1552 of file reg.h.

#define BCCKLENGTHEXT   0x8000

Definition at line 1541 of file reg.h.

#define BCCKR_CP_MODE   0x0100

Definition at line 1724 of file reg.h.

#define BCCKRX_AGC_FORMAT   0x200

Definition at line 1677 of file reg.h.

#define BCCKRXPHASE   0x4

Definition at line 1624 of file reg.h.

#define bCCKRxRFSettle   0x1f

Definition at line 1740 of file reg.h.

#define BCCKSAMPLERATE   0x8

Definition at line 1632 of file reg.h.

#define BCCKTXCRC16   0xffff

Definition at line 1543 of file reg.h.

#define BCCKTXLENGHT   0xffff0000

Definition at line 1542 of file reg.h.

#define BCCKTXPREAMBLE   0x1

Definition at line 1537 of file reg.h.

#define BCCKTXSC   0x30

Definition at line 1551 of file reg.h.

#define BCCKTXSERVICE   0xff00

Definition at line 1540 of file reg.h.

#define BCCKTXSFD   0xffff0000

Definition at line 1538 of file reg.h.

#define BCCKTXSIG   0xff

Definition at line 1539 of file reg.h.

#define BCCKTXSTART   0x8

Definition at line 1505 of file reg.h.

#define BCCKTXSTATUS   0x1

Definition at line 1544 of file reg.h.

#define BCFO_ANTSUM_ID   0x200

Definition at line 1939 of file reg.h.

#define BCFO_REPORT_GET   0x4000000

Definition at line 1941 of file reg.h.

#define BCFOACC   0x2

Definition at line 1834 of file reg.h.

#define BCFOANTSUM   0x1

Definition at line 1833 of file reg.h.

#define BCFOEN   0x10000

Definition at line 1946 of file reg.h.

#define BCFOLOOPBACK   0x70

Definition at line 1836 of file reg.h.

#define BCFOSTARTOFFSET   0xc

Definition at line 1835 of file reg.h.

#define BCFOSUMWEIGHT   0x80

Definition at line 1837 of file reg.h.

#define BCFOVALUE   0xfff00000

Definition at line 1947 of file reg.h.

#define BCHSMOOTH   0x4

Definition at line 2005 of file reg.h.

#define BCHSMOOTH_CFG1   0x38

Definition at line 2006 of file reg.h.

#define BCHSMOOTH_CFG2   0x1c0

Definition at line 2007 of file reg.h.

#define BCHSMOOTH_CFG3   0xe00

Definition at line 2008 of file reg.h.

#define BCHSMOOTH_CFG4   0x7000

Definition at line 2009 of file reg.h.

#define BCN_HEAD (   x)    (((x) & 0xFF) << 8)

Definition at line 1003 of file reg.h.

#define BCN_HEAD_MASK   0xFF00

Definition at line 1004 of file reg.h.

#define BCN_VALID   BIT(16)

Definition at line 1002 of file reg.h.

#define BCOM_CH_CFO   0x40000

Definition at line 2023 of file reg.h.

#define BCONTXHSSI   0x400

Definition at line 1575 of file reg.h.

#define BCOUNTER_CCA   0xffff

Definition at line 1950 of file reg.h.

#define BCOUNTER_CRC8FAIL   0xffff0000

Definition at line 1953 of file reg.h.

#define BCOUNTER_FASTSYNC   0xffff

Definition at line 1955 of file reg.h.

#define BCOUNTER_MCSNOSUPPORT   0xffff

Definition at line 1954 of file reg.h.

#define BCOUNTER_PARITYFAIL   0xffff0000

Definition at line 1951 of file reg.h.

#define BCOUNTER_RATEILLEGAL   0xffff

Definition at line 1952 of file reg.h.

#define BCOUNTERRESET   0x10000

Definition at line 1527 of file reg.h.

#define BCRC32DEBUG   0x100

Definition at line 1506 of file reg.h.

#define BCSI1ST   0xff

Definition at line 1985 of file reg.h.

#define BCSI2ND   0xff00

Definition at line 1986 of file reg.h.

#define BCSI_ESTI_MODE   0x80000

Definition at line 2024 of file reg.h.

#define BCSI_SCHEME   0x100000

Definition at line 2002 of file reg.h.

#define BD_HCI_SEL   BIT(26)

Definition at line 904 of file reg.h.

#define BD_MAC1   BIT(10)

Definition at line 896 of file reg.h.

#define BD_MAC2   BIT(9)

Definition at line 895 of file reg.h.

#define BD_PKG_SEL   BIT(25)

Definition at line 903 of file reg.h.

#define BDA10_REVERSE   0x800

Definition at line 1665 of file reg.h.

#define BDA10_SWING   0x7e0

Definition at line 1664 of file reg.h.

#define BDA10POWERUP   0x20

Definition at line 1638 of file reg.h.

#define BDA10PS_ATRX   0x1000

Definition at line 1676 of file reg.h.

#define BDA10PS_ATTX   0x10

Definition at line 1674 of file reg.h.

#define BDA6DEBUGMODE   0x20000

Definition at line 1643 of file reg.h.

#define BDA6POWERUP   0x2000

Definition at line 1640 of file reg.h.

#define BDA6SWING   0x380000

Definition at line 1644 of file reg.h.

#define BDA7_GAIN   0x38000

Definition at line 1668 of file reg.h.

#define BDA7CURRENT   0xc00000

Definition at line 1671 of file reg.h.

#define BDA7INPUT_CM_MODE   0x380000

Definition at line 1670 of file reg.h.

#define BDA7INPUT_RANGE   0x6000

Definition at line 1667 of file reg.h.

#define BDA7OUTPUT_CM_MODE   0x40000

Definition at line 1669 of file reg.h.

#define BDA_CLK_SOURCE   0x1000

Definition at line 1666 of file reg.h.

#define BDAFORMAT   0x40000

Definition at line 1928 of file reg.h.

#define BDAGCENABLE   0x10000

Definition at line 1838 of file reg.h.

#define BDC_DC_NOTCH   0x60000

Definition at line 1803 of file reg.h.

#define BDC_SLOPE_CHECK   0x80

Definition at line 1821 of file reg.h.

#define BDEBUG_ITEM   0xff

Definition at line 1693 of file reg.h.

#define BDEBUG_PAGE   0xfff

Definition at line 1692 of file reg.h.

#define BDFIR_BACKOFF   0xc000

Definition at line 1793 of file reg.h.

#define BDFSCNT0   0xff

Definition at line 1923 of file reg.h.

#define BDFSCNT1   0xff00

Definition at line 1924 of file reg.h.

#define BDFSFLAG   0xf0000

Definition at line 1925 of file reg.h.

#define BDISABLE   0x0

Definition at line 2083 of file reg.h.

#define BDPLLPOWERUP   0x10

Definition at line 1637 of file reg.h.

#define BED_TH2   0x3800000

Definition at line 1814 of file reg.h.

#define BEDCCA_H   0xf

Definition at line 1853 of file reg.h.

#define BEDCCA_L   0xf0

Definition at line 1854 of file reg.h.

#define BENABLE   0x1

Definition at line 2082 of file reg.h.

#define BEXT_LNA_GAIN   0x7c00

Definition at line 1934 of file reg.h.

#define BEXTSIGCLKENABLE   0x800

Definition at line 1656 of file reg.h.

#define BFC   0x6000

Definition at line 2019 of file reg.h.

#define BFGUARD_COUNTER_DC_L   0xe00

Definition at line 1822 of file reg.h.

#define BFRAME_DC_LENGTH   0xe000000

Definition at line 1825 of file reg.h.

#define BFRAME_GI2_TH   0x38

Definition at line 1828 of file reg.h.

#define BFRAME_TH   0x1c

Definition at line 1819 of file reg.h.

#define BFRAME_TH_2   0x7

Definition at line 1827 of file reg.h.

#define BFRAME_WEIGHT_SHORT   0x7000

Definition at line 1823 of file reg.h.

#define BFS_OPTION   0x60

Definition at line 1820 of file reg.h.

#define BGI2_SYNC_EN   0x40

Definition at line 1829 of file reg.h.

#define BGI_TH   0xc

Definition at line 1782 of file reg.h.

#define BGLOBALRESETB   0x200

Definition at line 1503 of file reg.h.

#define BHSSI_R2TDELAY   0xf8000000

Definition at line 1573 of file reg.h.

#define BHSSI_T2RDELAY   0xf80000

Definition at line 1574 of file reg.h.

#define BHT_DETECT   0x100

Definition at line 1945 of file reg.h.

#define BHTSIG1_BANDWIDTH   0x80

Definition at line 1618 of file reg.h.

#define BHTSIG1_HTLENGTH   0xffff

Definition at line 1619 of file reg.h.

#define BHTSIG1_MCS   0x7f

Definition at line 1617 of file reg.h.

#define BHTSIG2_ADVCODING   0x40

Definition at line 1614 of file reg.h.

#define BHTSIG2_AGGREATON   0x08

Definition at line 1612 of file reg.h.

#define BHTSIG2_CRC8   0x3fc

Definition at line 1616 of file reg.h.

#define BHTSIG2_GI   0x80

Definition at line 1609 of file reg.h.

#define BHTSIG2_NUMOFHTLTF   0x300

Definition at line 1615 of file reg.h.

#define BHTSIG2_SMOOTHING   0x01

Definition at line 1610 of file reg.h.

#define BHTSIG2_SOUNDING   0x02

Definition at line 1611 of file reg.h.

#define BHTSIG2_STBC   0x30

Definition at line 1613 of file reg.h.

#define BIFMF_WIN_L   0x800

Definition at line 1808 of file reg.h.

#define BIGFROMCCK   0x200

Definition at line 1576 of file reg.h.

#define BINTDIFCLKENABLE   0x400

Definition at line 1655 of file reg.h.

#define BINTF_WIN_LEN_CFG   0x30

Definition at line 1974 of file reg.h.

#define BIQPATH_CONTROL   0xc00

Definition at line 1680 of file reg.h.

#define BJAPANMODE   0x2

Definition at line 1550 of file reg.h.

#define BLAMBDA_ED   0x300

Definition at line 1855 of file reg.h.

#define BLK_DESC_NUM_MASK   0xF

Definition at line 1007 of file reg.h.

#define BLK_DESC_NUM_SHIFT   4

Definition at line 1006 of file reg.h.

#define BLONGCFO   0x7ff

Definition at line 1959 of file reg.h.

#define BLONGCFOF_LENGTH   11

Definition at line 1961 of file reg.h.

#define BLONGCFOT_LENGTH   11

Definition at line 1960 of file reg.h.

#define BLOOP_FIT_TYPE   0x1

Definition at line 2013 of file reg.h.

#define BLPATH_LOOPBACK   0x4000000

Definition at line 1661 of file reg.h.

#define BLSIG_LENGTH   0x1fffe

Definition at line 1622 of file reg.h.

#define BLSIG_PARITY   0x20

Definition at line 1623 of file reg.h.

#define BLSIG_RATE   0xf

Definition at line 1620 of file reg.h.

#define BLSIG_RESERVED   0x10

Definition at line 1621 of file reg.h.

#define BLSSIREADADDRESS   0x7f800000

Definition at line 1626 of file reg.h.

#define BLSSIREADBACKDATA   0xfffff

Definition at line 1629 of file reg.h.

#define BLSSIREADEDGE   0x80000000

Definition at line 1627 of file reg.h.

#define BLSSIREADOKFLAG   0x1000

Definition at line 1631 of file reg.h.

#define BM_DATA_EN   BIT(17)

Definition at line 1140 of file reg.h.

#define BMF_WEIGHT_SUM   0x300000

Definition at line 1926 of file reg.h.

#define BMF_WIN_L   0xe000

Definition at line 1810 of file reg.h.

#define BMINIDX_TH   0x7f000000

Definition at line 1927 of file reg.h.

#define BMOISE_PWDB   0xffff

Definition at line 1967 of file reg.h.

#define BMRCMODE   0x800000

Definition at line 2010 of file reg.h.

#define BNB_INTF_DET_ON   0x1

Definition at line 1973 of file reg.h.

#define BNB_INTF_TH_CFG   0x1c0

Definition at line 1975 of file reg.h.

#define BNOISE_EN_PWDB   0xffff

Definition at line 1965 of file reg.h.

#define BNOISE_LVL_TOP_SET   0x3

Definition at line 2004 of file reg.h.

#define BNSS   0x20

Definition at line 1938 of file reg.h.

#define BNUM_OFSTF   0x3

Definition at line 1780 of file reg.h.

#define BNUMOFCCKTX   0xffff0000

Definition at line 1529 of file reg.h.

#define BNUMOFOFDMTX   0xffff

Definition at line 1528 of file reg.h.

#define BOFDM_CONTINUE_TX   0x10000000

Definition at line 1942 of file reg.h.

#define BOFDM_SINGLE_CARRIER   0x20000000

Definition at line 1943 of file reg.h.

#define BOFDM_SINGLE_TONE   0x40000000

Definition at line 1944 of file reg.h.

#define BOFDM_TXON   0x2

Definition at line 1691 of file reg.h.

#define BOFDM_TXSC   0x30000000

Definition at line 1689 of file reg.h.

#define BOFDMEN   0x2000000

Definition at line 1553 of file reg.h.

#define BOFDMRXADCPHASE   0x10000

Definition at line 1555 of file reg.h.

#define BOFDMSERVICE   0xffff0000

Definition at line 1531 of file reg.h.

#define BOFDMTXDACPHASE   0x40000

Definition at line 1556 of file reg.h.

#define BOFDMTXLENGTH   0x1ffe0

Definition at line 1511 of file reg.h.

#define BOFDMTXPARITY   0x20000

Definition at line 1512 of file reg.h.

#define BOFDMTXRATE   0xf

Definition at line 1509 of file reg.h.

#define BOFDMTXRESERVED   0x10

Definition at line 1510 of file reg.h.

#define BOFDMTXSTART   0x4

Definition at line 1504 of file reg.h.

#define BOFDMTXSTATUS   0x2

Definition at line 1545 of file reg.h.

#define BOOT_FROM_EEPROM   BIT(4)

Definition at line 779 of file reg.h.

#define BPAEND   0xf

Definition at line 1568 of file reg.h.

#define BPASTART   0xf0000000

Definition at line 1563 of file reg.h.

#define BPD_OPTION   0x1000

Definition at line 1809 of file reg.h.

#define BPD_TH   0xf

Definition at line 1805 of file reg.h.

#define BPD_TH_OPT2   0xc000

Definition at line 1806 of file reg.h.

#define BPHCMP_ENABLE   0x10000

Definition at line 2021 of file reg.h.

#define BPHY_COUNTER_RESET   0x8000000

Definition at line 1940 of file reg.h.

#define BPLLPOWERUP   0x8

Definition at line 1636 of file reg.h.

#define BPMACLOOPBACK   0x10

Definition at line 1507 of file reg.h.

#define BPOWER_THRES   0x300

Definition at line 1871 of file reg.h.

#define BPOWERMEASF_LENGTH   3

Definition at line 1969 of file reg.h.

#define BPOWERMEAST_LENGTH   10

Definition at line 1968 of file reg.h.

#define BPSD_ANTENNA_PATH   0x30

Definition at line 1682 of file reg.h.

#define BPSD_AVERAGE_NUM   0x3000

Definition at line 1679 of file reg.h.

#define BPSD_FREQ   0x3ff

Definition at line 1681 of file reg.h.

#define BPSD_IQ_SWITCH   0x40

Definition at line 1683 of file reg.h.

#define BPSD_REPORT   0xffff

Definition at line 1687 of file reg.h.

#define BPSD_RX_TRIGGER   0x400000

Definition at line 1684 of file reg.h.

#define BPSD_SINE_TONE_SCALE   0x7f000000

Definition at line 1686 of file reg.h.

#define BPSD_TX_TRIGGER   0x80000000

Definition at line 1685 of file reg.h.

#define BPSDFFT_SAMPLE_POINT   0xc000

Definition at line 1678 of file reg.h.

#define BPWDB   0xff00

Definition at line 1990 of file reg.h.

#define BPWED_TH   0x700

Definition at line 1807 of file reg.h.

#define BQPATH_LOOPBACK   0x8000000

Definition at line 1662 of file reg.h.

#define BR2RCCAMASK   0x00000f00

Definition at line 1572 of file reg.h.

#define BRADIO_TH   0x18000000

Definition at line 1816 of file reg.h.

#define BREGULATOR0STANDBY   0x1

Definition at line 1633 of file reg.h.

#define BREGULATOR1STANDBY   0x4

Definition at line 1635 of file reg.h.

#define BREGULATOR_ADJUST   0x7000000

Definition at line 1672 of file reg.h.

#define BREGULATORPLLSTANDBY   0x2

Definition at line 1634 of file reg.h.

#define BRFEND   0x000f0000

Definition at line 1570 of file reg.h.

#define BRFGAIN   0x3f

Definition at line 1976 of file reg.h.

#define BRFMOD   0x1

Definition at line 1549 of file reg.h.

#define BRFSI_3WIRE   0xf

Definition at line 1598 of file reg.h.

#define BRFSI_3WIRECLOCK   0x2

Definition at line 1595 of file reg.h.

#define BRFSI_3WIREDATA   0x1

Definition at line 1594 of file reg.h.

#define BRFSI_3WIRELOAD   0x4

Definition at line 1596 of file reg.h.

#define BRFSI_3WIRERW   0x8

Definition at line 1597 of file reg.h.

#define BRFSI_ANTSW   0x100

Definition at line 1604 of file reg.h.

#define BRFSI_ANTSWB   0x200

Definition at line 1605 of file reg.h.

#define BRFSI_PAPE   0x400

Definition at line 1606 of file reg.h.

#define BRFSI_PAPE5G   0x800

Definition at line 1607 of file reg.h.

#define BRFSI_RFENV   0x10

Definition at line 1600 of file reg.h.

#define BRFSI_TRSW   0x20

Definition at line 1602 of file reg.h.

#define BRFSI_TRSWB   0x40

Definition at line 1603 of file reg.h.

#define BRFSTART   0x0000f000

Definition at line 1565 of file reg.h.

#define BRFSW_RXDEFAULTANT   0x300

Definition at line 1592 of file reg.h.

#define BRFSW_RXOPTIONANT   0x3000

Definition at line 1593 of file reg.h.

#define BRFSW_TXDEFAULTANT   0x3

Definition at line 1590 of file reg.h.

#define BRFSW_TXOPTIONANT   0x30

Definition at line 1591 of file reg.h.

#define BRSR_ACKSHORTPMB   BIT(23)

Definition at line 405 of file reg.h.

#define BRSSI_GEN   0x7f000000

Definition at line 1882 of file reg.h.

#define BRSSI_H   0x7f0000

Definition at line 1881 of file reg.h.

#define BRSSI_TABLE_SELECT   0xc000000

Definition at line 1894 of file reg.h.

#define BRTL8256REG_MODE_CTRL0   0x40

Definition at line 2050 of file reg.h.

#define BRTL8256REG_MODE_CTRL1   0x100

Definition at line 2049 of file reg.h.

#define BRTL8256REG_RXLPFBW   0x600

Definition at line 2052 of file reg.h.

#define BRTL8256REG_TXLPFBW   0x18

Definition at line 2051 of file reg.h.

#define BRTL8258_RSSILPFBW   0xc0

Definition at line 2056 of file reg.h.

#define BRTL8258_RXLPFBW   0xc00

Definition at line 2055 of file reg.h.

#define BRTL8258_TXLPFBW   0xc

Definition at line 2054 of file reg.h.

#define BRX_AGC_ADDRESS_FOR_LNA   0x7f00

Definition at line 1858 of file reg.h.

#define BRX_AGC_FREEZE_THRES   0xc0000

Definition at line 1860 of file reg.h.

#define BRX_AGCSHIFT   0x7f

Definition at line 1869 of file reg.h.

#define BRX_ANTDIV_EN   0x80

Definition at line 1857 of file reg.h.

#define BRX_DCNF_TYPE   0xe000000

Definition at line 1798 of file reg.h.

#define BRX_DFIR_MODE   0x1800000

Definition at line 1797 of file reg.h.

#define BRX_FREEZESTEP_AGC0   0xc000000

Definition at line 1864 of file reg.h.

#define BRX_FREEZESTEP_AGC1   0x300000

Definition at line 1861 of file reg.h.

#define BRX_FREEZESTEP_AGC2   0xc00000

Definition at line 1862 of file reg.h.

#define BRX_FREEZESTEP_AGC3   0x3000000

Definition at line 1863 of file reg.h.

#define BRX_HIGHPOWER_FLOW   0x8000

Definition at line 1859 of file reg.h.

#define BRX_HT   0x8

Definition at line 1972 of file reg.h.

#define BRX_HT_BW   0x1

Definition at line 1970 of file reg.h.

#define BRX_INITIALGAIN   0x7f

Definition at line 1856 of file reg.h.

#define BRX_LDC_OFFSET   0xff

Definition at line 1795 of file reg.h.

#define BRX_OVERFLOW_CHECKTYPE   0x80000000

Definition at line 1868 of file reg.h.

#define BRX_PESUDO_NOISE_A   0xff

Definition at line 2030 of file reg.h.

#define BRX_PESUDO_NOISE_B   0xff00

Definition at line 2031 of file reg.h.

#define BRX_PESUDO_NOISE_C   0xff0000

Definition at line 2032 of file reg.h.

#define BRX_PESUDO_NOISE_D   0xff000000

Definition at line 2033 of file reg.h.

#define BRX_PESUDO_NOISE_ON   0x20000000

Definition at line 2029 of file reg.h.

#define BRX_PESUDO_NOISESTATE_A   0xffff

Definition at line 2034 of file reg.h.

#define BRX_PESUDO_NOISESTATE_B   0xffff0000

Definition at line 2035 of file reg.h.

#define BRX_PESUDO_NOISESTATE_C   0xffff

Definition at line 2036 of file reg.h.

#define BRX_PESUDO_NOISESTATE_D   0xffff0000

Definition at line 2037 of file reg.h.

#define BRX_QDC_OFFSET   0xff00

Definition at line 1796 of file reg.h.

#define BRXAGC_EN   0x1

Definition at line 1872 of file reg.h.

#define BRXAGC_FREEZE_THRES   0x30000

Definition at line 1903 of file reg.h.

#define BRXAGC_FREEZE_THRES_MODE   0x40000000

Definition at line 1867 of file reg.h.

#define BRXAGC_MIN   0x4

Definition at line 1874 of file reg.h.

#define BRXAGC_TOGETHER_EN   0x2

Definition at line 1873 of file reg.h.

#define BRXAGC_TOGETHEREN   0x40000

Definition at line 1904 of file reg.h.

#define BRXANTENNA_POWER_SHIFT   0x3000000

Definition at line 1893 of file reg.h.

#define BRXEVM1ST   0xff0000

Definition at line 1987 of file reg.h.

#define BRXEVM2ND   0xff000000

Definition at line 1988 of file reg.h.

#define BRXFRAME_FUARD_COUNTER_L   0x3800000

Definition at line 1919 of file reg.h.

#define BRXHP2RX   0x38000

Definition at line 1579 of file reg.h.

#define BRXHP_BBP1   0x7000

Definition at line 1878 of file reg.h.

#define BRXHP_BBP2   0x70000

Definition at line 1879 of file reg.h.

#define BRXHP_BBP3   0x700000

Definition at line 1880 of file reg.h.

#define BRXHP_FINAL   0x7000000

Definition at line 1895 of file reg.h.

#define BRXHP_INI   0x7

Definition at line 1875 of file reg.h.

#define BRXHP_RSSI   0x700

Definition at line 1877 of file reg.h.

#define BRXHP_TRLNA   0x70

Definition at line 1876 of file reg.h.

#define BRXHPCCKINI   0xc0000

Definition at line 1580 of file reg.h.

#define BRXHPSETTLE_BBP   0x7

Definition at line 1896 of file reg.h.

#define BRXHPTX   0x7000

Definition at line 1578 of file reg.h.

#define BRXHT_RXHP_BBP   0x1c00000

Definition at line 1908 of file reg.h.

#define BRXHT_RXHP_EN   0x8000

Definition at line 1902 of file reg.h.

#define BRXHT_RXHP_FINAL   0xe0000000

Definition at line 1909 of file reg.h.

#define BRXHTAGC_EN   0x100000

Definition at line 1906 of file reg.h.

#define BRXHTAGC_MIN   0x80000

Definition at line 1905 of file reg.h.

#define BRXHTDAGC_EN   0x200000

Definition at line 1907 of file reg.h.

#define BRXHTSETTLE_BBPPW   0x80

Definition at line 1899 of file reg.h.

#define BRXHTSETTLE_HSSI   0x8

Definition at line 1897 of file reg.h.

#define BRXHTSETTLE_IDLE   0x300

Definition at line 1900 of file reg.h.

#define BRXHTSETTLE_RESERVED   0x1c00

Definition at line 1901 of file reg.h.

#define BRXHTSETTLE_RXHP   0x70

Definition at line 1898 of file reg.h.

#define BRXIQIMB_A   0x3ff

Definition at line 1799 of file reg.h.

#define BRXIQIMB_B   0xfc00

Definition at line 1800 of file reg.h.

#define BRXIQIMB_C   0x3f0000

Definition at line 1801 of file reg.h.

#define BRXIQIMB_D   0xffc00000

Definition at line 1802 of file reg.h.

#define BRXMF_HOLD   0x3800

Definition at line 1912 of file reg.h.

#define BRXNB_NOTCH   0x1f000000

Definition at line 1804 of file reg.h.

#define BRXPATH_A   0x1

Definition at line 1783 of file reg.h.

#define BRXPATH_B   0x2

Definition at line 1784 of file reg.h.

#define BRXPATH_C   0x4

Definition at line 1785 of file reg.h.

#define BRXPATH_D   0x8

Definition at line 1786 of file reg.h.

#define BRXPD_DC_COUNT_MAX   0x600

Definition at line 1915 of file reg.h.

#define BRXPD_DELAY_TH   0x8000

Definition at line 1916 of file reg.h.

#define BRXPD_DELAY_TH1   0x38

Definition at line 1913 of file reg.h.

#define BRXPD_DELAY_TH2   0x1c0

Definition at line 1914 of file reg.h.

#define BRXPROCESS_DELAY   0xf0000

Definition at line 1917 of file reg.h.

#define BRXPROCESS_TIME_BBPPW   0x800000

Definition at line 1892 of file reg.h.

#define BRXPROCESS_TIME_DAGC   0x300000

Definition at line 1890 of file reg.h.

#define BRXPW_RADIO_EN   0x4

Definition at line 1911 of file reg.h.

#define BRXPW_RADIO_TH   0x3

Definition at line 1910 of file reg.h.

#define BRXQUICK_AGCEN   0x20000000

Definition at line 1866 of file reg.h.

#define BRXRSSI_CMP_EN   0x10000000

Definition at line 1865 of file reg.h.

#define BRXSC   0x6

Definition at line 1971 of file reg.h.

#define BRXSEARCHRANGE_GI2_EARLY   0x700000

Definition at line 1918 of file reg.h.

#define BRXSETTLE_ANTSW   0xc0000

Definition at line 1889 of file reg.h.

#define BRXSETTLE_ANTSW_RSSI   0x38000

Definition at line 1888 of file reg.h.

#define BRXSETTLE_BBP   0xe00

Definition at line 1886 of file reg.h.

#define BRXSETTLE_HSSI   0x400000

Definition at line 1891 of file reg.h.

#define BRXSETTLE_LNA   0x38

Definition at line 1884 of file reg.h.

#define BRXSETTLE_RSSI   0x1c0

Definition at line 1885 of file reg.h.

#define BRXSETTLE_RXHP   0x7000

Definition at line 1887 of file reg.h.

#define BRXSETTLE_TRSW   0x7

Definition at line 1883 of file reg.h.

#define BRXSGI_GUARD_L   0xc000000

Definition at line 1920 of file reg.h.

#define BRXSGI_SEARCH_L   0x30000000

Definition at line 1921 of file reg.h.

#define BRXSGI_TH   0xc0000000

Definition at line 1922 of file reg.h.

#define BRXSNR_A   0xff

Definition at line 1979 of file reg.h.

#define BRXSNR_B   0xff00

Definition at line 1980 of file reg.h.

#define BRXSNR_C   0xff0000

Definition at line 1981 of file reg.h.

#define BRXSNR_D   0xff000000

Definition at line 1982 of file reg.h.

#define BSARCH_GI2_LATE   0x70000

Definition at line 1832 of file reg.h.

#define BSARCH_SHORT_EARLY   0x300

Definition at line 1830 of file reg.h.

#define BSARCH_SHORT_LATE   0xc00

Definition at line 1831 of file reg.h.

#define BSBD_OPTION   0x1

Definition at line 1818 of file reg.h.

#define BSBD_START_OFFSET   0x30000000

Definition at line 1826 of file reg.h.

#define BSFACTOR_QMA1   0xf

Definition at line 1993 of file reg.h.

#define BSFACTOR_QMA2   0xf0

Definition at line 1994 of file reg.h.

#define BSFACTOR_QMA3   0xf00

Definition at line 1995 of file reg.h.

#define BSFACTOR_QMA4   0xf000

Definition at line 1996 of file reg.h.

#define BSFACTOR_QMA5   0xf0000

Definition at line 1997 of file reg.h.

#define BSFACTOR_QMA6   0xf0000

Definition at line 1998 of file reg.h.

#define BSFACTOR_QMA7   0xf00000

Definition at line 1999 of file reg.h.

#define BSFACTOR_QMA8   0xf000000

Definition at line 2000 of file reg.h.

#define BSFACTOR_QMA9   0xf0000000

Definition at line 2001 of file reg.h.

#define BSGIEN   0x10000

Definition at line 1991 of file reg.h.

#define BSHIFT_L   0xc0

Definition at line 1781 of file reg.h.

#define BSHORTCFO   0xfff

Definition at line 1956 of file reg.h.

#define BSHORTCFOF_LENGTH   11

Definition at line 1958 of file reg.h.

#define BSHORTCFOT_LENGTH   12

Definition at line 1957 of file reg.h.

#define BSIGEVM   0xff

Definition at line 1989 of file reg.h.

#define BSIGTONE_IM   0x7f00

Definition at line 1949 of file reg.h.

#define BSIGTONE_RE   0x3f

Definition at line 1948 of file reg.h.

#define BSNR_EVMF_LENGTH   1

Definition at line 1984 of file reg.h.

#define BSNR_EVMT_LENGTH   8

Definition at line 1983 of file reg.h.

#define BSTBC_EN   0x4

Definition at line 1936 of file reg.h.

#define BSUB_TUNE   0xe00000

Definition at line 1824 of file reg.h.

#define BT_FUNC   BIT(16)

Definition at line 898 of file reg.h.

#define BTABLESEL   0x40

Definition at line 1977 of file reg.h.

#define BTAILCFO   0x1fff

Definition at line 1962 of file reg.h.

#define BTAILCFOF_LENGTH   12

Definition at line 1964 of file reg.h.

#define BTAILCFOT_LENGTH   13

Definition at line 1963 of file reg.h.

#define BTHEVMCFG   0x7000000

Definition at line 2011 of file reg.h.

#define BTRACKING_MODE   0x8000

Definition at line 2020 of file reg.h.

#define BTREND   0x0f000000

Definition at line 1569 of file reg.h.

#define BTRSSI_FREQ   0x200

Definition at line 1791 of file reg.h.

#define BTRSSI_LATCH_PHASE   0x10000

Definition at line 1794 of file reg.h.

#define BTRSTART   0x00f00000

Definition at line 1564 of file reg.h.

#define BTRSW   0x80

Definition at line 1978 of file reg.h.

#define BTRSW_ISOLATION_A   0x7f

Definition at line 1930 of file reg.h.

#define BTRSW_ISOLATION_B   0x7f00

Definition at line 1931 of file reg.h.

#define BTRSW_ISOLATION_C   0x7f0000

Definition at line 1932 of file reg.h.

#define BTRSW_ISOLATION_D   0x7f000000

Definition at line 1933 of file reg.h.

#define BTRSW_TRI_ONLY   0x80

Definition at line 1870 of file reg.h.

#define BTXCH_EMU_ENABLE   0x01000000

Definition at line 1929 of file reg.h.

#define BTXDATAINIT   0xff

Definition at line 1533 of file reg.h.

#define BTXDATATYPE   0x30000

Definition at line 1535 of file reg.h.

#define BTXDFIRMODE   0x10000

Definition at line 1845 of file reg.h.

#define BTXHTADVANCECODING   0x40

Definition at line 1523 of file reg.h.

#define BTXHTAGGREATION   0x8

Definition at line 1521 of file reg.h.

#define BTXHTBW   0x80

Definition at line 1515 of file reg.h.

#define BTXHTCRC8   0x3fc00

Definition at line 1526 of file reg.h.

#define BTXHTLENGTH   0xffff00

Definition at line 1516 of file reg.h.

#define BTXHTMCSRATE   0x7f

Definition at line 1514 of file reg.h.

#define BTXHTMODE   0x100

Definition at line 1534 of file reg.h.

#define BTXHTNUMBERHT_LTF   0x300

Definition at line 1525 of file reg.h.

#define BTXHTRESERVED   0x4

Definition at line 1520 of file reg.h.

#define BTXHTSHORTGI   0x80

Definition at line 1524 of file reg.h.

#define BTXHTSIG1   0xffffff

Definition at line 1513 of file reg.h.

#define BTXHTSIG2   0xffffff

Definition at line 1517 of file reg.h.

#define BTXHTSMOOTHING   0x1

Definition at line 1518 of file reg.h.

#define BTXHTSOUNDING   0x2

Definition at line 1519 of file reg.h.

#define BTXHTSTBC   0x30

Definition at line 1522 of file reg.h.

#define BTXIDCOFFSET   0xff

Definition at line 1843 of file reg.h.

#define BTXIDLEINTERVAL   0xffff

Definition at line 1530 of file reg.h.

#define BTXIQDCOFFSET   0xff00

Definition at line 1844 of file reg.h.

#define BTXIQIMB_A   0x3ff

Definition at line 1839 of file reg.h.

#define BTXIQIMB_b   0xfc00

Definition at line 1840 of file reg.h.

#define BTXIQIMB_C   0x3f0000

Definition at line 1841 of file reg.h.

#define BTXIQIMB_D   0xffc00000

Definition at line 1842 of file reg.h.

#define BTXLSIG   0xffffff

Definition at line 1508 of file reg.h.

#define BTXMACHEADER   0xffffffff

Definition at line 1532 of file reg.h.

#define BTXPATH_A   0x1

Definition at line 1787 of file reg.h.

#define BTXPATH_B   0x2

Definition at line 1788 of file reg.h.

#define BTXPATH_C   0x4

Definition at line 1789 of file reg.h.

#define BTXPATH_D   0x8

Definition at line 1790 of file reg.h.

#define BTXPESUDO_NOISE_A   0xff

Definition at line 1847 of file reg.h.

#define BTXPESUDO_NOISE_B   0xff00

Definition at line 1848 of file reg.h.

#define BTXPESUDO_NOISE_C   0xff0000

Definition at line 1849 of file reg.h.

#define BTXPESUDO_NOISE_D   0xff000000

Definition at line 1850 of file reg.h.

#define BTXPESUDO_NOISEON   0x4000000

Definition at line 1846 of file reg.h.

#define BTXRANDOMSEED   0xffffffff

Definition at line 1536 of file reg.h.

#define BUCHCFG   0x7000000

Definition at line 2026 of file reg.h.

#define BUPD_CFO   0x40

Definition at line 2014 of file reg.h.

#define BUPD_CFO_OFFDATA   0x80

Definition at line 2015 of file reg.h.

#define BUPD_CLKO   0x1000

Definition at line 2018 of file reg.h.

#define BUPD_CLKO_LTF   0x20000

Definition at line 2022 of file reg.h.

#define BUPDEQZ   0x8000000

Definition at line 2027 of file reg.h.

#define BW_20MHZ   BIT(2)

Definition at line 1109 of file reg.h.

#define BW_OPMODE_11J   BIT(0)

Definition at line 477 of file reg.h.

#define BW_OPMODE_20MHZ   BIT(2)

Definition at line 475 of file reg.h.

#define BW_OPMODE_5G   BIT(1)

Definition at line 476 of file reg.h.

#define BWIN_ENH_L   0xc0000

Definition at line 1812 of file reg.h.

#define BWINDOW_L   0xe0000000

Definition at line 1817 of file reg.h.

#define BWORD   0xf

Definition at line 2064 of file reg.h.

#define BWORD0   0x3

Definition at line 2062 of file reg.h.

#define BWORD1   0xc

Definition at line 2063 of file reg.h.

#define BXATXAGC   0x3f

Definition at line 1557 of file reg.h.

#define BXBTXAGC   0xf00

Definition at line 1559 of file reg.h.

#define BXCTXAGC   0xf000

Definition at line 1560 of file reg.h.

#define BXDTXAGC   0xf0000

Definition at line 1561 of file reg.h.

#define BXTALCAP   0x0f000000

Definition at line 1653 of file reg.h.

#define BXTALCAP01   0xc0000000

Definition at line 1650 of file reg.h.

#define BXTALCAP23   0x3

Definition at line 1651 of file reg.h.

#define BXTALCAP92X   0x0f000000

Definition at line 1652 of file reg.h.

#define BXTALPOWERUP   0x4000

Definition at line 1641 of file reg.h.

#define BZEBRA1_CHANNEL_NUM   0xf80

Definition at line 2045 of file reg.h.

#define BZEBRA1_HSSIENABLE   0x8

Definition at line 2039 of file reg.h.

#define BZEBRA1_RXCHANGEPUMP   0x7

Definition at line 2044 of file reg.h.

#define BZEBRA1_RXCOUNTER   0xc00

Definition at line 2042 of file reg.h.

#define BZEBRA1_RXLPFBW   0x600

Definition at line 2047 of file reg.h.

#define BZEBRA1_TRXCONTROL   0xc00

Definition at line 2040 of file reg.h.

#define BZEBRA1_TRXGAINSETTING   0x07f

Definition at line 2041 of file reg.h.

#define BZEBRA1_TXCHANGEPUMP   0x38

Definition at line 2043 of file reg.h.

#define BZEBRA1_TXLPFBW   0x400

Definition at line 2046 of file reg.h.

#define CAM_AES   0x04

Definition at line 486 of file reg.h.

#define CAM_NONE   0x0

Definition at line 483 of file reg.h.

#define CAM_NOTVALID   0x0000

Definition at line 480 of file reg.h.

#define CAM_POLLINIG   BIT(31)

Definition at line 494 of file reg.h.

#define CAM_READ   0x00000000

Definition at line 493 of file reg.h.

#define CAM_TKIP   0x02

Definition at line 485 of file reg.h.

#define CAM_USEDK   BIT(5)

Definition at line 481 of file reg.h.

#define CAM_VALID   BIT(15)

Definition at line 479 of file reg.h.

#define CAM_WEP104   0x05

Definition at line 487 of file reg.h.

#define CAM_WEP40   0x01

Definition at line 484 of file reg.h.

#define CAM_WRITE   BIT(16)

Definition at line 492 of file reg.h.

#define CBSSID   BIT(6)

Definition at line 1130 of file reg.h.

#define CBSSID_BCN   BIT(7)

Definition at line 1132 of file reg.h.

#define CBSSID_DATA   BIT(6)

Definition at line 1131 of file reg.h.

#define CFENDFORM   BIT(9)

Definition at line 1121 of file reg.h.

#define CHIP_VER_RTL_MASK   0xF000

Definition at line 908 of file reg.h.

#define CHIP_VER_RTL_SHIFT   12

Definition at line 909 of file reg.h.

#define CKDLY_AFE   BIT(26)

Definition at line 827 of file reg.h.

#define CKDLY_BT   BIT(29)

Definition at line 830 of file reg.h.

#define CKDLY_DIG   BIT(28)

Definition at line 829 of file reg.h.

#define CKDLY_USB   BIT(27)

Definition at line 828 of file reg.h.

#define CMD9346CR_9356SEL   BIT(4)

Definition at line 362 of file reg.h.

#define CMDEEPROM_EN   BIT(5)

Definition at line 360 of file reg.h.

#define CMDEEPROM_SEL   BIT(4)

Definition at line 361 of file reg.h.

#define CPRST   BIT(23)

Definition at line 885 of file reg.h.

#define CR9346   REG_9346CR

Definition at line 336 of file reg.h.

#define DCAM   UNUSED_REGISTER

Definition at line 350 of file reg.h.

#define DIS_EDCA_CNT_DWN   BIT(11)

Definition at line 1084 of file reg.h.

#define DIS_GCLK   BIT(1)

Definition at line 1116 of file reg.h.

#define DIS_TSF_UDT0_NORMAL_CHIP   BIT(4)

Definition at line 1095 of file reg.h.

#define DIS_TSF_UDT0_TEST_CHIP   BIT(5)

Definition at line 1096 of file reg.h.

#define DROP_DATA_EN   BIT(9)

Definition at line 1009 of file reg.h.

#define EEPROM_CCK_TX_PWR_INX   0x5A

Definition at line 611 of file reg.h.

#define EEPROM_CHANNEL_PLAN   0x7D

Definition at line 627 of file reg.h.

#define EEPROM_CHANNEL_PLAN_BY_HW_MASK   0x80

Definition at line 589 of file reg.h.

#define EEPROM_CHANNEL_PLAN_ETSI   0x2

Definition at line 579 of file reg.h.

#define EEPROM_CHANNEL_PLAN_FCC   0x0

Definition at line 577 of file reg.h.

#define EEPROM_CHANNEL_PLAN_FRANCE   0x4

Definition at line 581 of file reg.h.

#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN   0x9

Definition at line 586 of file reg.h.

#define EEPROM_CHANNEL_PLAN_IC   0x1

Definition at line 578 of file reg.h.

#define EEPROM_CHANNEL_PLAN_ISRAEL   0x7

Definition at line 584 of file reg.h.

#define EEPROM_CHANNEL_PLAN_MKK   0x5

Definition at line 582 of file reg.h.

#define EEPROM_CHANNEL_PLAN_MKK1   0x6

Definition at line 583 of file reg.h.

#define EEPROM_CHANNEL_PLAN_NCC   0xB

Definition at line 588 of file reg.h.

#define EEPROM_CHANNEL_PLAN_SPAIN   0x3

Definition at line 580 of file reg.h.

#define EEPROM_CHANNEL_PLAN_TELEC   0x8

Definition at line 585 of file reg.h.

#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13   0xA

Definition at line 587 of file reg.h.

#define EEPROM_CHANNELPLAN   0x75

Definition at line 645 of file reg.h.

#define EEPROM_CID_CCX   0x10

Definition at line 593 of file reg.h.

#define EEPROM_CID_DEFAULT   0x0

Definition at line 591 of file reg.h.

#define EEPROM_CID_QMI   0x0D

Definition at line 594 of file reg.h.

#define EEPROM_CID_TOSHIBA   0x4

Definition at line 592 of file reg.h.

#define EEPROM_CID_WHQL   0xFE

Definition at line 595 of file reg.h.

#define EEPROM_CLK   0x06

Definition at line 601 of file reg.h.

#define EEPROM_CUSTOMER_ID   0x7F

Definition at line 629 of file reg.h.

#define EEPROM_DEFAULT_ANTTXPOWERDIFF   0x0

Definition at line 557 of file reg.h.

#define EEPROM_DEFAULT_BOARDTYPE   0x02

Definition at line 551 of file reg.h.

#define EEPROM_DEFAULT_CRYSTALCAP   0x5

Definition at line 550 of file reg.h.

#define EEPROM_DEFAULT_CUSTOMERID   0xAB

Definition at line 573 of file reg.h.

#define EEPROM_DEFAULT_HT20_DIFF   2

Definition at line 561 of file reg.h.

#define EEPROM_DEFAULT_HT20_PWRMAXOFFSET   0

Definition at line 564 of file reg.h.

#define EEPROM_DEFAULT_HT2T_TXPWR   0x10

Definition at line 553 of file reg.h.

#define EEPROM_DEFAULT_HT40_2SDIFF   0x0

Definition at line 560 of file reg.h.

#define EEPROM_DEFAULT_HT40_PWRMAXOFFSET   0

Definition at line 563 of file reg.h.

#define EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF   0x3

Definition at line 562 of file reg.h.

#define EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF   0x3

Definition at line 562 of file reg.h.

#define EEPROM_DEFAULT_PID   0x1234

Definition at line 571 of file reg.h.

#define EEPROM_DEFAULT_SUBCUSTOMERID   0xCD

Definition at line 574 of file reg.h.

#define EEPROM_DEFAULT_THERMALMETER   0x12

Definition at line 556 of file reg.h.

#define EEPROM_DEFAULT_TSSI   0x0

Definition at line 548 of file reg.h.

#define EEPROM_DEFAULT_TXPOWER   0x1010

Definition at line 552 of file reg.h.

#define EEPROM_DEFAULT_TXPOWERDIFF   0x0

Definition at line 549 of file reg.h.

#define EEPROM_DEFAULT_TXPOWERLEVEL   0x22

Definition at line 559 of file reg.h.

#define EEPROM_DEFAULT_TXPWDIFF_CRYSTALCAP   0x5

Definition at line 558 of file reg.h.

#define EEPROM_DEFAULT_VERSION   0

Definition at line 575 of file reg.h.

#define EEPROM_DEFAULT_VID   0x5678

Definition at line 572 of file reg.h.

#define EEPROM_DID   0x0C

Definition at line 605 of file reg.h.

#define EEPROM_EN   BIT(5)

Definition at line 780 of file reg.h.

#define EEPROM_HPON   0x02

Definition at line 600 of file reg.h.

#define EEPROM_HT20_MAX_PWR_OFFSET   0x72

Definition at line 617 of file reg.h.

#define EEPROM_HT20_TX_PWR_INX_DIFF   0x69

Definition at line 614 of file reg.h.

#define EEPROM_HT40_1S_TX_PWR_INX   0x60

Definition at line 612 of file reg.h.

#define EEPROM_HT40_2S_TX_PWR_INX_DIFF   0x66

Definition at line 613 of file reg.h.

#define EEPROM_HT40_MAX_PWR_OFFSET   0x6F

Definition at line 616 of file reg.h.

#define EEPROM_MAC_ADDR   0x16

Definition at line 609 of file reg.h.

#define EEPROM_OFDM_TX_PWR_INX_DIFF   0x6C

Definition at line 615 of file reg.h.

#define EEPROM_PWRDIFF   0x54

Definition at line 631 of file reg.h.

#define EEPROM_RF_OPT1   0x79

Definition at line 623 of file reg.h.

#define EEPROM_RF_OPT2   0x7A

Definition at line 624 of file reg.h.

#define EEPROM_RF_OPT3   0x7B

Definition at line 625 of file reg.h.

#define EEPROM_RF_OPT4   0x7C

Definition at line 626 of file reg.h.

#define EEPROM_SMID   0x10

Definition at line 607 of file reg.h.

#define EEPROM_SVID   0x0E

Definition at line 606 of file reg.h.

#define EEPROM_TESTR   0x08

Definition at line 602 of file reg.h.

#define EEPROM_THERMAL_METER   0x78

Definition at line 643 of file reg.h.

#define EEPROM_THERMAL_METER   0x78

Definition at line 643 of file reg.h.

#define EEPROM_TSSI_A   0x76

Definition at line 641 of file reg.h.

#define EEPROM_TSSI_A   0x76

Definition at line 641 of file reg.h.

#define EEPROM_TSSI_B   0x77

Definition at line 642 of file reg.h.

#define EEPROM_TSSI_B   0x77

Definition at line 642 of file reg.h.

#define EEPROM_TXPOWER_OFDMDIFF   0x6C

Definition at line 637 of file reg.h.

#define EEPROM_TXPOWERCCK   0x5A

Definition at line 633 of file reg.h.

#define EEPROM_TXPOWERHT20DIFF   0x69

Definition at line 636 of file reg.h.

#define EEPROM_TXPOWERHT40_1S   0x60

Definition at line 634 of file reg.h.

#define EEPROM_TXPOWERHT40_2SDIFF   0x66

Definition at line 635 of file reg.h.

#define EEPROM_TXPWR_GROUP   0x6F

Definition at line 639 of file reg.h.

#define EEPROM_VERSION   0x7E

Definition at line 628 of file reg.h.

#define EEPROM_VID   0x0A

Definition at line 604 of file reg.h.

#define EEPROM_XTAL_K   0x78

Definition at line 622 of file reg.h.

#define EF_FLAG   BIT(31)

Definition at line 853 of file reg.h.

#define EF_PD   BIT(19)

Definition at line 852 of file reg.h.

#define EF_TRPT   BIT(7)

Definition at line 855 of file reg.h.

#define EFUSE_MAX_SECTION   16

Definition at line 1207 of file reg.h.

#define EFUSE_REAL_CONTENT_LEN   512

Definition at line 546 of file reg.h.

#define EN_AMPDU_RTY_NEW   BIT(7)

Definition at line 1011 of file reg.h.

#define EN_BCN_FUNCTION   BIT(3)

Definition at line 1088 of file reg.h.

#define EN_MBSSID   BIT(1)

Definition at line 1086 of file reg.h.

#define EN_TXBCN_RPT   BIT(2)

Definition at line 1087 of file reg.h.

#define EnBT   BIT(5)

Definition at line 864 of file reg.h.

#define EnHDP   BIT(14)

Definition at line 871 of file reg.h.

#define EnMBID   BIT(24)

Definition at line 1143 of file reg.h.

#define EnPDN   BIT(4)

Definition at line 744 of file reg.h.

#define EnPMAC   BIT(10)

Definition at line 867 of file reg.h.

#define ENSEC   BIT(9)

Definition at line 922 of file reg.h.

#define EnSIC   BIT(12)

Definition at line 869 of file reg.h.

#define ENSWBCN   BIT(8)

Definition at line 921 of file reg.h.

#define EnUart   BIT(8)

Definition at line 865 of file reg.h.

#define EPROM_CMD_CONFIG   0x3

Definition at line 1202 of file reg.h.

#define EPROM_CMD_LOAD   1

Definition at line 1203 of file reg.h.

#define EPROM_CMD_OPERATING_MODE_MASK   ((1<<7)|(1<<6))

Definition at line 1201 of file reg.h.

#define EROM_EN   BIT(4)

Definition at line 863 of file reg.h.

#define FEN_BB_GLB_RSTn   BIT(1)

Definition at line 724 of file reg.h.

#define FEN_BBRSTB   BIT(0)

Definition at line 723 of file reg.h.

#define FEN_CPUEN   BIT(10)

Definition at line 733 of file reg.h.

#define FEN_DCORE   BIT(11)

Definition at line 734 of file reg.h.

#define FEN_DIO_PCIE   BIT(5)

Definition at line 728 of file reg.h.

#define FEN_DIO_RF   BIT(13)

Definition at line 736 of file reg.h.

#define FEN_DIOE   BIT(9)

Definition at line 732 of file reg.h.

#define FEN_ELDR   BIT(12)

Definition at line 735 of file reg.h.

#define FEN_HWPDN   BIT(14)

Definition at line 737 of file reg.h.

#define FEN_MREGEN   BIT(15)

Definition at line 738 of file reg.h.

#define FEN_PCIEA   BIT(6)

Definition at line 729 of file reg.h.

#define FEN_PCIED   BIT(8)

Definition at line 731 of file reg.h.

#define FEN_PPLL   BIT(7)

Definition at line 730 of file reg.h.

#define FEN_UPLL   BIT(3)

Definition at line 726 of file reg.h.

#define FEN_USBA   BIT(2)

Definition at line 725 of file reg.h.

#define FEN_USBD   BIT(4)

Definition at line 727 of file reg.h.

#define FWDL_ChkSum_rpt   BIT(2)

Definition at line 880 of file reg.h.

#define GET_RX_PAGE_SIZE (   value)    ((value) & 0xF)

Definition at line 939 of file reg.h.

#define GET_TX_PAGE_SIZE (   value)    (((value) & 0xF0) >> 4)

Definition at line 940 of file reg.h.

#define GPIO_IN   REG_GPIO_PIN_CTRL

Definition at line 369 of file reg.h.

#define GPIO_IO_SEL   (REG_GPIO_PIN_CTRL+2)

Definition at line 371 of file reg.h.

#define GPIO_MOD   (REG_GPIO_PIN_CTRL+3)

Definition at line 372 of file reg.h.

#define GPIO_OUT   (REG_GPIO_PIN_CTRL+1)

Definition at line 370 of file reg.h.

#define GPIOSEL_ENBT   BIT(5)

Definition at line 367 of file reg.h.

#define GPIOSEL_GPIO   0

Definition at line 366 of file reg.h.

#define HAL_8192C_HW_GPIO_WPS_BIT   BIT(2)

Definition at line 1211 of file reg.h.

#define HALF_CAM_ENTRY   16

Definition at line 490 of file reg.h.

#define HCI_RXDMA_EN   BIT(1)

Definition at line 914 of file reg.h.

#define HCI_TXDMA_EN   BIT(0)

Definition at line 913 of file reg.h.

#define HPQ_PUBLIC_DIS   BIT(24)

Definition at line 998 of file reg.h.

#define HQSEL_BEQ   BIT(2)

Definition at line 964 of file reg.h.

#define HQSEL_BKQ   BIT(3)

Definition at line 965 of file reg.h.

#define HQSEL_HIQ   BIT(5)

Definition at line 967 of file reg.h.

#define HQSEL_MGTQ   BIT(4)

Definition at line 966 of file reg.h.

#define HQSEL_VIQ   BIT(1)

Definition at line 963 of file reg.h.

#define HQSEL_VOQ   BIT(0)

Definition at line 962 of file reg.h.

#define HTC_LOC_CTRL   BIT(14)

Definition at line 1138 of file reg.h.

#define HWSET_MAX_SIZE   128

Definition at line 1205 of file reg.h.

#define HWSET_MAX_SIZE_92S   HWSET_MAX_SIZE

Definition at line 1206 of file reg.h.

#define IC_MACPHY_MODE   BIT(11)

Definition at line 897 of file reg.h.

#define ICV   BIT(10)

Definition at line 1122 of file reg.h.

#define IDR0   MACIDR0

Definition at line 346 of file reg.h.

#define IDR4   MACIDR4

Definition at line 347 of file reg.h.

#define IMR8190_DISABLED   0x0

Definition at line 505 of file reg.h.

#define IMR_ATIMEND   BIT(10)

Definition at line 527 of file reg.h.

#define IMR_BCNDMAINT1   BIT(26)

Definition at line 511 of file reg.h.

#define IMR_BCNDMAINT2   BIT(27)

Definition at line 510 of file reg.h.

#define IMR_BCNDMAINT3   BIT(28)

Definition at line 509 of file reg.h.

#define IMR_BCNDMAINT4   BIT(29)

Definition at line 508 of file reg.h.

#define IMR_BCNDMAINT5   BIT(30)

Definition at line 507 of file reg.h.

#define IMR_BCNDMAINT6   BIT(31)

Definition at line 506 of file reg.h.

#define IMR_BCNDOK1   BIT(18)

Definition at line 519 of file reg.h.

#define IMR_BCNDOK2   BIT(19)

Definition at line 518 of file reg.h.

#define IMR_BCNDOK3   BIT(20)

Definition at line 517 of file reg.h.

#define IMR_BCNDOK4   BIT(21)

Definition at line 516 of file reg.h.

#define IMR_BCNDOK5   BIT(22)

Definition at line 515 of file reg.h.

#define IMR_BCNDOK6   BIT(23)

Definition at line 514 of file reg.h.

#define IMR_BCNDOK7   BIT(24)

Definition at line 513 of file reg.h.

#define IMR_BCNDOK8   BIT(25)

Definition at line 512 of file reg.h.

#define IMR_BCNINT   BIT(13)

Definition at line 524 of file reg.h.

#define IMR_BDOK   BIT(9)

Definition at line 528 of file reg.h.

#define IMR_BEDOK   BIT(3)

Definition at line 534 of file reg.h.

#define IMR_BKDOK   BIT(4)

Definition at line 533 of file reg.h.

#define IMR_C2HCMD   BIT(9)

Definition at line 541 of file reg.h.

#define IMR_CPWM   BIT(8)

Definition at line 542 of file reg.h.

#define IMR_HIGHDOK   BIT(8)

Definition at line 529 of file reg.h.

#define IMR_MGNTDOK   BIT(6)

Definition at line 531 of file reg.h.

#define IMR_OCPINT   BIT(1)

Definition at line 543 of file reg.h.

#define IMR_PSTIMEOUT   BIT(14)

Definition at line 523 of file reg.h.

#define IMR_RDU   BIT(11)

Definition at line 526 of file reg.h.

#define IMR_ROK   BIT(0)

Definition at line 537 of file reg.h.

#define IMR_RXERR   BIT(10)

Definition at line 540 of file reg.h.

#define IMR_RXFOVW   BIT(12)

Definition at line 525 of file reg.h.

#define IMR_TBDER   BIT(5)

Definition at line 532 of file reg.h.

#define IMR_TBDOK   BIT(7)

Definition at line 530 of file reg.h.

#define IMR_TIMEOUT1   BIT(16)

Definition at line 521 of file reg.h.

#define IMR_TIMEOUT2   BIT(17)

Definition at line 520 of file reg.h.

#define IMR_TXERR   BIT(11)

Definition at line 539 of file reg.h.

#define IMR_TXFOVW   BIT(15)

Definition at line 522 of file reg.h.

#define IMR_VIDOK   BIT(2)

Definition at line 535 of file reg.h.

#define IMR_VODOK   BIT(1)

Definition at line 536 of file reg.h.

#define IMR_WLANOFF   BIT(0)

Definition at line 544 of file reg.h.

#define INVALID_BBRF_VALUE   0x12345678

Definition at line 355 of file reg.h.

#define IS_BB_REG_OFFSET_92S (   _Offset)    ((_Offset >= 0x800) && (_Offset <= 0xfff))

Definition at line 1546 of file reg.h.

#define ISO_DIOE   BIT(7)

Definition at line 716 of file reg.h.

#define ISO_DIOP   BIT(6)

Definition at line 715 of file reg.h.

#define ISO_DIOR   BIT(9)

Definition at line 718 of file reg.h.

#define ISO_EB2CORE   BIT(8)

Definition at line 717 of file reg.h.

#define ISO_IP2MAC   BIT(5)

Definition at line 714 of file reg.h.

#define ISO_MD2PP   BIT(0)

Definition at line 709 of file reg.h.

#define ISO_PA2PCIE   BIT(3)

Definition at line 712 of file reg.h.

#define ISO_PD2CORE   BIT(4)

Definition at line 713 of file reg.h.

#define ISO_UA2USB   BIT(1)

Definition at line 710 of file reg.h.

#define ISO_UD2CORE   BIT(2)

Definition at line 711 of file reg.h.

#define ISR   REG_HISR

Definition at line 338 of file reg.h.

#define LAST_ENTRY_OF_TX_PKT_BUFFER   255

Definition at line 1193 of file reg.h.

#define LD_RQPN   BIT(31)

Definition at line 1000 of file reg.h.

#define LDA15_EN   BIT(0)

Definition at line 799 of file reg.h.

#define LDA15_OBUF   BIT(2)

Definition at line 801 of file reg.h.

#define LDA15_REG_VOS   BIT(3)

Definition at line 802 of file reg.h.

#define LDA15_STBY   BIT(1)

Definition at line 800 of file reg.h.

#define LDOE25_EN   BIT(31)

Definition at line 856 of file reg.h.

#define LDV12_EN   BIT(0)

Definition at line 805 of file reg.h.

#define LDV12_SDBY   BIT(1)

Definition at line 806 of file reg.h.

#define LED0DIS   BIT(7)

Definition at line 876 of file reg.h.

#define LED0PL   BIT(4)

Definition at line 874 of file reg.h.

#define LED1PL   BIT(12)

Definition at line 875 of file reg.h.

#define LEFT_ANTENNA   0x0

Definition at line 2085 of file reg.h.

#define LOADER_CLK_EN   BIT(5)

Definition at line 770 of file reg.h.

#define LOCK_ALL_EN   BIT(7)

Definition at line 793 of file reg.h.

#define LOOPBACK_DMA   0x7

Definition at line 937 of file reg.h.

#define LOOPBACK_IMMEDIATELY   0xB

Definition at line 934 of file reg.h.

#define LOOPBACK_MAC_DELAY   0x3

Definition at line 935 of file reg.h.

#define LOOPBACK_NORMAL   0x0

Definition at line 933 of file reg.h.

#define LOOPBACK_PHY   0x1

Definition at line 936 of file reg.h.

#define LPLDO_HSM   BIT(2)

Definition at line 807 of file reg.h.

#define LPLDO_LSM_DIS   BIT(3)

Definition at line 808 of file reg.h.

#define LPQ_PUBLIC_DIS   BIT(25)

Definition at line 999 of file reg.h.

#define LSIGEN   BIT(23)

Definition at line 1142 of file reg.h.

#define MAC_CLK_EN   BIT(11)

Definition at line 775 of file reg.h.

#define MAC_ID_EN   BIT(7)

Definition at line 784 of file reg.h.

#define MACIDR0   REG_MACID

Definition at line 341 of file reg.h.

#define MACIDR4   (REG_MACID + 4)

Definition at line 342 of file reg.h.

#define MACINI_RDY   BIT(3)

Definition at line 881 of file reg.h.

#define MACRXEN   BIT(7)

Definition at line 920 of file reg.h.

#define MACSLP   BIT(4)

Definition at line 769 of file reg.h.

#define MACTXEN   BIT(6)

Definition at line 919 of file reg.h.

#define MASK12BITS   0xfff

Definition at line 2073 of file reg.h.

#define MASK20BITS   0xfffff

Definition at line 2079 of file reg.h.

#define MASK4BITS   0x0f

Definition at line 2078 of file reg.h.

#define MASK_LBMODE   0xF000000

Definition at line 932 of file reg.h.

#define MASK_NETTYPE   0x30000

Definition at line 925 of file reg.h.

#define MASKBYTE0   0xff

Definition at line 2066 of file reg.h.

#define MASKBYTE1   0xff00

Definition at line 2067 of file reg.h.

#define MASKBYTE2   0xff0000

Definition at line 2068 of file reg.h.

#define MASKBYTE3   0xff000000

Definition at line 2069 of file reg.h.

#define MASKCCK   0x3f3f3f3f

Definition at line 2076 of file reg.h.

#define MASKDWORD   0xffffffff

Definition at line 2072 of file reg.h.

#define MASKH4BITS   0xf0000000

Definition at line 2074 of file reg.h.

#define MASKHWORD   0xffff0000

Definition at line 2070 of file reg.h.

#define MASKLWORD   0x0000ffff

Definition at line 2071 of file reg.h.

#define MASKOFDM_D   0xffc00000

Definition at line 2075 of file reg.h.

#define MAX_MSS_DENSITY_1T   0x0A

Definition at line 1199 of file reg.h.

#define MAX_MSS_DENSITY_1T   0x0A

Definition at line 1199 of file reg.h.

#define MAX_MSS_DENSITY_2T   0x13

Definition at line 1198 of file reg.h.

#define MAX_MSS_DENSITY_2T   0x13

Definition at line 1198 of file reg.h.

#define MCUFWDL_EN   BIT(0)

Definition at line 878 of file reg.h.

#define MCUFWDL_RDY   BIT(1)

Definition at line 879 of file reg.h.

#define MFBEN   BIT(22)

Definition at line 1141 of file reg.h.

#define MSR   (REG_CR + 2)

Definition at line 337 of file reg.h.

#define MSR_ADHOC   0x01

Definition at line 375 of file reg.h.

#define MSR_AP   0x03

Definition at line 377 of file reg.h.

#define MSR_INFRA   0x02

Definition at line 376 of file reg.h.

#define MSR_NOLINK   0x00

Definition at line 374 of file reg.h.

#define NT_AS_AP   0x3

Definition at line 929 of file reg.h.

#define NT_LINK_AD_HOC   0x1

Definition at line 927 of file reg.h.

#define NT_LINK_AP   0x2

Definition at line 928 of file reg.h.

#define NT_NO_LINK   0x0

Definition at line 926 of file reg.h.

#define PAD_HWPD_IDN   BIT(22)

Definition at line 900 of file reg.h.

#define PAD_SEL   BIT(2)

Definition at line 1117 of file reg.h.

#define PBP   REG_PBP

Definition at line 344 of file reg.h.

#define PBP_1024   0x4

Definition at line 950 of file reg.h.

#define PBP_128   0x1

Definition at line 947 of file reg.h.

#define PBP_256   0x2

Definition at line 948 of file reg.h.

#define PBP_512   0x3

Definition at line 949 of file reg.h.

#define PBP_64   0x0

Definition at line 946 of file reg.h.

#define PCIRSTB   BIT(4)

Definition at line 891 of file reg.h.

#define PCLK_VLD   BIT(3)

Definition at line 890 of file reg.h.

#define PDN_PL   BIT(5)

Definition at line 745 of file reg.h.

#define PFM_ALDN   BIT(1)

Definition at line 741 of file reg.h.

#define PFM_LDALL   BIT(0)

Definition at line 740 of file reg.h.

#define PFM_LDKP   BIT(2)

Definition at line 742 of file reg.h.

#define PFM_WOWL   BIT(3)

Definition at line 743 of file reg.h.

#define PHY_SSC_RSTB   BIT(9)

Definition at line 773 of file reg.h.

#define PHYDATAR   UNUSED_REGISTER

Definition at line 353 of file reg.h.

#define POLLING_LLT_THRESHOLD   20

Definition at line 1195 of file reg.h.

#define POLLING_READY_TIMEOUT_COUNT   1000

Definition at line 1196 of file reg.h.

#define PROTOCOL_EN   BIT(4)

Definition at line 917 of file reg.h.

#define PSR   UNUSED_REGISTER

Definition at line 351 of file reg.h.

#define PWC_EV12V   BIT(15)

Definition at line 721 of file reg.h.

#define PWC_EV25V   BIT(14)

Definition at line 720 of file reg.h.

#define PWR_ST   BIT(6)

Definition at line 1118 of file reg.h.

#define PWRBIT_OW_EN   BIT(7)

Definition at line 1119 of file reg.h.

#define QS_BE_QUEUE   BIT(10)

Definition at line 957 of file reg.h.

#define QS_BK_QUEUE   BIT(11)

Definition at line 958 of file reg.h.

#define QS_HIGH_QUEUE   BIT(13)

Definition at line 960 of file reg.h.

#define QS_MANAGER_QUEUE   BIT(12)

Definition at line 959 of file reg.h.

#define QS_VI_QUEUE   BIT(9)

Definition at line 956 of file reg.h.

#define QS_VO_QUEUE   BIT(8)

Definition at line 955 of file reg.h.

#define QUEUE_HIGH   3

Definition at line 978 of file reg.h.

#define QUEUE_LOW   1

Definition at line 976 of file reg.h.

#define QUEUE_NORMAL   2

Definition at line 977 of file reg.h.

#define R_DIS_PRST_0   BIT(5)

Definition at line 791 of file reg.h.

#define R_DIS_PRST_1   BIT(6)

Definition at line 792 of file reg.h.

#define RATE_11M   BIT(3)

Definition at line 439 of file reg.h.

#define RATE_12M   BIT(6)

Definition at line 442 of file reg.h.

#define RATE_18M   BIT(7)

Definition at line 443 of file reg.h.

#define RATE_1M   BIT(0)

Definition at line 436 of file reg.h.

#define RATE_24M   BIT(8)

Definition at line 444 of file reg.h.

#define RATE_2M   BIT(1)

Definition at line 437 of file reg.h.

#define RATE_36M   BIT(9)

Definition at line 445 of file reg.h.

#define RATE_48M   BIT(10)

Definition at line 446 of file reg.h.

#define RATE_54M   BIT(11)

Definition at line 447 of file reg.h.

#define RATE_5_5M   BIT(2)

Definition at line 438 of file reg.h.

#define RATE_6M   BIT(4)

Definition at line 440 of file reg.h.

#define RATE_9M   BIT(5)

Definition at line 441 of file reg.h.

#define RATE_ALL_CCK   (RATR_1M | RATR_2M | RATR_55M | RATR_11M)

Definition at line 465 of file reg.h.

#define RATE_ALL_OFDM_1SS
Value:
(RATR_MCS0 | RATR_MCS1 | RATR_MCS2 | \
RATR_MCS3 | RATR_MCS4 | RATR_MCS5 | \
RATR_MCS6 | RATR_MCS7)

Definition at line 468 of file reg.h.

#define RATE_ALL_OFDM_2SS
Value:
(RATR_MCS8 | RATR_MCS9 | RATR_MCS10 | \
RATR_MCS11 | RATR_MCS12 | RATR_MCS13 | \
RATR_MCS14 | RATR_MCS15)

Definition at line 471 of file reg.h.

#define RATE_ALL_OFDM_AG
Value:
(RATR_6M | RATR_9M | RATR_12M | RATR_18M \
| RATR_24M | RATR_36M | RATR_48M | RATR_54M)

Definition at line 466 of file reg.h.

#define RATE_BITMAP_ALL   0xFFFFF

Definition at line 1111 of file reg.h.

#define RATE_MCS0   BIT(12)

Definition at line 448 of file reg.h.

#define RATE_MCS1   BIT(13)

Definition at line 449 of file reg.h.

#define RATE_MCS10   BIT(22)

Definition at line 458 of file reg.h.

#define RATE_MCS11   BIT(23)

Definition at line 459 of file reg.h.

#define RATE_MCS12   BIT(24)

Definition at line 460 of file reg.h.

#define RATE_MCS13   BIT(25)

Definition at line 461 of file reg.h.

#define RATE_MCS14   BIT(26)

Definition at line 462 of file reg.h.

#define RATE_MCS15   BIT(27)

Definition at line 463 of file reg.h.

#define RATE_MCS2   BIT(14)

Definition at line 450 of file reg.h.

#define RATE_MCS3   BIT(15)

Definition at line 451 of file reg.h.

#define RATE_MCS4   BIT(16)

Definition at line 452 of file reg.h.

#define RATE_MCS5   BIT(17)

Definition at line 453 of file reg.h.

#define RATE_MCS6   BIT(18)

Definition at line 454 of file reg.h.

#define RATE_MCS7   BIT(19)

Definition at line 455 of file reg.h.

#define RATE_MCS8   BIT(20)

Definition at line 456 of file reg.h.

#define RATE_MCS9   BIT(21)

Definition at line 457 of file reg.h.

#define RATE_REG_BITMAP_ALL   0xFFFFF

Definition at line 1018 of file reg.h.

#define RATE_RRSR_CCK_ONLY_1M   0xFFFF1

Definition at line 1113 of file reg.h.

#define RATR_11M   0x00000008

Definition at line 410 of file reg.h.

#define RATR_12M   0x00000040

Definition at line 413 of file reg.h.

#define RATR_18M   0x00000080

Definition at line 414 of file reg.h.

#define RATR_1M   0x00000001

Definition at line 407 of file reg.h.

#define RATR_24M   0x00000100

Definition at line 415 of file reg.h.

#define RATR_2M   0x00000002

Definition at line 408 of file reg.h.

#define RATR_36M   0x00000200

Definition at line 416 of file reg.h.

#define RATR_48M   0x00000400

Definition at line 417 of file reg.h.

#define RATR_54M   0x00000800

Definition at line 418 of file reg.h.

#define RATR_55M   0x00000004

Definition at line 409 of file reg.h.

#define RATR_6M   0x00000010

Definition at line 411 of file reg.h.

#define RATR_9M   0x00000020

Definition at line 412 of file reg.h.

#define RATR_MCS0   0x00001000

Definition at line 419 of file reg.h.

#define RATR_MCS1   0x00002000

Definition at line 420 of file reg.h.

#define RATR_MCS10   0x00400000

Definition at line 429 of file reg.h.

#define RATR_MCS11   0x00800000

Definition at line 430 of file reg.h.

#define RATR_MCS12   0x01000000

Definition at line 431 of file reg.h.

#define RATR_MCS13   0x02000000

Definition at line 432 of file reg.h.

#define RATR_MCS14   0x04000000

Definition at line 433 of file reg.h.

#define RATR_MCS15   0x08000000

Definition at line 434 of file reg.h.

#define RATR_MCS2   0x00004000

Definition at line 421 of file reg.h.

#define RATR_MCS3   0x00008000

Definition at line 422 of file reg.h.

#define RATR_MCS4   0x00010000

Definition at line 423 of file reg.h.

#define RATR_MCS5   0x00020000

Definition at line 424 of file reg.h.

#define RATR_MCS6   0x00040000

Definition at line 425 of file reg.h.

#define RATR_MCS7   0x00080000

Definition at line 426 of file reg.h.

#define RATR_MCS8   0x00100000

Definition at line 427 of file reg.h.

#define RATR_MCS9   0x00200000

Definition at line 428 of file reg.h.

#define RCCK0_AFESETTING   0xa04

Definition at line 1298 of file reg.h.

#define RCCK0_CCA   0xa08

Definition at line 1299 of file reg.h.

#define RCCK0_DEBUGPORT   0xa28

Definition at line 1311 of file reg.h.

#define RCCK0_DSPPARAMETER1   0xa18

Definition at line 1306 of file reg.h.

#define RCCK0_DSPPARAMETER2   0xa1c

Definition at line 1307 of file reg.h.

#define RCCK0_FACOUNTERLOWER   0xa5c

Definition at line 1315 of file reg.h.

#define RCCK0_FACOUNTERUPPER   0xa58

Definition at line 1316 of file reg.h.

#define RCCK0_FALSEALARMREPORT   0xa2c

Definition at line 1312 of file reg.h.

#define RCCK0_RXAGC1   0xa0c

Definition at line 1301 of file reg.h.

#define RCCK0_RXAGC2   0xa10

Definition at line 1302 of file reg.h.

#define RCCK0_RXHP   0xa14

Definition at line 1304 of file reg.h.

#define RCCK0_RXREPORT   0xa54

Definition at line 1314 of file reg.h.

#define RCCK0_SYSTEM   0xa00

Definition at line 1296 of file reg.h.

#define RCCK0_TRSSIREPORT   0xa50

Definition at line 1313 of file reg.h.

#define RCCK0_TXFILTER1   0xa20

Definition at line 1309 of file reg.h.

#define RCCK0_TXFILTER2   0xa24

Definition at line 1310 of file reg.h.

#define RCR_AAP   BIT(0)

Definition at line 684 of file reg.h.

#define RCR_AB   BIT(3)

Definition at line 681 of file reg.h.

#define RCR_ACF   BIT(12)

Definition at line 672 of file reg.h.

#define RCR_ACRC32   BIT(8)

Definition at line 675 of file reg.h.

#define RCR_ADD3   BIT(4)

Definition at line 680 of file reg.h.

#define RCR_ADF   BIT(11)

Definition at line 673 of file reg.h.

#define RCR_AICV   BIT(9)

Definition at line 674 of file reg.h.

#define RCR_AM   BIT(2)

Definition at line 682 of file reg.h.

#define RCR_AMF   BIT(13)

Definition at line 671 of file reg.h.

#define RCR_APM   BIT(1)

Definition at line 683 of file reg.h.

#define RCR_APP_BA_SSN   BIT(27)

Definition at line 666 of file reg.h.

#define RCR_APP_FCS   BIT(31)

Definition at line 661 of file reg.h.

#define RCR_APP_ICV   BIT(29)

Definition at line 663 of file reg.h.

#define RCR_APP_MIC   BIT(30)

Definition at line 662 of file reg.h.

#define RCR_APP_PHYST_RXFF   BIT(28)

Definition at line 665 of file reg.h.

#define RCR_APP_PHYSTS   BIT(28)

Definition at line 664 of file reg.h.

#define RCR_APPFCS   BIT(31)

Definition at line 660 of file reg.h.

#define RCR_APWRMGT   BIT(5)

Definition at line 679 of file reg.h.

#define RCR_CBSSID   RCR_CBSSID_DATA

Definition at line 678 of file reg.h.

#define RCR_CBSSID_BCN   BIT(7)

Definition at line 676 of file reg.h.

#define RCR_CBSSID_DATA   BIT(6)

Definition at line 677 of file reg.h.

#define RCR_ENMBID   BIT(24)

Definition at line 667 of file reg.h.

#define RCR_FIFO_OFFSET   13

Definition at line 686 of file reg.h.

#define RCR_HTC_LOC_CTRL   BIT(14)

Definition at line 670 of file reg.h.

#define RCR_LSIGEN   BIT(23)

Definition at line 668 of file reg.h.

#define RCR_MFBEN   BIT(22)

Definition at line 669 of file reg.h.

#define RCR_MXDMA_OFFSET   8

Definition at line 685 of file reg.h.

#define RD_CTRL   0x0524

Definition at line 689 of file reg.h.

#define RDY_MACON   BIT(16)

Definition at line 754 of file reg.h.

#define REG_9346CR   0x000A

Definition at line 37 of file reg.h.

#define REG_ACKTO   0x0640

Definition at line 280 of file reg.h.

#define REG_ACLK_MON   0x003E

Definition at line 54 of file reg.h.

#define REG_ACMAVG   0x05C2

Definition at line 252 of file reg.h.

#define REG_ACMHWCTRL   0x05C0

Definition at line 250 of file reg.h.

#define REG_ACMRSTCTRL   0x05C1

Definition at line 251 of file reg.h.

#define REG_AFE_MISC   0x0010

Definition at line 39 of file reg.h.

#define REG_AFE_PLL_CTRL   0x0028

Definition at line 49 of file reg.h.

#define REG_AFE_XTAL_CTRL   0x0024

Definition at line 48 of file reg.h.

#define REG_AGGLEN_LMT   0x0458

Definition at line 191 of file reg.h.

#define REG_AGGR_BREAK_TIME   0x051A

Definition at line 224 of file reg.h.

#define REG_AMPDU_MIN_SPACE   0x045C

Definition at line 192 of file reg.h.

#define REG_APS_FSMCO   0x0004

Definition at line 35 of file reg.h.

#define REG_APSD_CTRL   0x0600

Definition at line 259 of file reg.h.

#define REG_ARFR0   0x0444

Definition at line 187 of file reg.h.

#define REG_ARFR1   0x0448

Definition at line 188 of file reg.h.

#define REG_ARFR2   0x044C

Definition at line 189 of file reg.h.

#define REG_ARFR3   0x0450

Definition at line 190 of file reg.h.

#define REG_ATIMWND   0x055A

Definition at line 241 of file reg.h.

#define REG_BACAMCMD   0x0654

Definition at line 285 of file reg.h.

#define REG_BACAMCONTENT   0x0658

Definition at line 286 of file reg.h.

#define REG_BAR_MODE_CTRL   0x04CC

Definition at line 204 of file reg.h.

#define REG_BB_ACCEESS_CTRL   0x01E8

Definition at line 131 of file reg.h.

#define REG_BB_ACCESS_DATA   0x01EC

Definition at line 132 of file reg.h.

#define REG_BCN_CTRL   0x0550

Definition at line 233 of file reg.h.

#define REG_BCN_INTERVAL   0x0554

Definition at line 237 of file reg.h.

#define REG_BCN_MAX_ERR   0x055D

Definition at line 242 of file reg.h.

#define REG_BCN_PSR_RPT   0x06A8

Definition at line 307 of file reg.h.

#define REG_BCNDMATIM   0x0559

Definition at line 240 of file reg.h.

#define REG_BCNQ_DESA   0x0308

Definition at line 147 of file reg.h.

#define REG_BCNQ_INFORMATION   0x0418

Definition at line 173 of file reg.h.

#define REG_BCNTCFG   0x0510

Definition at line 217 of file reg.h.

#define REG_BE_ADMTIME   0x05C8

Definition at line 255 of file reg.h.

#define REG_BEQ_DESA   0x0330

Definition at line 152 of file reg.h.

#define REG_BEQ_INFORMATION   0x0408

Definition at line 169 of file reg.h.

#define REG_BIST_ROM_RPT   0x00D8

Definition at line 85 of file reg.h.

#define REG_BIST_RPT   0x00D4

Definition at line 84 of file reg.h.

#define REG_BIST_SCAN   0x00D0

Definition at line 83 of file reg.h.

#define REG_BKQ_DESA   0x0338

Definition at line 153 of file reg.h.

#define REG_BKQ_INFORMATION   0x040C

Definition at line 170 of file reg.h.

#define REG_BSSID   0x0618

Definition at line 268 of file reg.h.

#define REG_BT_COEX_TABLE   0x06C0

Definition at line 310 of file reg.h.

#define REG_BWOPMODE   0x0603

Definition at line 260 of file reg.h.

#define REG_C2HEVT_CLEAR   0x01BF

Definition at line 121 of file reg.h.

#define REG_C2HEVT_MSG_NORMAL   0x01A0

Definition at line 119 of file reg.h.

#define REG_C2HEVT_MSG_TEST   0x01B8

Definition at line 120 of file reg.h.

#define REG_CAL_TIMER   0x003C

Definition at line 53 of file reg.h.

#define REG_CALB32K_CTRL   0x06AC

Definition at line 308 of file reg.h.

#define REG_CAMCMD   0x0670

Definition at line 292 of file reg.h.

#define REG_CAMDBG   0x067C

Definition at line 295 of file reg.h.

#define REG_CAMREAD   0x0678

Definition at line 294 of file reg.h.

#define REG_CAMWRITE   0x0674

Definition at line 293 of file reg.h.

#define REG_CMDQ_DESA_NODEF   0x0000

Definition at line 165 of file reg.h.

#define REG_CPU_MGQ_INFORMATION   0x041C

Definition at line 175 of file reg.h.

#define REG_CPWM   0x012F

Definition at line 103 of file reg.h.

#define REG_CR   0x0100

Definition at line 93 of file reg.h.

#define REG_CTS2TO   0x0641

Definition at line 281 of file reg.h.

#define REG_DARFRC   0x0430

Definition at line 184 of file reg.h.

#define REG_DBG_SEL   0x0360

Definition at line 157 of file reg.h.

#define REG_DBI   0x0348

Definition at line 155 of file reg.h.

#define REG_DIS_TXREQ_CLR   0x0523

Definition at line 228 of file reg.h.

#define REG_DRVERLYINT   0x0558

Definition at line 239 of file reg.h.

#define REG_DUAL_TSF_RST   0x0553

Definition at line 236 of file reg.h.

#define REG_DUMMY   0x04FC

Definition at line 211 of file reg.h.

#define REG_EDCA_BE_PARAM   0x0508

Definition at line 215 of file reg.h.

#define REG_EDCA_BK_PARAM   0x050C

Definition at line 216 of file reg.h.

#define REG_EDCA_RANDOM_GEN   0x05CC

Definition at line 256 of file reg.h.

#define REG_EDCA_VI_PARAM   0x0504

Definition at line 214 of file reg.h.

#define REG_EDCA_VO_PARAM   0x0500

Definition at line 213 of file reg.h.

#define REG_EE_VPD   0x000C

Definition at line 38 of file reg.h.

#define REG_EFUSE_CTRL   0x0030

Definition at line 50 of file reg.h.

#define REG_EFUSE_TEST   0x0034

Definition at line 51 of file reg.h.

#define REG_EIFS   0x0642

Definition at line 282 of file reg.h.

#define REG_FAST_EDCA_CTRL   0x0460

Definition at line 194 of file reg.h.

#define REG_FIFOPAGE   0x0204

Definition at line 135 of file reg.h.

#define REG_FMETHR   0x01C8

Definition at line 123 of file reg.h.

#define REG_FSIMR   0x0050

Definition at line 64 of file reg.h.

#define REG_FSISR   0x0054

Definition at line 65 of file reg.h.

#define REG_FWDLY   0x0661

Definition at line 288 of file reg.h.

#define REG_FWHW_TXQ_CTRL   0x0420

Definition at line 176 of file reg.h.

#define REG_FWIMR   0x0130

Definition at line 104 of file reg.h.

#define REG_FWISR   0x0134

Definition at line 105 of file reg.h.

#define REG_GPIO_INTM   0x0048

Definition at line 59 of file reg.h.

#define REG_GPIO_IO_SEL   0x0042

Definition at line 56 of file reg.h.

#define REG_GPIO_IO_SEL_2   0x0062

Definition at line 72 of file reg.h.

#define REG_GPIO_MUXCFG   0x0040

Definition at line 55 of file reg.h.

#define REG_GPIO_OUTSTS   0x00F4 /* For RTL8723 only.*/

Definition at line 91 of file reg.h.

#define REG_GPIO_PIN_CTRL   0x0044

Definition at line 58 of file reg.h.

#define REG_GPIO_PIN_CTRL_2   0x0060

Definition at line 70 of file reg.h.

#define REG_HDAQ_DESA_NODEF   0x0000

Definition at line 164 of file reg.h.

#define REG_HGQ_INFORMATION   0x0414

Definition at line 172 of file reg.h.

#define REG_HIMR   0x0120

Definition at line 99 of file reg.h.

#define REG_HIMRE   0x0128

Definition at line 101 of file reg.h.

#define REG_HISR   0x0124

Definition at line 100 of file reg.h.

#define REG_HISRE   0x012C

Definition at line 102 of file reg.h.

#define REG_HMEBOX_0   0x01D0

Definition at line 125 of file reg.h.

#define REG_HMEBOX_1   0x01D4

Definition at line 126 of file reg.h.

#define REG_HMEBOX_2   0x01D8

Definition at line 127 of file reg.h.

#define REG_HMEBOX_3   0x01DC

Definition at line 128 of file reg.h.

#define REG_HMEBOX_EXT_0   0x0088

Definition at line 78 of file reg.h.

#define REG_HMEBOX_EXT_1   0x008A

Definition at line 79 of file reg.h.

#define REG_HMEBOX_EXT_2   0x008C

Definition at line 80 of file reg.h.

#define REG_HMEBOX_EXT_3   0x008E

Definition at line 81 of file reg.h.

#define REG_HMETFR   0x01CC

Definition at line 124 of file reg.h.

#define REG_HPON_FSM   0x00EC

Definition at line 89 of file reg.h.

#define REG_HQ_DESA   0x0310

Definition at line 148 of file reg.h.

#define REG_HSIMR   0x0058

Definition at line 66 of file reg.h.

#define REG_HSISR   0x005c

Definition at line 67 of file reg.h.

#define REG_HWSEQ_CTRL   0x0423

Definition at line 177 of file reg.h.

#define REG_INIDATA_RATE_SEL   0x0484

Definition at line 197 of file reg.h.

#define REG_INIRTS_RATE_SEL   0x0480

Definition at line 196 of file reg.h.

#define REG_INIT_TSFTR   0x0564

Definition at line 246 of file reg.h.

#define REG_INT_MIG   0x0304

Definition at line 146 of file reg.h.

#define REG_LBDLY   0x0660

Definition at line 287 of file reg.h.

#define REG_LBMODE   (REG_CR + 3)

Definition at line 911 of file reg.h.

#define REG_LDOA15_CTRL   0x0020

Definition at line 44 of file reg.h.

#define REG_LDOHCI12_CTRL   0x0022

Definition at line 46 of file reg.h.

#define REG_LDOV12D_CTRL   0x0021

Definition at line 45 of file reg.h.

#define REG_LEDCFG0   0x004C

Definition at line 60 of file reg.h.

#define REG_LEDCFG1   0x004D

Definition at line 61 of file reg.h.

#define REG_LEDCFG2   0x004E

Definition at line 62 of file reg.h.

#define REG_LEDCFG3   0x004F

Definition at line 63 of file reg.h.

#define REG_LLT_INIT   0x01E0

Definition at line 130 of file reg.h.

#define REG_LPLDO_CTRL   0x0023

Definition at line 47 of file reg.h.

#define REG_LPNAV_CTRL   0x0694

Definition at line 301 of file reg.h.

#define REG_MAC_PINMUX_CFG   0x0043

Definition at line 57 of file reg.h.

#define REG_MAC_SPEC_SIFS   0x063A

Definition at line 273 of file reg.h.

#define REG_MACID   0x0610

Definition at line 267 of file reg.h.

#define REG_MAR   0x0620

Definition at line 269 of file reg.h.

#define REG_MBID_NUM   0x0552

Definition at line 235 of file reg.h.

#define REG_MBIDCAMCFG   0x0628

Definition at line 270 of file reg.h.

#define REG_MBIST_DONE   0x0178

Definition at line 117 of file reg.h.

#define REG_MBIST_FAIL   0x017C

Definition at line 118 of file reg.h.

#define REG_MBIST_START   0x0174

Definition at line 116 of file reg.h.

#define REG_MBSSID_BCN_SPACE   0x0554

Definition at line 238 of file reg.h.

#define REG_MCUFWDL   0x0080

Definition at line 76 of file reg.h.

#define REG_MCUTST_1   0x01c0

Definition at line 122 of file reg.h.

#define REG_MDIO   0x0354

Definition at line 156 of file reg.h.

#define REG_MGQ_DESA   0x0318

Definition at line 149 of file reg.h.

#define REG_MGQ_INFORMATION   0x0410

Definition at line 171 of file reg.h.

#define REG_MULTI_BCNQ_EN   0x0426

Definition at line 180 of file reg.h.

#define REG_MULTI_BCNQ_OFFSET   0x0427

Definition at line 181 of file reg.h.

#define REG_MULTI_FUNC_CTRL   0x0068

Definition at line 74 of file reg.h.

#define REG_NAV_CTRL   0x0650

Definition at line 284 of file reg.h.

#define REG_NAV_PROT_LEN   0x0546

Definition at line 232 of file reg.h.

#define REG_NEED_CPU_HANDLE   0x04E0

Definition at line 208 of file reg.h.

#define REG_NORMAL_SIE_EP   0xFE65

Definition at line 331 of file reg.h.

#define REG_NORMAL_SIE_MAC_ADDR   0xFE70

Definition at line 333 of file reg.h.

#define REG_NORMAL_SIE_OPTIONAL   0xFE64

Definition at line 330 of file reg.h.

#define REG_NORMAL_SIE_PHY   0xFE68

Definition at line 332 of file reg.h.

#define REG_NORMAL_SIE_PID   0xFE62

Definition at line 329 of file reg.h.

#define REG_NORMAL_SIE_STRING   0xFE80

Definition at line 334 of file reg.h.

#define REG_NORMAL_SIE_VID   0xFE60

Definition at line 328 of file reg.h.

#define REG_NQOS_SEQ   0x04DC

Definition at line 206 of file reg.h.

#define REG_PBP   0x0104

Definition at line 94 of file reg.h.

#define REG_PCIE_CTRL_REG   0x0300

Definition at line 145 of file reg.h.

#define REG_PCIE_HCPWM   0x0363

Definition at line 159 of file reg.h.

#define REG_PCIE_HRPWM   0x0361

Definition at line 158 of file reg.h.

#define REG_PCIE_MIO_INTD   0x00E8

Definition at line 88 of file reg.h.

#define REG_PCIE_MIO_INTF   0x00E4

Definition at line 87 of file reg.h.

#define REG_PIFS   0x0512

Definition at line 218 of file reg.h.

#define REG_PKT_LIFE_TIME   0x04C0

Definition at line 201 of file reg.h.

#define REG_PKT_LOSE_RPT   0x04E1

Definition at line 209 of file reg.h.

#define REG_PKT_MON_CTRL   0x06B4

Definition at line 309 of file reg.h.

#define REG_PKTBUF_DBG_CTRL   0x0140

Definition at line 106 of file reg.h.

#define REG_PKTBUF_DBG_DATA_H   0x0148

Definition at line 108 of file reg.h.

#define REG_PKTBUF_DBG_DATA_L   0x0144

Definition at line 107 of file reg.h.

#define REG_POWER_STAGE1   0x04B4

Definition at line 199 of file reg.h.

#define REG_POWER_STAGE2   0x04B8

Definition at line 200 of file reg.h.

#define REG_POWER_STATUS   0x04A4

Definition at line 198 of file reg.h.

#define REG_PROT_MODE_CTRL   0x04C8

Definition at line 203 of file reg.h.

#define REG_PS_RX_INFO   0x0692

Definition at line 300 of file reg.h.

#define REG_PSSTATUS   0x0691

Definition at line 299 of file reg.h.

#define REG_PSTIMER   0x0580

Definition at line 247 of file reg.h.

#define REG_PTCL_ERR_STATUS   0x04E2

Definition at line 210 of file reg.h.

#define REG_PWR_DATA   0x0038

Definition at line 52 of file reg.h.

#define REG_QOS_SEQ   0x04DE

Definition at line 207 of file reg.h.

#define REG_R2T_SIFS   0x063C

Definition at line 277 of file reg.h.

#define REG_RA_TRY_RATE_AGG_LMT   0x04CF

Definition at line 205 of file reg.h.

#define REG_RARFRC   0x0438

Definition at line 185 of file reg.h.

#define REG_RCR   0x0608

Definition at line 262 of file reg.h.

#define REG_RD_CTRL   0x0524

Definition at line 229 of file reg.h.

#define REG_RD_NAV_NXT   0x0544

Definition at line 231 of file reg.h.

#define REG_RD_RESP_PKT_TH   0x0463

Definition at line 195 of file reg.h.

#define REG_RDG_PIFS   0x0513

Definition at line 219 of file reg.h.

#define REG_RESP_SIFS_CCK   0x063C

Definition at line 274 of file reg.h.

#define REG_RESP_SIFS_OFDM   0x063E

Definition at line 275 of file reg.h.

#define REG_RF_CTRL   0x001F

Definition at line 43 of file reg.h.

#define REG_RL   0x042A

Definition at line 183 of file reg.h.

#define REG_RQPN   0x0200

Definition at line 134 of file reg.h.

#define REG_RQPN_NPQ   0x0214

Definition at line 139 of file reg.h.

#define REG_RRSR   0x0440

Definition at line 186 of file reg.h.

#define REG_RSV_CTRL   0x001C

Definition at line 42 of file reg.h.

#define REG_RX_DESA   0x0340

Definition at line 154 of file reg.h.

#define REG_RX_DLK_TIME   0x060D

Definition at line 264 of file reg.h.

#define REG_RX_DRVINFO_SZ   0x060F

Definition at line 265 of file reg.h.

#define REG_RX_PKT_LIMIT   0x060C

Definition at line 263 of file reg.h.

#define REG_RXDMA_AGG_PG_TH   0x0280

Definition at line 141 of file reg.h.

#define REG_RXDMA_STATUS   0x0288

Definition at line 143 of file reg.h.

#define REG_RXERR_RPT   0x0664

Definition at line 289 of file reg.h.

#define REG_RXFF_PTR   0x011C

Definition at line 98 of file reg.h.

#define REG_RXFLTMAP0   0x06A0

Definition at line 304 of file reg.h.

#define REG_RXFLTMAP1   0x06A2

Definition at line 305 of file reg.h.

#define REG_RXFLTMAP2   0x06A4

Definition at line 306 of file reg.h.

#define REG_RXPKT_NUM   0x0284

Definition at line 142 of file reg.h.

#define REG_RXTSF_OFFSET_CCK   0x055E

Definition at line 243 of file reg.h.

#define REG_RXTSF_OFFSET_OFDM   0x055F

Definition at line 244 of file reg.h.

#define REG_SCH_TXCMD   0x05D0

Definition at line 257 of file reg.h.

#define REG_SECCFG   0x0680

Definition at line 296 of file reg.h.

#define REG_SIFS_CCK   0x0514

Definition at line 222 of file reg.h.

#define REG_SIFS_CTX   0x0514

Definition at line 220 of file reg.h.

#define REG_SIFS_OFDM   0x0516

Definition at line 223 of file reg.h.

#define REG_SIFS_TRX   0x0516

Definition at line 221 of file reg.h.

#define REG_SLOT   0x051B

Definition at line 225 of file reg.h.

#define REG_SPEC_SIFS   0x0428

Definition at line 182 of file reg.h.

#define REG_SPS0_CTRL   0x0011

Definition at line 40 of file reg.h.

#define REG_SPS_OCP_CFG   0x0018

Definition at line 41 of file reg.h.

#define REG_STBC_SETTING   0x04C4

Definition at line 202 of file reg.h.

#define REG_SYS_CFG   0x00F0

Definition at line 90 of file reg.h.

#define REG_SYS_CLKR   0x0008

Definition at line 36 of file reg.h.

#define REG_SYS_FUNC_EN   0x0002

Definition at line 34 of file reg.h.

#define REG_SYS_ISO_CTRL   0x0000

Definition at line 33 of file reg.h.

#define REG_T2T_SIFS   0x063E

Definition at line 279 of file reg.h.

#define REG_TBTT_PROHIBIT   0x0540

Definition at line 230 of file reg.h.

#define REG_TC0_CTRL   0x0150

Definition at line 110 of file reg.h.

#define REG_TC1_CTRL   0x0154

Definition at line 111 of file reg.h.

#define REG_TC2_CTRL   0x0158

Definition at line 112 of file reg.h.

#define REG_TC3_CTRL   0x015C

Definition at line 113 of file reg.h.

#define REG_TC4_CTRL   0x0160

Definition at line 114 of file reg.h.

#define REG_TCR   0x0604

Definition at line 261 of file reg.h.

#define REG_TCUNIT_BASE   0x0164

Definition at line 115 of file reg.h.

#define REG_TDECTRL   0x0208

Definition at line 136 of file reg.h.

#define REG_TEST_SIE_CHIRP_K   0xFE65

Definition at line 323 of file reg.h.

#define REG_TEST_SIE_MAC_ADDR   0xFE70

Definition at line 325 of file reg.h.

#define REG_TEST_SIE_OPTIONAL   0xFE64

Definition at line 322 of file reg.h.

#define REG_TEST_SIE_PHY   0xFE66

Definition at line 324 of file reg.h.

#define REG_TEST_SIE_PID   0xFE62

Definition at line 321 of file reg.h.

#define REG_TEST_SIE_STRING   0xFE80

Definition at line 326 of file reg.h.

#define REG_TEST_SIE_VID   0xFE60

Definition at line 320 of file reg.h.

#define REG_TEST_USB_TXQS   0xFE48

Definition at line 319 of file reg.h.

#define REG_TIMER0   0x0584

Definition at line 248 of file reg.h.

#define REG_TIMER1   0x0588

Definition at line 249 of file reg.h.

#define REG_TRXDMA_CTRL   0x010C

Definition at line 95 of file reg.h.

#define REG_TRXFF_BNDY   0x0114

Definition at line 96 of file reg.h.

#define REG_TRXFF_STATUS   0x0118

Definition at line 97 of file reg.h.

#define REG_TSFTR   0x0560

Definition at line 245 of file reg.h.

#define REG_TX_PTCL_CTRL   0x0520

Definition at line 226 of file reg.h.

#define REG_TXDMA_OFFSET_CHK   0x020C

Definition at line 137 of file reg.h.

#define REG_TXDMA_STATUS   0x0210

Definition at line 138 of file reg.h.

#define REG_TXPAUSE   0x0522

Definition at line 227 of file reg.h.

#define REG_TXPKTBUF_BCNQ_BDNY   0x0424

Definition at line 178 of file reg.h.

#define REG_TXPKTBUF_MGQ_BDNY   0x0425

Definition at line 179 of file reg.h.

#define REG_TXPKTBUF_WMAC_LBK_BF_HD   0x045D

Definition at line 193 of file reg.h.

#define REG_UART_CTRL   0x0364

Definition at line 160 of file reg.h.

#define REG_UART_RX_DESA   0x0378

Definition at line 162 of file reg.h.

#define REG_UART_TX_DESA   0x0370

Definition at line 161 of file reg.h.

#define REG_USB_AGG_TH   0xFE5D

Definition at line 696 of file reg.h.

#define REG_USB_AGG_TH   0xFE5D

Definition at line 696 of file reg.h.

#define REG_USB_AGG_TO   0xFE5C

Definition at line 695 of file reg.h.

#define REG_USB_AGG_TO   0xFE5C

Definition at line 695 of file reg.h.

#define REG_USB_CHIRP_K   0xFE65

Definition at line 701 of file reg.h.

#define REG_USB_DMA_AGG_TO   0xFE5B

Definition at line 694 of file reg.h.

#define REG_USB_DMA_AGG_TO   0xFE5B

Definition at line 694 of file reg.h.

#define REG_USB_HCPWM   0xFE57

Definition at line 705 of file reg.h.

#define REG_USB_HRPWM   0xFE58

Definition at line 704 of file reg.h.

#define REG_USB_INFO   0xFE17

Definition at line 691 of file reg.h.

#define REG_USB_INFO   0xFE17

Definition at line 691 of file reg.h.

#define REG_USB_MAC_ADDR   0xFE70

Definition at line 703 of file reg.h.

#define REG_USB_OPTIONAL   0xFE64

Definition at line 700 of file reg.h.

#define REG_USB_PHY   0xFE66

Definition at line 702 of file reg.h.

#define REG_USB_PID   0xFE62

Definition at line 699 of file reg.h.

#define REG_USB_SIE_INTF   0x00E0

Definition at line 86 of file reg.h.

#define REG_USB_SPECIAL_OPTION   0xFE55

Definition at line 692 of file reg.h.

#define REG_USB_SPECIAL_OPTION   0xFE55

Definition at line 692 of file reg.h.

#define REG_USB_VID   0xFE60

Definition at line 698 of file reg.h.

#define REG_USTIME_EDCA   0x0638

Definition at line 272 of file reg.h.

#define REG_USTIME_TSF   0x0551

Definition at line 234 of file reg.h.

#define REG_VI_ADMTIME   0x05C6

Definition at line 254 of file reg.h.

#define REG_VIQ_DESA   0x0328

Definition at line 151 of file reg.h.

#define REG_VIQ_INFORMATION   0x0404

Definition at line 168 of file reg.h.

#define REG_VO_ADMTIME   0x05C4

Definition at line 253 of file reg.h.

#define REG_VOQ_DESA   0x0320

Definition at line 150 of file reg.h.

#define REG_VOQ_INFORMATION   0x0400

Definition at line 167 of file reg.h.

#define REG_WKFMCAM_CMD   0x0698

Definition at line 302 of file reg.h.

#define REG_WKFMCAM_RWD   0x069C

Definition at line 303 of file reg.h.

#define REG_WMAC_RESP_TXINFO   0x06D8

Definition at line 311 of file reg.h.

#define REG_WMAC_TRXPTCL_CTL   0x0668

Definition at line 290 of file reg.h.

#define REG_WOW_CTRL   0x0690

Definition at line 298 of file reg.h.

#define RETRY_LIMIT_LONG_SHIFT   0

Definition at line 1040 of file reg.h.

#define RETRY_LIMIT_SHORT_SHIFT   8

Definition at line 1039 of file reg.h.

#define RF_AC   0x00

Definition at line 1447 of file reg.h.

#define RF_BIAS   0x14

Definition at line 1464 of file reg.h.

#define RF_BS_IQGEN   0x0F

Definition at line 1457 of file reg.h.

#define RF_CHNLBW   0x18

Definition at line 1469 of file reg.h.

#define RF_EN   BIT(0)

Definition at line 795 of file reg.h.

#define RF_GAIN_RX   0x06

Definition at line 1453 of file reg.h.

#define RF_GAIN_TX   0x07

Definition at line 1454 of file reg.h.

#define RF_IPA   0x15

Definition at line 1465 of file reg.h.

#define RF_IQADJ_G1   0x01

Definition at line 1449 of file reg.h.

#define RF_IQADJ_G2   0x02

Definition at line 1450 of file reg.h.

#define RF_MODE1   0x10

Definition at line 1459 of file reg.h.

#define RF_MODE2   0x11

Definition at line 1460 of file reg.h.

#define RF_MODE_AG   0x18

Definition at line 1467 of file reg.h.

#define RF_OPTION1   0x79

Definition at line 647 of file reg.h.

#define RF_OPTION1   0x79

Definition at line 647 of file reg.h.

#define RF_OPTION2   0x7A

Definition at line 648 of file reg.h.

#define RF_OPTION2   0x7A

Definition at line 648 of file reg.h.

#define RF_OPTION3   0x7B

Definition at line 649 of file reg.h.

#define RF_OPTION3   0x7B

Definition at line 649 of file reg.h.

#define RF_OPTION4   0x7C

Definition at line 650 of file reg.h.

#define RF_OPTION4   0x7C

Definition at line 650 of file reg.h.

#define RF_POW_ABILITY   0x17

Definition at line 1466 of file reg.h.

#define RF_POW_TRSW   0x05

Definition at line 1451 of file reg.h.

#define RF_RCK1   0x1E

Definition at line 1478 of file reg.h.

#define RF_RCK2   0x1F

Definition at line 1479 of file reg.h.

#define RF_RCK_OS   0x30

Definition at line 1497 of file reg.h.

#define RF_RL_ID   (BIT(31) | BIT(30) | BIT(29) | BIT(28))

Definition at line 906 of file reg.h.

#define RF_RSTB   BIT(1)

Definition at line 796 of file reg.h.

#define RF_RX_AGC_HP   0x12

Definition at line 1462 of file reg.h.

#define RF_RX_BB1   0x1D

Definition at line 1476 of file reg.h.

#define RF_RX_BB2   0x1C

Definition at line 1475 of file reg.h.

#define RF_RX_G1   0x1A

Definition at line 1472 of file reg.h.

#define RF_RX_G2   0x1B

Definition at line 1473 of file reg.h.

#define RF_SDMRSTB   BIT(2)

Definition at line 797 of file reg.h.

#define RF_SYN_G1   0x25

Definition at line 1488 of file reg.h.

#define RF_SYN_G2   0x26

Definition at line 1489 of file reg.h.

#define RF_SYN_G3   0x27

Definition at line 1490 of file reg.h.

#define RF_SYN_G4   0x28

Definition at line 1491 of file reg.h.

#define RF_SYN_G5   0x29

Definition at line 1492 of file reg.h.

#define RF_SYN_G6   0x2A

Definition at line 1493 of file reg.h.

#define RF_SYN_G7   0x2B

Definition at line 1494 of file reg.h.

#define RF_SYN_G8   0x2C

Definition at line 1495 of file reg.h.

#define RF_T_METER   0x24

Definition at line 1486 of file reg.h.

#define RF_TOP   0x19

Definition at line 1470 of file reg.h.

#define RF_TX_AGC   0x13

Definition at line 1463 of file reg.h.

#define RF_TX_BB1   0x23

Definition at line 1485 of file reg.h.

#define RF_TX_G1   0x20

Definition at line 1481 of file reg.h.

#define RF_TX_G2   0x21

Definition at line 1482 of file reg.h.

#define RF_TX_G3   0x22

Definition at line 1483 of file reg.h.

#define RF_TXM_IDAC   0x08

Definition at line 1456 of file reg.h.

#define RF_TXPA_G1   0x31

Definition at line 1498 of file reg.h.

#define RF_TXPA_G2   0x32

Definition at line 1499 of file reg.h.

#define RF_TXPA_G3   0x33

Definition at line 1500 of file reg.h.

#define RFINI_RDY   BIT(5)

Definition at line 883 of file reg.h.

#define RFPGA0_ANALOGPARAMETER1   0x880

Definition at line 1274 of file reg.h.

#define RFPGA0_ANALOGPARAMETER2   0x884

Definition at line 1275 of file reg.h.

#define RFPGA0_ANALOGPARAMETER3   0x888

Definition at line 1276 of file reg.h.

#define RFPGA0_ANALOGPARAMETER4   0x88c

Definition at line 1277 of file reg.h.

#define RFPGA0_PSDFUNCTION   0x808

Definition at line 1244 of file reg.h.

#define RFPGA0_PSDREPORT   0x8b4

Definition at line 1284 of file reg.h.

#define RFPGA0_RFMOD   0x800

Definition at line 1241 of file reg.h.

#define RFPGA0_RFSLEEPUPPARAMETER   0x854

Definition at line 1260 of file reg.h.

#define RFPGA0_RFTIMING1   0x810

Definition at line 1248 of file reg.h.

#define RFPGA0_RFTIMING2   0x814

Definition at line 1249 of file reg.h.

#define RFPGA0_RFWAKEUPPARAMETER   0x850

Definition at line 1259 of file reg.h.

#define RFPGA0_TXGAINSTAGE   0x80c

Definition at line 1246 of file reg.h.

#define RFPGA0_TXINFO   0x804

Definition at line 1243 of file reg.h.

#define RFPGA0_XA_HSSIPARAMETER1   0x820

Definition at line 1251 of file reg.h.

#define RFPGA0_XA_HSSIPARAMETER2   0x824

Definition at line 1252 of file reg.h.

#define RFPGA0_XA_LSSIPARAMETER   0x840

Definition at line 1256 of file reg.h.

#define RFPGA0_XA_LSSIREADBACK   0x8a0

Definition at line 1279 of file reg.h.

#define RFPGA0_XA_RFINTERFACEOE   0x860

Definition at line 1265 of file reg.h.

#define RFPGA0_XAB_RFINTERFACERB   0x8e0

Definition at line 1287 of file reg.h.

#define RFPGA0_XAB_RFINTERFACESW   0x870

Definition at line 1268 of file reg.h.

#define rFPGA0_XAB_RFPARAMETER   0x878

Definition at line 1271 of file reg.h.

#define RFPGA0_XAB_SWITCHCONTROL   0x858

Definition at line 1262 of file reg.h.

#define RFPGA0_XB_HSSIPARAMETER1   0x828

Definition at line 1253 of file reg.h.

#define RFPGA0_XB_HSSIPARAMETER2   0x82c

Definition at line 1254 of file reg.h.

#define RFPGA0_XB_LSSIPARAMETER   0x844

Definition at line 1257 of file reg.h.

#define RFPGA0_XB_LSSIREADBACK   0x8a4

Definition at line 1280 of file reg.h.

#define RFPGA0_XB_RFINTERFACEOE   0x864

Definition at line 1266 of file reg.h.

#define RFPGA0_XC_LSSIREADBACK   0x8a8

Definition at line 1281 of file reg.h.

#define RFPGA0_XCD_RFINTERFACERB   0x8e4

Definition at line 1288 of file reg.h.

#define RFPGA0_XCD_RFINTERFACESW   0x874

Definition at line 1269 of file reg.h.

#define rFPGA0_XCD_RFPARAMETER   0x87c

Definition at line 1272 of file reg.h.

#define RFPGA0_XCD_SWITCHCONTROL   0x85c

Definition at line 1263 of file reg.h.

#define RFPGA0_XD_LSSIREADBACK   0x8ac

Definition at line 1282 of file reg.h.

#define RFPGA1_DEBUGSELECT   0x908

Definition at line 1293 of file reg.h.

#define RFPGA1_RFMOD   0x900

Definition at line 1290 of file reg.h.

#define RFPGA1_TXBLOCK   0x904

Definition at line 1292 of file reg.h.

#define RFPGA1_TXINFO   0x90c

Definition at line 1294 of file reg.h.

#define RFREG_OFFSET_MASK   0xfffff

Definition at line 2080 of file reg.h.

#define RGLOBALCTRL   0

Definition at line 1440 of file reg.h.

#define RIGHT_ANTENNA   0x1

Definition at line 2086 of file reg.h.

#define RING_CLK_EN   BIT(13)

Definition at line 777 of file reg.h.

#define ROFDM0_AGCPARAMETER1   0xc70

Definition at line 1352 of file reg.h.

#define ROFDM0_AGCPARAMETER2   0xc74

Definition at line 1353 of file reg.h.

#define ROFDM0_AGCRSSITABLE   0xc78

Definition at line 1354 of file reg.h.

#define ROFDM0_CCADROPTHRESHOLD   0xc48

Definition at line 1340 of file reg.h.

#define ROFDM0_CFOANDDAGC   0xc44

Definition at line 1339 of file reg.h.

#define ROFDM0_DFSREPORT   0xcf4

Definition at line 1371 of file reg.h.

#define ROFDM0_ECCATHRESHOLD   0xc4c

Definition at line 1341 of file reg.h.

#define ROFDM0_FRAMESYNC   0xcf0

Definition at line 1370 of file reg.h.

#define ROFDM0_HTSTFAGC   0xc7c

Definition at line 1355 of file reg.h.

#define ROFDM0_LSTF   0xc00

Definition at line 1318 of file reg.h.

#define ROFDM0_RXDETECTOR1   0xc30

Definition at line 1333 of file reg.h.

#define ROFDM0_RXDETECTOR2   0xc34

Definition at line 1334 of file reg.h.

#define ROFDM0_RXDETECTOR3   0xc38

Definition at line 1335 of file reg.h.

#define ROFDM0_RXDETECTOR4   0xc3c

Definition at line 1336 of file reg.h.

#define ROFDM0_RXDSP   0xc40

Definition at line 1338 of file reg.h.

#define ROFDM0_RXHPPARAMETER   0xce0

Definition at line 1368 of file reg.h.

#define ROFDM0_RXIQEXTANTA   0xca0

Definition at line 1366 of file reg.h.

#define ROFDM0_TRMUXPAR   0xc08

Definition at line 1321 of file reg.h.

#define ROFDM0_TRSWISOLATION   0xc0c

Definition at line 1322 of file reg.h.

#define ROFDM0_TRXPATHENABLE   0xc04

Definition at line 1320 of file reg.h.

#define ROFDM0_TXCOEFF1   0xca4

Definition at line 1372 of file reg.h.

#define ROFDM0_TXCOEFF2   0xca8

Definition at line 1373 of file reg.h.

#define ROFDM0_TXCOEFF3   0xcac

Definition at line 1374 of file reg.h.

#define ROFDM0_TXCOEFF4   0xcb0

Definition at line 1375 of file reg.h.

#define ROFDM0_TXCOEFF5   0xcb4

Definition at line 1376 of file reg.h.

#define ROFDM0_TXCOEFF6   0xcb8

Definition at line 1377 of file reg.h.

#define ROFDM0_TXPSEUDONOISEWGT   0xce4

Definition at line 1369 of file reg.h.

#define ROFDM0_XAAGCCORE1   0xc50

Definition at line 1343 of file reg.h.

#define ROFDM0_XAAGCCORE2   0xc54

Definition at line 1344 of file reg.h.

#define ROFDM0_XARXAFE   0xc10

Definition at line 1324 of file reg.h.

#define ROFDM0_XARXIQIMBALANCE   0xc14

Definition at line 1325 of file reg.h.

#define ROFDM0_XATXAFE   0xc84

Definition at line 1358 of file reg.h.

#define ROFDM0_XATXIQIMBALANCE   0xc80

Definition at line 1357 of file reg.h.

#define ROFDM0_XBAGCCORE1   0xc58

Definition at line 1345 of file reg.h.

#define ROFDM0_XBAGCCORE2   0xc5c

Definition at line 1346 of file reg.h.

#define ROFDM0_XBRXAFE   0xc18

Definition at line 1326 of file reg.h.

#define ROFDM0_XBRXIQIMBALANCE   0xc1c

Definition at line 1327 of file reg.h.

#define ROFDM0_XBTXAFE   0xc8c

Definition at line 1360 of file reg.h.

#define ROFDM0_XBTXIQIMBALANCE   0xc88

Definition at line 1359 of file reg.h.

#define ROFDM0_XCAGCCORE1   0xc60

Definition at line 1347 of file reg.h.

#define ROFDM0_XCAGCCORE2   0xc64

Definition at line 1348 of file reg.h.

#define ROFDM0_XCRXAFE   0xc20

Definition at line 1328 of file reg.h.

#define ROFDM0_XCRXIQIMBANLANCE   0xc24

Definition at line 1329 of file reg.h.

#define ROFDM0_XCTXAFE   0xc94

Definition at line 1362 of file reg.h.

#define ROFDM0_XCTXIQIMBALANCE   0xc90

Definition at line 1361 of file reg.h.

#define ROFDM0_XDAGCCORE1   0xc68

Definition at line 1349 of file reg.h.

#define ROFDM0_XDAGCCORE2   0xc6c

Definition at line 1350 of file reg.h.

#define ROFDM0_XDRXAFE   0xc28

Definition at line 1330 of file reg.h.

#define ROFDM0_XDRXIQIMBALANCE   0xc2c

Definition at line 1331 of file reg.h.

#define ROFDM0_XDTXAFE   0xc9c

Definition at line 1364 of file reg.h.

#define ROFDM0_XDTXIQIMBALANCE   0xc98

Definition at line 1363 of file reg.h.

#define ROFDM1_CF0   0xd08

Definition at line 1382 of file reg.h.

#define ROFDM1_CFOTRACKING   0xd2c

Definition at line 1386 of file reg.h.

#define ROFDM1_CSI1   0xd10

Definition at line 1383 of file reg.h.

#define ROFDM1_CSI2   0xd18

Definition at line 1385 of file reg.h.

#define ROFDM1_INTFDET   0xd3c

Definition at line 1388 of file reg.h.

#define ROFDM1_LSTF   0xd00

Definition at line 1379 of file reg.h.

#define ROFDM1_PSEUDONOISESTATEAB   0xd50

Definition at line 1389 of file reg.h.

#define ROFDM1_PSEUDONOISESTATECD   0xd54

Definition at line 1390 of file reg.h.

#define ROFDM1_RXPSEUDONOISEWGT   0xd58

Definition at line 1391 of file reg.h.

#define ROFDM1_SBD   0xd14

Definition at line 1384 of file reg.h.

#define ROFDM1_TRXMESAURE1   0xd34

Definition at line 1387 of file reg.h.

#define ROFDM1_TRXPATHENABLE   0xd04

Definition at line 1380 of file reg.h.

#define ROFDM_AGCREPORT   0xdd0

Definition at line 1406 of file reg.h.

#define ROFDM_BWREPORT   0xdcc

Definition at line 1405 of file reg.h.

#define ROFDM_LONGCFOAB   0xdb4

Definition at line 1399 of file reg.h.

#define ROFDM_LONGCFOCD   0xdb8

Definition at line 1400 of file reg.h.

#define ROFDM_PHYCOUNTER1   0xda0

Definition at line 1393 of file reg.h.

#define ROFDM_PHYCOUNTER2   0xda4

Definition at line 1394 of file reg.h.

#define ROFDM_PHYCOUNTER3   0xda8

Definition at line 1395 of file reg.h.

#define ROFDM_PWMEASURE1   0xdc4

Definition at line 1403 of file reg.h.

#define ROFDM_PWMEASURE2   0xdc8

Definition at line 1404 of file reg.h.

#define ROFDM_RXEVMCSI   0xdd8

Definition at line 1408 of file reg.h.

#define ROFDM_RXSNR   0xdd4

Definition at line 1407 of file reg.h.

#define ROFDM_SHORTCFOAB   0xdac

Definition at line 1397 of file reg.h.

#define ROFDM_SHORTCFOCD   0xdb0

Definition at line 1398 of file reg.h.

#define ROFDM_SIGREPORT   0xddc

Definition at line 1409 of file reg.h.

#define ROFDM_TAILCF0AB   0xdbc

Definition at line 1401 of file reg.h.

#define ROFDM_TAILCF0CD   0xdc0

Definition at line 1402 of file reg.h.

#define ROP_ALD   BIT(20)

Definition at line 756 of file reg.h.

#define ROP_PWR   BIT(21)

Definition at line 757 of file reg.h.

#define ROP_SPS   BIT(22)

Definition at line 758 of file reg.h.

#define RPMAC_CCKCRC16   0x148

Definition at line 1231 of file reg.h.

#define RPMAC_CCKCRXRC16ER   0x180

Definition at line 1236 of file reg.h.

#define RPMAC_CCKCRXRC32ER   0x184

Definition at line 1237 of file reg.h.

#define RPMAC_CCKCRXRC32OK   0x188

Definition at line 1238 of file reg.h.

#define RPMAC_CCKPLCPHEADER   0x144

Definition at line 1230 of file reg.h.

#define RPMAC_CCKPLCPPREAMBLE   0x140

Definition at line 1229 of file reg.h.

#define RPMAC_OFDMRXCRC32Er   0x174

Definition at line 1233 of file reg.h.

#define RPMAC_OFDMRXCRC32OK   0x170

Definition at line 1232 of file reg.h.

#define RPMAC_OFDMRXCRC8ER   0x17c

Definition at line 1235 of file reg.h.

#define RPMAC_OFDMRXPARITYER   0x178

Definition at line 1234 of file reg.h.

#define RPMAC_PHYDEBUG   0x114

Definition at line 1218 of file reg.h.

#define RPMAC_RESET   0x100

Definition at line 1213 of file reg.h.

#define RPMAC_TXDADATYPE   0x138

Definition at line 1227 of file reg.h.

#define RPMAC_TXHTSIG1   0x10c

Definition at line 1216 of file reg.h.

#define RPMAC_TXHTSIG2   0x110

Definition at line 1217 of file reg.h.

#define RPMAC_TXIDLE   0x11c

Definition at line 1220 of file reg.h.

#define RPMAC_TXLEGACYSIG   0x108

Definition at line 1215 of file reg.h.

#define RPMAC_TXMACHEADER0   0x120

Definition at line 1221 of file reg.h.

#define RPMAC_TXMACHEADER1   0x124

Definition at line 1222 of file reg.h.

#define RPMAC_TXMACHEADER2   0x128

Definition at line 1223 of file reg.h.

#define RPMAC_TXMACHEADER3   0x12c

Definition at line 1224 of file reg.h.

#define RPMAC_TXMACHEADER4   0x130

Definition at line 1225 of file reg.h.

#define RPMAC_TXMACHEADER5   0x134

Definition at line 1226 of file reg.h.

#define RPMAC_TXPACKETNUM   0x118

Definition at line 1219 of file reg.h.

#define RPMAC_TXRANDOMSEED   0x13c

Definition at line 1228 of file reg.h.

#define RPMAC_TXSTART   0x104

Definition at line 1214 of file reg.h.

#define RPMAC_TXSTATUS   0x18c

Definition at line 1239 of file reg.h.

#define RRFCHANNEL   0x18

Definition at line 1468 of file reg.h.

#define RRSR_11M   BIT(3)

Definition at line 388 of file reg.h.

#define RRSR_12M   BIT(6)

Definition at line 391 of file reg.h.

#define RRSR_18M   BIT(7)

Definition at line 392 of file reg.h.

#define RRSR_1M   BIT(0)

Definition at line 385 of file reg.h.

#define RRSR_24M   BIT(8)

Definition at line 393 of file reg.h.

#define RRSR_2M   BIT(1)

Definition at line 386 of file reg.h.

#define RRSR_36M   BIT(9)

Definition at line 394 of file reg.h.

#define RRSR_48M   BIT(10)

Definition at line 395 of file reg.h.

#define RRSR_54M   BIT(11)

Definition at line 396 of file reg.h.

#define RRSR_5_5M   BIT(2)

Definition at line 387 of file reg.h.

#define RRSR_6M   BIT(4)

Definition at line 389 of file reg.h.

#define RRSR_9M   BIT(5)

Definition at line 390 of file reg.h.

#define RRSR_MCS0   BIT(12)

Definition at line 397 of file reg.h.

#define RRSR_MCS1   BIT(13)

Definition at line 398 of file reg.h.

#define RRSR_MCS2   BIT(14)

Definition at line 399 of file reg.h.

#define RRSR_MCS3   BIT(15)

Definition at line 400 of file reg.h.

#define RRSR_MCS4   BIT(16)

Definition at line 401 of file reg.h.

#define RRSR_MCS5   BIT(17)

Definition at line 402 of file reg.h.

#define RRSR_MCS6   BIT(18)

Definition at line 403 of file reg.h.

#define RRSR_MCS7   BIT(19)

Definition at line 404 of file reg.h.

#define RRSR_RSC_BW_40M   0x600000

Definition at line 381 of file reg.h.

#define RRSR_RSC_DUPLICATE_MODE   0x3

Definition at line 1026 of file reg.h.

#define RRSR_RSC_LOWER_SUBCHANNEL   0x2

Definition at line 1025 of file reg.h.

#define RRSR_RSC_LOWSUBCHNL   0x200000

Definition at line 383 of file reg.h.

#define RRSR_RSC_OFFSET   21

Definition at line 379 of file reg.h.

#define RRSR_RSC_RESERVED   0x0

Definition at line 1023 of file reg.h.

#define RRSR_RSC_UPPER_SUBCHANNEL   0x1

Definition at line 1024 of file reg.h.

#define RRSR_RSC_UPSUBCHNL   0x400000

Definition at line 382 of file reg.h.

#define RRSR_SHORT   0x800000

Definition at line 384 of file reg.h.

#define RRSR_SHORT_OFFSET   23

Definition at line 380 of file reg.h.

#define RRTL8256_RXLPF   11

Definition at line 1442 of file reg.h.

#define RRTL8256_TXLPF   19

Definition at line 1441 of file reg.h.

#define RRTL8258_RSSILPF   0xa

Definition at line 1445 of file reg.h.

#define RRTL8258_RXLPF   0x13

Definition at line 1444 of file reg.h.

#define RRTL8258_TXLPF   0x11

Definition at line 1443 of file reg.h.

#define RSM_EN   BIT(0)

Definition at line 858 of file reg.h.

#define RSV_CTRL   0x001C

Definition at line 688 of file reg.h.

#define RTL8190_EEPROM_ID   0x8129

Definition at line 599 of file reg.h.

#define RTL8192_EEPROM_ID   0x8129

Definition at line 597 of file reg.h.

#define RTXAGC_A_CCK1_MCS32   0xe08

Definition at line 1413 of file reg.h.

#define RTXAGC_A_MCS03_MCS00   0xe10

Definition at line 1414 of file reg.h.

#define RTXAGC_A_MCS07_MCS04   0xe14

Definition at line 1415 of file reg.h.

#define RTXAGC_A_MCS11_MCS08   0xe18

Definition at line 1416 of file reg.h.

#define RTXAGC_A_MCS15_MCS12   0xe1c

Definition at line 1417 of file reg.h.

#define RTXAGC_A_RATE18_06   0xe00

Definition at line 1411 of file reg.h.

#define RTXAGC_A_RATE54_24   0xe04

Definition at line 1412 of file reg.h.

#define RTXAGC_B_CCK11_A_CCK2_11   0x86c

Definition at line 1426 of file reg.h.

#define RTXAGC_B_CCK1_55_MCS32   0x838

Definition at line 1421 of file reg.h.

#define RTXAGC_B_MCS03_MCS00   0x83c

Definition at line 1422 of file reg.h.

#define RTXAGC_B_MCS07_MCS04   0x848

Definition at line 1423 of file reg.h.

#define RTXAGC_B_MCS11_MCS08   0x84c

Definition at line 1424 of file reg.h.

#define RTXAGC_B_MCS15_MCS12   0x868

Definition at line 1425 of file reg.h.

#define RTXAGC_B_RATE18_06   0x830

Definition at line 1419 of file reg.h.

#define RTXAGC_B_RATE54_24   0x834

Definition at line 1420 of file reg.h.

#define RXDMA_AGG_EN   BIT(2)

Definition at line 954 of file reg.h.

#define RXDMA_ARBBW_EN   BIT(0)

Definition at line 952 of file reg.h.

#define RXDMA_EN   BIT(3)

Definition at line 916 of file reg.h.

#define RXERR_COUNTER_MASK   0xFFFFF

Definition at line 1168 of file reg.h.

#define RXERR_RPT_RST   BIT(27)

Definition at line 1169 of file reg.h.

#define RXERR_TYPE_CCK_FALSE_ALARM   5

Definition at line 1158 of file reg.h.

#define RXERR_TYPE_CCK_MPDU_FAIL   7

Definition at line 1160 of file reg.h.

#define RXERR_TYPE_CCK_MPDU_OK   6

Definition at line 1159 of file reg.h.

#define RXERR_TYPE_CCK_PPDU   4

Definition at line 1157 of file reg.h.

#define RXERR_TYPE_HT_FALSE_ALARM   9

Definition at line 1162 of file reg.h.

#define RXERR_TYPE_HT_MPDU_FAIL   12

Definition at line 1165 of file reg.h.

#define RXERR_TYPE_HT_MPDU_OK   11

Definition at line 1164 of file reg.h.

#define RXERR_TYPE_HT_MPDU_TOTAL   10

Definition at line 1163 of file reg.h.

#define RXERR_TYPE_HT_PPDU   8

Definition at line 1161 of file reg.h.

#define RXERR_TYPE_OFDM_FALSE_ALARM   1

Definition at line 1154 of file reg.h.

#define RXERR_TYPE_OFDM_MPDU_FAIL   3

Definition at line 1156 of file reg.h.

#define RXERR_TYPE_OFDM_MPDU_OK   2

Definition at line 1155 of file reg.h.

#define RXERR_TYPE_OFDM_PPDU   0

Definition at line 1153 of file reg.h.

#define RXERR_TYPE_RX_FULL_DROP   15

Definition at line 1166 of file reg.h.

#define RXSHFT_EN   BIT(1)

Definition at line 953 of file reg.h.

#define RZEBRA1_AGC   0x4

Definition at line 1431 of file reg.h.

#define RZEBRA1_CHANNEL   0x7

Definition at line 1433 of file reg.h.

#define RZEBRA1_CHARGEPUMP   0x5

Definition at line 1432 of file reg.h.

#define RZEBRA1_HSSIENABLE   0x0

Definition at line 1428 of file reg.h.

#define RZEBRA1_RXHPFCORNER   0xc

Definition at line 1438 of file reg.h.

#define RZEBRA1_RXLPF   0xb

Definition at line 1437 of file reg.h.

#define RZEBRA1_TRXENABLE1   0x1

Definition at line 1429 of file reg.h.

#define RZEBRA1_TRXENABLE2   0x2

Definition at line 1430 of file reg.h.

#define RZEBRA1_TXGAIN   0x8

Definition at line 1435 of file reg.h.

#define RZEBRA1_TXLPF   0x9

Definition at line 1436 of file reg.h.

#define SCHEDULE_EN   BIT(5)

Definition at line 918 of file reg.h.

#define SCR_NoSKMC   BIT(5)

Definition at line 1177 of file reg.h.

#define SCR_RXBCUSEDK   BIT(7)

Definition at line 1179 of file reg.h.

#define SCR_RxDecEnable   BIT(3)

Definition at line 1175 of file reg.h.

#define SCR_RXSEC_ENABLE   0x04

Definition at line 498 of file reg.h.

#define SCR_RxUseDK   BIT(1)

Definition at line 1173 of file reg.h.

#define SCR_SKByA2   BIT(4)

Definition at line 1176 of file reg.h.

#define SCR_TXBCUSEDK   BIT(6)

Definition at line 1178 of file reg.h.

#define SCR_TxEncEnable   BIT(2)

Definition at line 1174 of file reg.h.

#define SCR_TXSEC_ENABLE   0x02

Definition at line 497 of file reg.h.

#define SCR_TxUseDK   BIT(0)

Definition at line 1172 of file reg.h.

#define SCR_USEDK   0x01

Definition at line 496 of file reg.h.

#define SEC_CLK_EN   BIT(10)

Definition at line 774 of file reg.h.

#define SIC_23   BIT(13)

Definition at line 870 of file reg.h.

#define SIC_IDLE   BIT(8)

Definition at line 894 of file reg.h.

#define SIC_LBK   BIT(15)

Definition at line 872 of file reg.h.

#define SIC_SWRST   BIT(11)

Definition at line 868 of file reg.h.

#define SOP_A8M   BIT(30)

Definition at line 764 of file reg.h.

#define SOP_ABG   BIT(27)

Definition at line 761 of file reg.h.

#define SOP_AMB   BIT(28)

Definition at line 762 of file reg.h.

#define SOP_FUSE   BIT(26)

Definition at line 760 of file reg.h.

#define SOP_MRST   BIT(25)

Definition at line 759 of file reg.h.

#define SOP_RCK   BIT(29)

Definition at line 763 of file reg.h.

#define STOP_BCNQ   BIT(6)

Definition at line 1093 of file reg.h.

#define STOPBE   BIT(1)

Definition at line 657 of file reg.h.

#define STOPBECON   BIT(6)

Definition at line 652 of file reg.h.

#define STOPBK   BIT(0)

Definition at line 658 of file reg.h.

#define STOPHIGHT   BIT(5)

Definition at line 653 of file reg.h.

#define STOPMGT   BIT(4)

Definition at line 654 of file reg.h.

#define STOPVI   BIT(2)

Definition at line 656 of file reg.h.

#define STOPVO   BIT(3)

Definition at line 655 of file reg.h.

#define SUS_HOST   BIT(17)

Definition at line 755 of file reg.h.

#define SW18_FPWM   BIT(3)

Definition at line 707 of file reg.h.

#define SYS_CLK_EN   BIT(12)

Definition at line 776 of file reg.h.

#define TCHECK_TXSTATUS   500

Definition at line 2088 of file reg.h.

#define Timer_EN   BIT(4)

Definition at line 859 of file reg.h.

#define TOTAL_CAM_ENTRY   32

Definition at line 489 of file reg.h.

#define TRANSCEIVEA_HSPI_READBACK   0x8b8

Definition at line 1285 of file reg.h.

#define TRANSCEIVEB_HSPI_READBACK   0x8bc

Definition at line 1286 of file reg.h.

#define TRP_B15V_EN   BIT(7)

Definition at line 893 of file reg.h.

#define TRP_BT_EN   BIT(24)

Definition at line 902 of file reg.h.

#define TRP_VAUX_EN   BIT(23)

Definition at line 901 of file reg.h.

#define TRSW0EN   BIT(2)

Definition at line 861 of file reg.h.

#define TRSW1EN   BIT(3)

Definition at line 862 of file reg.h.

#define TSFR   REG_TSFTR

Definition at line 339 of file reg.h.

#define TSFRST   BIT(0)

Definition at line 1115 of file reg.h.

#define TSFTR1_RST   BIT(1)

Definition at line 1091 of file reg.h.

#define TSFTR_RST   BIT(0)

Definition at line 1090 of file reg.h.

#define TUPDATE_RXCOUNTER   100

Definition at line 2089 of file reg.h.

#define TXDMA_EN   BIT(2)

Definition at line 915 of file reg.h.

#define TYPE_ID   BIT(27)

Definition at line 905 of file reg.h.

#define Uart_910   BIT(9)

Definition at line 866 of file reg.h.

#define UC_DATA_EN   BIT(16)

Definition at line 1139 of file reg.h.

#define UCLK_VLD   BIT(2)

Definition at line 889 of file reg.h.

#define UNUSED_REGISTER   0x1BF

Definition at line 349 of file reg.h.

#define USB_AGG_EN   BIT(3)

Definition at line 1191 of file reg.h.

#define USB_IS_FULL_SPEED   1

Definition at line 1182 of file reg.h.

#define USB_IS_HIGH_SPEED   0

Definition at line 1181 of file reg.h.

#define USB_NORMAL_SIE_EP_MASK   0xF

Definition at line 1185 of file reg.h.

#define USB_NORMAL_SIE_EP_SHIFT   4

Definition at line 1186 of file reg.h.

#define USB_SPEED_MASK   BIT(5)

Definition at line 1183 of file reg.h.

#define USB_TEST_EP_MASK   0x30

Definition at line 1188 of file reg.h.

#define USB_TEST_EP_SHIFT   4

Definition at line 1189 of file reg.h.

#define USE_SHORT_G1   BIT(20)

Definition at line 1028 of file reg.h.

#define V15_VLD   BIT(5)

Definition at line 892 of file reg.h.

#define VENDOR_ID   BIT(19)

Definition at line 899 of file reg.h.

#define WINTINI_RDY   BIT(6)

Definition at line 884 of file reg.h.

#define WL_HWPDN_EN   BIT(0)

Definition at line 1209 of file reg.h.

#define WLOCK_00   BIT(1)

Definition at line 787 of file reg.h.

#define WLOCK_04   BIT(2)

Definition at line 788 of file reg.h.

#define WLOCK_08   BIT(3)

Definition at line 789 of file reg.h.

#define WLOCK_40   BIT(4)

Definition at line 790 of file reg.h.

#define WLOCK_ALL   BIT(0)

Definition at line 786 of file reg.h.

#define WOW_MAGIC   BIT(2)

Definition at line 502 of file reg.h.

#define WOW_PMEN   BIT(0)

Definition at line 500 of file reg.h.

#define WOW_UWF   BIT(3)

Definition at line 503 of file reg.h.

#define WOW_WOMEN   BIT(1)

Definition at line 501 of file reg.h.

#define XCLK_VLD   BIT(0)

Definition at line 887 of file reg.h.

#define XOP_BTCK   BIT(31)

Definition at line 765 of file reg.h.

#define XTAL_BSEL   BIT(1)

Definition at line 812 of file reg.h.

#define XTAL_BT_GATE   BIT(20)

Definition at line 823 of file reg.h.

#define XTAL_EN   BIT(0)

Definition at line 811 of file reg.h.

#define XTAL_GATE_AFE   BIT(11)

Definition at line 817 of file reg.h.

#define XTAL_GATE_DIG   BIT(17)

Definition at line 821 of file reg.h.

#define XTAL_GATE_USB   BIT(8)

Definition at line 815 of file reg.h.

#define XTAL_RF_GATE   BIT(14)

Definition at line 819 of file reg.h.

Generated on Thu Jan 10 2013 15:11:11 for Linux Kernel by   doxygen 1.8.2