drxd_firm.c File Reference

#include "drxd_firm.h"

Go to the source code of this file.

Macros
#define	ADDRESS(x)   ((x) & 0xFF), (((x)>>8) & 0xFF), (((x)>>16) & 0xFF), (((x)>>24) & 0xFF)
#define	LENGTH(x)   ((x) & 0xFF), (((x)>>8) & 0xFF)
#define	DATA16(x)   ((x) & 0xFF), (((x)>>8) & 0xFF)
#define	WRBLOCK(a, l)   ADDRESS(a), LENGTH(l)
#define	WR16(a, d)   ADDRESS(a), LENGTH(1), DATA16(d)
#define	END_OF_TABLE   0xFF, 0xFF, 0xFF, 0xFF
#define	HI_TR_FUNC_ADDR   HI_IF_RAM_USR_BEGIN__A
#define	HI_TR_FUNC_SIZE   9 /* size of this function in instruction words */
#define	HI_RST_FUNC_ADDR   (HI_IF_RAM_USR_BEGIN__A + HI_TR_FUNC_SIZE)
#define	HI_RST_FUNC_SIZE   54 /* size of this function in instruction words */

Variables
u8	DRXD_InitAtomicRead []
u8	DRXD_HiI2cPatch_1 []
u8	DRXD_HiI2cPatch_3 []
u8	DRXD_ResetCEFR []
u8	DRXD_InitFEA2_1 []
u8	DRXD_InitFEA2_2 []
u8	DRXD_InitFEB1_1 []
u8	DRXD_InitFEB1_2 []
u8	DRXD_InitCPA2 []
u8	DRXD_InitCPB1 []
u8	DRXD_InitCEA2 []
u8	DRXD_InitCEB1 []
u8	DRXD_InitEQA2 []
u8	DRXD_InitEQB1 []
u8	DRXD_ResetECRAM []
u8	DRXD_InitECA2 []
u8	DRXD_InitECB1 []
u8	DRXD_ResetECA2 []
u8	DRXD_InitSC []
u8	DRXD_InitDiversityFront []
u8	DRXD_InitDiversityEnd []
u8	DRXD_DisableDiversity []
u8	DRXD_StartDiversityFront []
u8	DRXD_StartDiversityEnd []
u8	DRXD_DiversityDelay8MHZ []
u8	DRXD_DiversityDelay6MHZ []

Macro Definition Documentation

#define ADDRESS

(

x

)

((x) & 0xFF), (((x)>>8) & 0xFF), (((x)>>16) & 0xFF), (((x)>>24) & 0xFF)

Definition at line 33 of file drxd_firm.c.

#define DATA16

(

x

)

((x) & 0xFF), (((x)>>8) & 0xFF)

Definition at line 37 of file drxd_firm.c.

#define END_OF_TABLE   0xFF, 0xFF, 0xFF, 0xFF

Definition at line 42 of file drxd_firm.c.

#define HI_RST_FUNC_ADDR   (HI_IF_RAM_USR_BEGIN__A + HI_TR_FUNC_SIZE)

Definition at line 66 of file drxd_firm.c.

#define HI_RST_FUNC_SIZE   54 /* size of this function in instruction words */

Definition at line 67 of file drxd_firm.c.

#define HI_TR_FUNC_ADDR   HI_IF_RAM_USR_BEGIN__A

Definition at line 46 of file drxd_firm.c.

#define HI_TR_FUNC_SIZE   9 /* size of this function in instruction words */

Definition at line 47 of file drxd_firm.c.

#define LENGTH

(

x

)

((x) & 0xFF), (((x)>>8) & 0xFF)

Definition at line 34 of file drxd_firm.c.

#define WR16	(		a,
			d
	)		ADDRESS(a), LENGTH(1), DATA16(d)

Definition at line 40 of file drxd_firm.c.

#define WRBLOCK	(		a,
			l
	)		ADDRESS(a), LENGTH(l)

Definition at line 39 of file drxd_firm.c.

Variable Documentation

u8 DRXD_DisableDiversity[]

Definition at line 838 of file drxd_firm.c.

u8 DRXD_DiversityDelay6MHZ[]

Initial value:

=   
{
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_32__A, 1100 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_16__A, 1000 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_8__A, 900 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_4__A, 600 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_32__A, 5300 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_16__A, 5000 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_8__A, 4500 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_4__A, 3500 - 50),
    END_OF_TABLE
}

Definition at line 918 of file drxd_firm.c.

u8 DRXD_DiversityDelay8MHZ[]

Initial value:

= {
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_32__A, 1150 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_16__A, 1100 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_8__A, 1000 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_4__A, 800 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_32__A, 5420 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_16__A, 5200 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_8__A, 4800 - 50),
    WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_4__A, 4000 - 50),
    END_OF_TABLE
}

Definition at line 906 of file drxd_firm.c.

u8 DRXD_HiI2cPatch_1[]

Definition at line 70 of file drxd_firm.c.

u8 DRXD_HiI2cPatch_3[]

Definition at line 131 of file drxd_firm.c.

u8 DRXD_InitAtomicRead[]

Initial value:

= {
    WRBLOCK(HI_TR_FUNC_ADDR, HI_TR_FUNC_SIZE),
    0x26, 0x00,     
    0x60, 0x04,     
    0x61, 0x04,     
    0xE3, 0x07,     
    0x40, 0x00,     
    0x64, 0x04,     
    0x65, 0x04,     
    0x26, 0x00,     
    0x38, 0x00,     
    END_OF_TABLE
}

Definition at line 49 of file drxd_firm.c.

u8 DRXD_InitCEA2[]

Definition at line 443 of file drxd_firm.c.

u8 DRXD_InitCEB1[]

Initial value:

= {
    WR16(B_CE_REG_TI_PHN_ENABLE__A, 0x0001),
    WR16(B_CE_REG_FR_PM_SET__A, 0x000D),

    END_OF_TABLE
}

Definition at line 486 of file drxd_firm.c.

u8 DRXD_InitCPA2[]

Initial value:

= {
    WRBLOCK(CP_REG_BR_SPL_OFFSET__A, 2),
    0x07, 0x00,     
    0x0A, 0x00,     

    WRBLOCK(CP_REG_RT_ANG_INC0__A, 4),
    0x00, 0x00,     
    0x00, 0x00,     
    0x03, 0x00,     
    0x03, 0x00,     

    WRBLOCK(CP_REG_AC_NEXP_OFFS__A, 5),
    0x32, 0x00,     
    0x62, 0x00,     
    0x82, 0x00,     
    0x26, 0x00,     
    0x0F, 0x00,     

    WRBLOCK(CP_REG_AC_AMP_MODE__A, 2),
    0x02, 0x00,     
    0x01, 0x00,     

    WR16(CP_REG_INTERVAL__A, 0x0005),
    WR16(CP_REG_RT_EXP_MARG__A, 0x0004),
    WR16(CP_REG_AC_ANG_MODE__A, 0x0003),

    WR16(CP_REG_COMM_EXEC__A, 0x0001),
    END_OF_TABLE
}

Definition at line 407 of file drxd_firm.c.

u8 DRXD_InitCPB1[]

Initial value:

= {
    WR16(B_CP_REG_BR_SPL_OFFSET__A, 0x0008),
    WR16(B_CP_COMM_EXEC__A, 0x0001),
    END_OF_TABLE
}

Definition at line 437 of file drxd_firm.c.

u8 DRXD_InitDiversityEnd[]

Definition at line 796 of file drxd_firm.c.

u8 DRXD_InitDiversityFront[]

Definition at line 759 of file drxd_firm.c.

u8 DRXD_InitECA2[]

Definition at line 533 of file drxd_firm.c.

u8 DRXD_InitECB1[]

Definition at line 619 of file drxd_firm.c.

u8 DRXD_InitEQA2[]

Initial value:

= {
    WRBLOCK(EQ_REG_OT_QNT_THRES0__A, 4),
    0x1E, 0x00,     
    0x1F, 0x00,     
    0x06, 0x00,     
    0x02, 0x00,     

    WR16(EQ_REG_TD_REQ_SMB_CNT__A, 0x0200),
    WR16(EQ_REG_IS_CLIP_EXP__A, 0x001F),
    WR16(EQ_REG_SN_OFFSET__A, (u16) (-7)),
    WR16(EQ_REG_RC_SEL_CAR__A, 0x0002),
    WR16(EQ_REG_COMM_EXEC__A, 0x0001),
    END_OF_TABLE
}

Definition at line 493 of file drxd_firm.c.

u8 DRXD_InitEQB1[]

Initial value:

= {
    WR16(B_EQ_REG_COMM_EXEC__A, 0x0001),
    END_OF_TABLE
}

Definition at line 508 of file drxd_firm.c.

u8 DRXD_InitFEA2_1[]

Definition at line 258 of file drxd_firm.c.

u8 DRXD_InitFEA2_2[]

Initial value:

= {
    WR16(FE_AG_REG_CDR_RUR_CNT__A, 0x0010),
    WR16(FE_AG_REG_FGM_WRI__A, 48),
    
    WR16(FE_FD_REG_MEAS_VAL__A, 0x0001),

    WR16(FE_CU_REG_COMM_EXEC__A, 0x0001),
    WR16(FE_CF_REG_COMM_EXEC__A, 0x0001),
    WR16(FE_IF_REG_COMM_EXEC__A, 0x0001),
    WR16(FE_FD_REG_COMM_EXEC__A, 0x0001),
    WR16(FE_FS_REG_COMM_EXEC__A, 0x0001),
    WR16(FE_AD_REG_COMM_EXEC__A, 0x0001),
    WR16(FE_AG_REG_COMM_EXEC__A, 0x0001),
    WR16(FE_AG_REG_AG_MODE_LOP__A, 0x895E),

    END_OF_TABLE
}

Definition at line 344 of file drxd_firm.c.

u8 DRXD_InitFEB1_1[]

Initial value:

= {
    WR16(B_FE_AD_REG_PD__A, 0x0000),
    WR16(B_FE_AD_REG_CLKNEG__A, 0x0000),
    WR16(B_FE_AG_REG_BGC_FGC_WRI__A, 0x0000),
    WR16(B_FE_AG_REG_BGC_CGC_WRI__A, 0x0000),
    WR16(B_FE_AG_REG_AG_MODE_LOP__A, 0x000a),
    WR16(B_FE_AG_REG_IND_PD1_WRI__A, 35),
    WR16(B_FE_AG_REG_IND_WIN__A, 0),
    WR16(B_FE_AG_REG_IND_THD_LOL__A, 8),
    WR16(B_FE_AG_REG_IND_THD_HIL__A, 8),
    WR16(B_FE_CF_REG_IMP_VAL__A, 1),
    WR16(B_FE_AG_REG_EGC_FLA_RGN__A, 7),
    END_OF_TABLE
}

Definition at line 362 of file drxd_firm.c.

u8 DRXD_InitFEB1_2[]

Initial value:

= {
    WR16(B_FE_COMM_EXEC__A, 0x0001),

    
    WR16(B_FE_AG_REG_PDA_AUR_CNT__A, 0x0C),
    WR16(B_FE_AG_REG_PDC_SET_LVL__A, 0x01),
    WR16(B_FE_AG_REG_PDC_FLA_RGN__A, 0x02),
    WR16(B_FE_AG_REG_PDC_FLA_STP__A, 0xFFFF),
    WR16(B_FE_AG_REG_PDC_SLO_STP__A, 0xFFFF),
    WR16(B_FE_AG_REG_PDC_MAX__A, 0x02),
    WR16(B_FE_AG_REG_TGA_AUR_CNT__A, 0x0C),
    WR16(B_FE_AG_REG_TGC_SET_LVL__A, 0x22),
    WR16(B_FE_AG_REG_TGC_FLA_RGN__A, 0x15),
    WR16(B_FE_AG_REG_TGC_FLA_STP__A, 0x01),
    WR16(B_FE_AG_REG_TGC_SLO_STP__A, 0x0A),

    WR16(B_FE_CU_REG_DIV_NFC_CLP__A, 0),
    WR16(B_FE_CU_REG_CTR_NFC_OCR__A, 25000),
    WR16(B_FE_CU_REG_CTR_NFC_ICR__A, 1),
    END_OF_TABLE
}

Definition at line 385 of file drxd_firm.c.

u8 DRXD_InitSC[]

Initial value:

= {
    WR16(SC_COMM_EXEC__A, 0),
    WR16(SC_COMM_STATE__A, 0),





    
    END_OF_TABLE
}

Definition at line 745 of file drxd_firm.c.

u8 DRXD_ResetCEFR[]

Definition at line 191 of file drxd_firm.c.

u8 DRXD_ResetECA2[]

Definition at line 674 of file drxd_firm.c.

u8 DRXD_ResetECRAM[]

Initial value:

= {
    
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (0 * 17), 0x0000),
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (1 * 17), 0x0000),
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (2 * 17), 0x0000),
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (3 * 17), 0x0000),
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (4 * 17), 0x0000),
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (5 * 17), 0x0000),
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (6 * 17), 0x0000),
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (7 * 17), 0x0000),
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (8 * 17), 0x0000),
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (9 * 17), 0x0000),
    WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (10 * 17), 0x0000),

    
    WR16(EC_RS_EC_RAM__A, 0x0000),
    WR16(EC_RS_EC_RAM__A + 204, 0x0000),
    END_OF_TABLE
}

Definition at line 513 of file drxd_firm.c.

u8 DRXD_StartDiversityEnd[]

Initial value:

= {
    
    WR16(B_FE_CF_REG_IMP_VAL__A, 0x0),  
    WR16(B_FE_AD_REG_INVEXT__A, 0x0),   
    WR16(B_CP_REG_BR_STR_DEL__A, 10),   

    WR16(B_EQ_REG_RC_SEL_CAR__A, B_EQ_REG_RC_SEL_CAR_DIV_ON |   
         B_EQ_REG_RC_SEL_CAR_MEAS_A_CC |
         B_EQ_REG_RC_SEL_CAR_PASS_A_CC | B_EQ_REG_RC_SEL_CAR_LOCAL_A_CC),

    END_OF_TABLE
}

Definition at line 893 of file drxd_firm.c.

u8 DRXD_StartDiversityFront[]

Initial value:

= {
    
    WR16(B_FE_CF_REG_IMP_VAL__A, 0x0),
    WR16(B_FE_AD_REG_FDB_IN__A, 0x0),
    WR16(B_FE_AD_REG_INVEXT__A, 0x0),
    WR16(B_EQ_REG_COMM_MB__A, 0x12),    
    WR16(B_EQ_REG_RC_SEL_CAR__A, B_EQ_REG_RC_SEL_CAR_PASS_B_CE |    
         B_EQ_REG_RC_SEL_CAR_LOCAL_B_CE | B_EQ_REG_RC_SEL_CAR_MEAS_B_CE),

    WR16(SC_RA_RAM_ECHO_SHIFT_LIM__A, 2),

    END_OF_TABLE
}

Definition at line 879 of file drxd_firm.c.