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Data Structures | Macros | Functions
ds1wm.c File Reference
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/pm.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/mfd/core.h>
#include <linux/mfd/ds1wm.h>
#include <linux/slab.h>
#include <asm/io.h>
#include "../w1.h"
#include "../w1_int.h"

Go to the source code of this file.

Data Structures

struct  ds1wm_data
 

Macros

#define DS1WM_CMD   0x00 /* R/W 4 bits command */
 
#define DS1WM_DATA   0x01 /* R/W 8 bits, transmit/receive buffer */
 
#define DS1WM_INT   0x02 /* R/W interrupt status */
 
#define DS1WM_INT_EN   0x03 /* R/W interrupt enable */
 
#define DS1WM_CLKDIV   0x04 /* R/W 5 bits of divisor and pre-scale */
 
#define DS1WM_CNTRL   0x05 /* R/W master control register (not used yet) */
 
#define DS1WM_CMD_1W_RESET   (1 << 0) /* force reset on 1-wire bus */
 
#define DS1WM_CMD_SRA   (1 << 1) /* enable Search ROM accelerator mode */
 
#define DS1WM_CMD_DQ_OUTPUT   (1 << 2) /* write only - forces bus low */
 
#define DS1WM_CMD_DQ_INPUT   (1 << 3) /* read only - reflects state of bus */
 
#define DS1WM_CMD_RST   (1 << 5) /* software reset */
 
#define DS1WM_CMD_OD   (1 << 7) /* overdrive */
 
#define DS1WM_INT_PD   (1 << 0) /* presence detect */
 
#define DS1WM_INT_PDR   (1 << 1) /* presence detect result */
 
#define DS1WM_INT_TBE   (1 << 2) /* tx buffer empty */
 
#define DS1WM_INT_TSRE   (1 << 3) /* tx shift register empty */
 
#define DS1WM_INT_RBF   (1 << 4) /* rx buffer full */
 
#define DS1WM_INT_RSRF   (1 << 5) /* rx shift register full */
 
#define DS1WM_INTEN_EPD   (1 << 0) /* enable presence detect int */
 
#define DS1WM_INTEN_IAS   (1 << 1) /* INTR active state */
 
#define DS1WM_INTEN_ETBE   (1 << 2) /* enable tx buffer empty int */
 
#define DS1WM_INTEN_ETMT   (1 << 3) /* enable tx shift register empty int */
 
#define DS1WM_INTEN_ERBF   (1 << 4) /* enable rx buffer full int */
 
#define DS1WM_INTEN_ERSRF   (1 << 5) /* enable rx shift register full int */
 
#define DS1WM_INTEN_DQO   (1 << 6) /* enable direct bus driving ops */
 
#define DS1WM_INTEN_NOT_IAS   (~DS1WM_INTEN_IAS) /* all but INTR active state */
 
#define DS1WM_TIMEOUT   (HZ * 5)
 
#define ds1wm_suspend   NULL
 
#define ds1wm_resume   NULL
 

Functions

 module_init (ds1wm_init)
 
 module_exit (ds1wm_exit)
 
 MODULE_LICENSE ("GPL")
 
 MODULE_AUTHOR ("Szabolcs Gyurko <[email protected]>, ""Matt Reimer <[email protected]>,""Jean-Francois Dagenais <[email protected]>")
 
 MODULE_DESCRIPTION ("DS1WM w1 busmaster driver")
 

Macro Definition Documentation

#define DS1WM_CLKDIV   0x04 /* R/W 5 bits of divisor and pre-scale */

Definition at line 35 of file ds1wm.c.

#define DS1WM_CMD   0x00 /* R/W 4 bits command */

Definition at line 31 of file ds1wm.c.

#define DS1WM_CMD_1W_RESET   (1 << 0) /* force reset on 1-wire bus */

Definition at line 38 of file ds1wm.c.

#define DS1WM_CMD_DQ_INPUT   (1 << 3) /* read only - reflects state of bus */

Definition at line 41 of file ds1wm.c.

#define DS1WM_CMD_DQ_OUTPUT   (1 << 2) /* write only - forces bus low */

Definition at line 40 of file ds1wm.c.

#define DS1WM_CMD_OD   (1 << 7) /* overdrive */

Definition at line 43 of file ds1wm.c.

#define DS1WM_CMD_RST   (1 << 5) /* software reset */

Definition at line 42 of file ds1wm.c.

#define DS1WM_CMD_SRA   (1 << 1) /* enable Search ROM accelerator mode */

Definition at line 39 of file ds1wm.c.

#define DS1WM_CNTRL   0x05 /* R/W master control register (not used yet) */

Definition at line 36 of file ds1wm.c.

#define DS1WM_DATA   0x01 /* R/W 8 bits, transmit/receive buffer */

Definition at line 32 of file ds1wm.c.

#define DS1WM_INT   0x02 /* R/W interrupt status */

Definition at line 33 of file ds1wm.c.

#define DS1WM_INT_EN   0x03 /* R/W interrupt enable */

Definition at line 34 of file ds1wm.c.

#define DS1WM_INT_PD   (1 << 0) /* presence detect */

Definition at line 45 of file ds1wm.c.

#define DS1WM_INT_PDR   (1 << 1) /* presence detect result */

Definition at line 46 of file ds1wm.c.

#define DS1WM_INT_RBF   (1 << 4) /* rx buffer full */

Definition at line 49 of file ds1wm.c.

#define DS1WM_INT_RSRF   (1 << 5) /* rx shift register full */

Definition at line 50 of file ds1wm.c.

#define DS1WM_INT_TBE   (1 << 2) /* tx buffer empty */

Definition at line 47 of file ds1wm.c.

#define DS1WM_INT_TSRE   (1 << 3) /* tx shift register empty */

Definition at line 48 of file ds1wm.c.

#define DS1WM_INTEN_DQO   (1 << 6) /* enable direct bus driving ops */

Definition at line 58 of file ds1wm.c.

#define DS1WM_INTEN_EPD   (1 << 0) /* enable presence detect int */

Definition at line 52 of file ds1wm.c.

#define DS1WM_INTEN_ERBF   (1 << 4) /* enable rx buffer full int */

Definition at line 56 of file ds1wm.c.

#define DS1WM_INTEN_ERSRF   (1 << 5) /* enable rx shift register full int */

Definition at line 57 of file ds1wm.c.

#define DS1WM_INTEN_ETBE   (1 << 2) /* enable tx buffer empty int */

Definition at line 54 of file ds1wm.c.

#define DS1WM_INTEN_ETMT   (1 << 3) /* enable tx shift register empty int */

Definition at line 55 of file ds1wm.c.

#define DS1WM_INTEN_IAS   (1 << 1) /* INTR active state */

Definition at line 53 of file ds1wm.c.

#define DS1WM_INTEN_NOT_IAS   (~DS1WM_INTEN_IAS) /* all but INTR active state */

Definition at line 60 of file ds1wm.c.

#define ds1wm_resume   NULL

Definition at line 554 of file ds1wm.c.

#define ds1wm_suspend   NULL

Definition at line 553 of file ds1wm.c.

#define DS1WM_TIMEOUT   (HZ * 5)

Definition at line 62 of file ds1wm.c.

Function Documentation

MODULE_AUTHOR ( "Szabolcs Gyurko <[email protected] ,
""Matt Reimer< mreimer @vpop.net >  ,
""Jean-Francois Dagenais< dagenaisj @sonatest.com >"   
)
MODULE_DESCRIPTION ( "DS1WM w1 busmaster driver )
module_exit ( ds1wm_exit  )
module_init ( ds1wm_init  )
MODULE_LICENSE ( "GPL"  )

Variable Documentation

unsigned long divisor

Definition at line 66 of file ds1wm.c.

struct { ... } freq[]
Initial value:
= {
{ 1000000, 0x80 },
{ 2000000, 0x84 },
{ 3000000, 0x81 },
{ 4000000, 0x88 },
{ 5000000, 0x82 },
{ 6000000, 0x85 },
{ 7000000, 0x83 },
{ 8000000, 0x8c },
{ 10000000, 0x86 },
{ 12000000, 0x89 },
{ 14000000, 0x87 },
{ 16000000, 0x90 },
{ 20000000, 0x8a },
{ 24000000, 0x8d },
{ 28000000, 0x8b },
{ 32000000, 0x94 },
{ 40000000, 0x8e },
{ 48000000, 0x91 },
{ 56000000, 0x8f },
{ 64000000, 0x98 },
{ 80000000, 0x92 },
{ 96000000, 0x95 },
{ 112000000, 0x93 },
{ 128000000, 0x9c },
}

Definition at line 65 of file ds1wm.c.