68 #include <linux/ppp_defs.h>
69 #include <linux/pci.h>
75 static const char *enternow_pci_rev =
"$Revision: 1.1.4.5 $";
79 #define TJ_AMD_IRQ 0x20
88 #define TJ_AMD_PORT 0xC0
97 ReadByteAmd7930(
struct IsdnCardState *
cs,
unsigned char offset)
101 return (
inb(cs->hw.njet.isac + 4 * offset));
106 return (
inb(cs->hw.njet.isac + 4 *
AMD_DR));
112 WriteByteAmd7930(
struct IsdnCardState *
cs,
unsigned char offset,
unsigned char value)
116 outb(value, cs->hw.njet.isac + 4 * offset);
127 enpci_setIrqMask(
struct IsdnCardState *cs,
unsigned char val) {
135 static unsigned char dummyrr(
struct IsdnCardState *cs,
int chan,
unsigned char off)
140 static void dummywr(
struct IsdnCardState *cs,
int chan,
unsigned char off,
unsigned char value)
150 reset_enpci(
struct IsdnCardState *cs)
152 if (cs->debug & L1_DEB_ISAC)
153 debugl1(cs,
"enter:now PCI: reset");
156 cs->hw.njet.ctrl_reg = 0x07;
160 cs->hw.njet.ctrl_reg = 0x30;
164 cs->hw.njet.auxd = 0;
165 cs->hw.njet.dmactrl = 0;
168 outb(cs->hw.njet.auxd, cs->hw.njet.auxa);
173 enpci_card_msg(
struct IsdnCardState *cs,
int mt,
void *
arg)
178 if (cs->debug & L1_DEB_ISAC)
179 debugl1(cs,
"enter:now PCI: card_msg: 0x%04X", mt);
186 spin_unlock_irqrestore(&cs->lock, flags);
206 cs->hw.njet.auxd = 0;
211 chan = (
unsigned char *)arg;
213 if (cs->debug & L1_DEB_ISAC)
214 debugl1(cs,
"enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
216 cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)),
"MDL_BC_ASSIGN");
223 chan = (
unsigned char *)arg;
225 if (cs->debug & L1_DEB_ISAC)
226 debugl1(cs,
"enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
228 cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)),
"MDL_BC_RELEASE");
230 if (!(cs->dc.amd7930.lmr1 & 3)) {
243 enpci_interrupt(
int intno,
void *
dev_id)
245 struct IsdnCardState *cs =
dev_id;
246 unsigned char s0val, s1val,
ir;
255 ir = ReadByteAmd7930(cs, 0x00);
261 if ((s0val | s1val) == 0) {
262 spin_unlock_irqrestore(&cs->lock, flags);
279 s0val = s0val | 0x02;
281 s0val = s0val | 0x01;
282 if (s0val != cs->hw.njet.last_is0)
285 spin_unlock_irqrestore(&cs->lock, flags);
288 cs->hw.njet.irqstat0 = s0val;
299 spin_unlock_irqrestore(&cs->lock, flags);
304 struct IsdnCardState *cs)
308 cs->irq = dev_netjet->
irq;
314 if (!cs->hw.njet.base) {
321 printk(
KERN_WARNING "enter:now: You tried to load this driver with an incompatible TigerJet-card\n");
330 struct IsdnCardState *cs)
333 cs->hw.njet.isac = cs->hw.njet.base + 0xC0;
336 cs->hw.njet.ctrl_reg = 0x07;
341 cs->hw.njet.ctrl_reg = 0x30;
345 cs->hw.njet.auxd = 0x00;
346 cs->hw.njet.dmactrl = 0;
350 outb(cs->hw.njet.auxd, cs->hw.njet.auxa);
354 struct IsdnCardState *cs)
359 "enter:now PCI: PCI card configured at 0x%lx IRQ %d\n",
360 cs->hw.njet.base, cs->irq);
363 "HiSax: enter:now config port %lx-%lx already in use\n",
365 cs->hw.njet.base + bytecnt);
370 cs->hw.njet.last_is0 = 0;
372 cs->readisac = &ReadByteAmd7930;
374 cs->writeisac = &WriteByteAmd7930;
375 cs->dc.amd7930.setIrqMask = &enpci_setIrqMask;
377 cs->BC_Read_Reg = &dummyrr;
378 cs->BC_Write_Reg = &dummywr;
380 cs->cardmsg = &enpci_card_msg;
381 cs->irq_func = &enpci_interrupt;
394 struct IsdnCardState *cs = card->
cs;
398 #error "not running on big endian machines now"
401 strcpy(tmp, enternow_pci_rev);
411 ret = en_pci_probe(dev_netjet, cs);
419 en_cs_init(card, cs);
423 return en_cs_init_rest(card, cs);