Linux Kernel
3.7.1
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#include <linux/err.h>
#include <linux/fs.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/miscdevice.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/notifier.h>
#include <linux/reboot.h>
#include <linux/uaccess.h>
#include <linux/watchdog.h>
Go to the source code of this file.
Data Structures | |
struct | watchdog_data |
Macros | |
#define | pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
#define | DRVNAME "f71808e_wdt" |
#define | SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */ |
#define | SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ |
#define | SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */ |
#define | SIO_REG_LDSEL 0x07 /* Logical device select */ |
#define | SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ |
#define | SIO_REG_DEVREV 0x22 /* Device revision */ |
#define | SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ |
#define | SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */ |
#define | SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */ |
#define | SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */ |
#define | SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */ |
#define | SIO_REG_ENABLE 0x30 /* Logical device enable */ |
#define | SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ |
#define | SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ |
#define | SIO_F71808_ID 0x0901 /* Chipset ID */ |
#define | SIO_F71858_ID 0x0507 /* Chipset ID */ |
#define | SIO_F71862_ID 0x0601 /* Chipset ID */ |
#define | SIO_F71869_ID 0x0814 /* Chipset ID */ |
#define | SIO_F71869A_ID 0x1007 /* Chipset ID */ |
#define | SIO_F71882_ID 0x0541 /* Chipset ID */ |
#define | SIO_F71889_ID 0x0723 /* Chipset ID */ |
#define | F71808FG_REG_WDO_CONF 0xf0 |
#define | F71808FG_REG_WDT_CONF 0xf5 |
#define | F71808FG_REG_WD_TIME 0xf6 |
#define | F71808FG_FLAG_WDOUT_EN 7 |
#define | F71808FG_FLAG_WDTMOUT_STS 5 |
#define | F71808FG_FLAG_WD_EN 5 |
#define | F71808FG_FLAG_WD_PULSE 4 |
#define | F71808FG_FLAG_WD_UNIT 3 |
#define | WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */ |
#define | WATCHDOG_MAX_TIMEOUT (60 * 255) |
#define | WATCHDOG_PULSE_WIDTH |
#define | WATCHDOG_F71862FG_PIN |
Functions | |
module_param (force_id, ushort, 0) | |
MODULE_PARM_DESC (force_id,"Override the detected device ID") | |
module_param (timeout, int, 0) | |
MODULE_PARM_DESC (timeout,"Watchdog timeout in seconds. 1<= timeout <="__MODULE_STRING(WATCHDOG_MAX_TIMEOUT)" (default="__MODULE_STRING(WATCHDOG_TIMEOUT)")") | |
module_param (pulse_width, uint, 0) | |
MODULE_PARM_DESC (pulse_width,"Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"" (default="__MODULE_STRING(WATCHDOG_PULSE_WIDTH)")") | |
module_param (f71862fg_pin, uint, 0) | |
MODULE_PARM_DESC (f71862fg_pin,"Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"" (default="__MODULE_STRING(WATCHDOG_F71862FG_PIN)")") | |
module_param (nowayout, bool, 0444) | |
MODULE_PARM_DESC (nowayout,"Disable watchdog shutdown on close") | |
module_param (start_withtimeout, uint, 0) | |
MODULE_PARM_DESC (start_withtimeout,"Start watchdog timer on module load with"" given initial timeout. Zero (default) disables this feature.") | |
MODULE_DESCRIPTION ("F71808E Watchdog Driver") | |
MODULE_AUTHOR ("Giel van Schijndel <[email protected]>") | |
MODULE_LICENSE ("GPL") | |
module_init (f71808e_init) | |
module_exit (f71808e_exit) | |
#define DRVNAME "f71808e_wdt" |
Definition at line 37 of file f71808e_wdt.c.
#define F71808FG_FLAG_WD_EN 5 |
Definition at line 70 of file f71808e_wdt.c.
#define F71808FG_FLAG_WD_PULSE 4 |
Definition at line 71 of file f71808e_wdt.c.
#define F71808FG_FLAG_WD_UNIT 3 |
Definition at line 72 of file f71808e_wdt.c.
#define F71808FG_FLAG_WDOUT_EN 7 |
Definition at line 67 of file f71808e_wdt.c.
#define F71808FG_FLAG_WDTMOUT_STS 5 |
Definition at line 69 of file f71808e_wdt.c.
#define F71808FG_REG_WD_TIME 0xf6 |
Definition at line 65 of file f71808e_wdt.c.
#define F71808FG_REG_WDO_CONF 0xf0 |
Definition at line 63 of file f71808e_wdt.c.
#define F71808FG_REG_WDT_CONF 0xf5 |
Definition at line 64 of file f71808e_wdt.c.
Definition at line 22 of file f71808e_wdt.c.
#define SIO_F71808_ID 0x0901 /* Chipset ID */ |
Definition at line 55 of file f71808e_wdt.c.
#define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */ |
Definition at line 39 of file f71808e_wdt.c.
#define SIO_F71858_ID 0x0507 /* Chipset ID */ |
Definition at line 56 of file f71808e_wdt.c.
#define SIO_F71862_ID 0x0601 /* Chipset ID */ |
Definition at line 57 of file f71808e_wdt.c.
#define SIO_F71869_ID 0x0814 /* Chipset ID */ |
Definition at line 58 of file f71808e_wdt.c.
#define SIO_F71869A_ID 0x1007 /* Chipset ID */ |
Definition at line 59 of file f71808e_wdt.c.
#define SIO_F71882_ID 0x0541 /* Chipset ID */ |
Definition at line 60 of file f71808e_wdt.c.
#define SIO_F71889_ID 0x0723 /* Chipset ID */ |
Definition at line 61 of file f71808e_wdt.c.
#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ |
Definition at line 54 of file f71808e_wdt.c.
#define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */ |
Definition at line 41 of file f71808e_wdt.c.
#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ |
Definition at line 52 of file f71808e_wdt.c.
#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ |
Definition at line 44 of file f71808e_wdt.c.
#define SIO_REG_DEVREV 0x22 /* Device revision */ |
Definition at line 45 of file f71808e_wdt.c.
#define SIO_REG_ENABLE 0x30 /* Logical device enable */ |
Definition at line 51 of file f71808e_wdt.c.
#define SIO_REG_LDSEL 0x07 /* Logical device select */ |
Definition at line 43 of file f71808e_wdt.c.
#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ |
Definition at line 46 of file f71808e_wdt.c.
#define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */ |
Definition at line 48 of file f71808e_wdt.c.
#define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */ |
Definition at line 49 of file f71808e_wdt.c.
#define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */ |
Definition at line 50 of file f71808e_wdt.c.
#define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */ |
Definition at line 47 of file f71808e_wdt.c.
#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ |
Definition at line 40 of file f71808e_wdt.c.
#define WATCHDOG_F71862FG_PIN |
Definition at line 78 of file f71808e_wdt.c.
#define WATCHDOG_MAX_TIMEOUT (60 * 255) |
Definition at line 76 of file f71808e_wdt.c.
#define WATCHDOG_PULSE_WIDTH |
Definition at line 77 of file f71808e_wdt.c.
Definition at line 75 of file f71808e_wdt.c.
enum chips |
Definition at line 113 of file f71808e_wdt.c.
MODULE_AUTHOR | ( | "Giel van Schijndel <[email protected]>" | ) |
MODULE_DESCRIPTION | ( | "F71808E Watchdog Driver" | ) |
module_exit | ( | f71808e_exit | ) |
module_init | ( | f71808e_init | ) |
MODULE_LICENSE | ( | "GPL" | ) |
module_param | ( | force_id | , |
ushort | , | ||
0 | |||
) |
module_param | ( | pulse_width | , |
uint | , | ||
0 | |||
) |
module_param | ( | f71862fg_pin | , |
uint | , | ||
0 | |||
) |
module_param | ( | nowayout | , |
bool | , | ||
0444 | |||
) |
module_param | ( | start_withtimeout | , |
uint | , | ||
0 | |||
) |
MODULE_PARM_DESC | ( | timeout | , |
"Watchdog timeout in seconds. 1<= timeout <="__MODULE_STRING(WATCHDOG_MAX_TIMEOUT)" (default="__MODULE_STRING(WATCHDOG_TIMEOUT)")" | |||
) |
MODULE_PARM_DESC | ( | pulse_width | , |
"Watchdog signal pulse width. | 0=level, | ||
1 | ms, | ||
25 | ms, | ||
125 ms or 5000 ms""(default="__MODULE_STRING(WATCHDOG_PULSE_WIDTH)")" | |||
) |
MODULE_PARM_DESC | ( | f71862fg_pin | , |
"Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"" (default="__MODULE_STRING(WATCHDOG_F71862FG_PIN)")" | |||
) |