Linux Kernel
3.7.1
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#include <linux/phy.h>
Go to the source code of this file.
Data Structures | |
struct | mpc52xx_fec |
Macros | |
#define | FEC_RX_BUFFER_SIZE 1522 /* max receive packet size */ |
#define | FEC_RX_NUM_BD 256 |
#define | FEC_TX_NUM_BD 64 |
#define | FEC_RESET_DELAY 50 /* uS */ |
#define | FEC_WATCHDOG_TIMEOUT ((400*HZ)/1000) |
#define | FEC_MIB_DISABLE 0x80000000 |
#define | FEC_IEVENT_HBERR 0x80000000 |
#define | FEC_IEVENT_BABR 0x40000000 |
#define | FEC_IEVENT_BABT 0x20000000 |
#define | FEC_IEVENT_GRA 0x10000000 |
#define | FEC_IEVENT_TFINT 0x08000000 |
#define | FEC_IEVENT_MII 0x00800000 |
#define | FEC_IEVENT_LATE_COL 0x00200000 |
#define | FEC_IEVENT_COL_RETRY_LIM 0x00100000 |
#define | FEC_IEVENT_XFIFO_UN 0x00080000 |
#define | FEC_IEVENT_XFIFO_ERROR 0x00040000 |
#define | FEC_IEVENT_RFIFO_ERROR 0x00020000 |
#define | FEC_IMASK_HBERR 0x80000000 |
#define | FEC_IMASK_BABR 0x40000000 |
#define | FEC_IMASK_BABT 0x20000000 |
#define | FEC_IMASK_GRA 0x10000000 |
#define | FEC_IMASK_MII 0x00800000 |
#define | FEC_IMASK_LATE_COL 0x00200000 |
#define | FEC_IMASK_COL_RETRY_LIM 0x00100000 |
#define | FEC_IMASK_XFIFO_UN 0x00080000 |
#define | FEC_IMASK_XFIFO_ERROR 0x00040000 |
#define | FEC_IMASK_RFIFO_ERROR 0x00020000 |
#define | FEC_IMASK_ENABLE |
#define | FEC_RCNTRL_MAX_FL_SHIFT 16 |
#define | FEC_RCNTRL_LOOP 0x01 |
#define | FEC_RCNTRL_DRT 0x02 |
#define | FEC_RCNTRL_MII_MODE 0x04 |
#define | FEC_RCNTRL_PROM 0x08 |
#define | FEC_RCNTRL_BC_REJ 0x10 |
#define | FEC_RCNTRL_FCE 0x20 |
#define | FEC_TCNTRL_GTS 0x00000001 |
#define | FEC_TCNTRL_HBC 0x00000002 |
#define | FEC_TCNTRL_FDEN 0x00000004 |
#define | FEC_TCNTRL_TFC_PAUSE 0x00000008 |
#define | FEC_TCNTRL_RFC_PAUSE 0x00000010 |
#define | FEC_ECNTRL_RESET 0x00000001 |
#define | FEC_ECNTRL_ETHER_EN 0x00000002 |
#define | FEC_MII_DATA_ST 0x40000000 /* Start frame */ |
#define | FEC_MII_DATA_OP_RD 0x20000000 /* Perform read */ |
#define | FEC_MII_DATA_OP_WR 0x10000000 /* Perform write */ |
#define | FEC_MII_DATA_PA_MSK 0x0f800000 /* PHY Address mask */ |
#define | FEC_MII_DATA_RA_MSK 0x007c0000 /* PHY Register mask */ |
#define | FEC_MII_DATA_TA 0x00020000 /* Turnaround */ |
#define | FEC_MII_DATA_DATAMSK 0x0000ffff /* PHY data mask */ |
#define | FEC_MII_READ_FRAME (FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA) |
#define | FEC_MII_WRITE_FRAME (FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR | FEC_MII_DATA_TA) |
#define | FEC_MII_DATA_RA_SHIFT 0x12 /* MII reg addr bits */ |
#define | FEC_MII_DATA_PA_SHIFT 0x17 /* MII PHY addr bits */ |
#define | FEC_PADDR2_TYPE 0x8808 |
#define | FEC_OP_PAUSE_OPCODE 0x00010000 |
#define | FEC_FIFO_WMRK_256B 0x3 |
#define | FEC_FIFO_STATUS_ERR 0x00400000 |
#define | FEC_FIFO_STATUS_UF 0x00200000 |
#define | FEC_FIFO_STATUS_OF 0x00100000 |
#define | FEC_FIFO_CNTRL_FRAME 0x08000000 |
#define | FEC_FIFO_CNTRL_LTG_7 0x07000000 |
#define | FEC_RESET_CNTRL_RESET_FIFO 0x02000000 |
#define | FEC_RESET_CNTRL_ENABLE_IS_RESET 0x01000000 |
#define | FEC_XMIT_FSM_APPEND_CRC 0x02000000 |
#define | FEC_XMIT_FSM_ENABLE_CRC 0x01000000 |
Variables | |
struct platform_driver | mpc52xx_fec_mdio_driver |
#define FEC_ECNTRL_ETHER_EN 0x00000002 |
Definition at line 256 of file fec_mpc52xx.h.
#define FEC_ECNTRL_RESET 0x00000001 |
Definition at line 255 of file fec_mpc52xx.h.
#define FEC_FIFO_CNTRL_FRAME 0x08000000 |
Definition at line 282 of file fec_mpc52xx.h.
#define FEC_FIFO_CNTRL_LTG_7 0x07000000 |
Definition at line 283 of file fec_mpc52xx.h.
#define FEC_FIFO_STATUS_ERR 0x00400000 |
Definition at line 278 of file fec_mpc52xx.h.
#define FEC_FIFO_STATUS_OF 0x00100000 |
Definition at line 280 of file fec_mpc52xx.h.
#define FEC_FIFO_STATUS_UF 0x00200000 |
Definition at line 279 of file fec_mpc52xx.h.
#define FEC_FIFO_WMRK_256B 0x3 |
Definition at line 276 of file fec_mpc52xx.h.
#define FEC_IEVENT_BABR 0x40000000 |
Definition at line 213 of file fec_mpc52xx.h.
#define FEC_IEVENT_BABT 0x20000000 |
Definition at line 214 of file fec_mpc52xx.h.
#define FEC_IEVENT_COL_RETRY_LIM 0x00100000 |
Definition at line 219 of file fec_mpc52xx.h.
#define FEC_IEVENT_GRA 0x10000000 |
Definition at line 215 of file fec_mpc52xx.h.
#define FEC_IEVENT_HBERR 0x80000000 |
Definition at line 212 of file fec_mpc52xx.h.
#define FEC_IEVENT_LATE_COL 0x00200000 |
Definition at line 218 of file fec_mpc52xx.h.
#define FEC_IEVENT_MII 0x00800000 |
Definition at line 217 of file fec_mpc52xx.h.
#define FEC_IEVENT_RFIFO_ERROR 0x00020000 |
Definition at line 222 of file fec_mpc52xx.h.
#define FEC_IEVENT_TFINT 0x08000000 |
Definition at line 216 of file fec_mpc52xx.h.
#define FEC_IEVENT_XFIFO_ERROR 0x00040000 |
Definition at line 221 of file fec_mpc52xx.h.
#define FEC_IEVENT_XFIFO_UN 0x00080000 |
Definition at line 220 of file fec_mpc52xx.h.
#define FEC_IMASK_BABR 0x40000000 |
Definition at line 225 of file fec_mpc52xx.h.
#define FEC_IMASK_BABT 0x20000000 |
Definition at line 226 of file fec_mpc52xx.h.
#define FEC_IMASK_COL_RETRY_LIM 0x00100000 |
Definition at line 230 of file fec_mpc52xx.h.
#define FEC_IMASK_ENABLE |
Definition at line 236 of file fec_mpc52xx.h.
#define FEC_IMASK_GRA 0x10000000 |
Definition at line 227 of file fec_mpc52xx.h.
#define FEC_IMASK_HBERR 0x80000000 |
Definition at line 224 of file fec_mpc52xx.h.
#define FEC_IMASK_LATE_COL 0x00200000 |
Definition at line 229 of file fec_mpc52xx.h.
#define FEC_IMASK_MII 0x00800000 |
Definition at line 228 of file fec_mpc52xx.h.
#define FEC_IMASK_RFIFO_ERROR 0x00020000 |
Definition at line 233 of file fec_mpc52xx.h.
#define FEC_IMASK_XFIFO_ERROR 0x00040000 |
Definition at line 232 of file fec_mpc52xx.h.
#define FEC_IMASK_XFIFO_UN 0x00080000 |
Definition at line 231 of file fec_mpc52xx.h.
#define FEC_MIB_DISABLE 0x80000000 |
Definition at line 210 of file fec_mpc52xx.h.
#define FEC_MII_DATA_DATAMSK 0x0000ffff /* PHY data mask */ |
Definition at line 264 of file fec_mpc52xx.h.
#define FEC_MII_DATA_OP_RD 0x20000000 /* Perform read */ |
Definition at line 259 of file fec_mpc52xx.h.
#define FEC_MII_DATA_OP_WR 0x10000000 /* Perform write */ |
Definition at line 260 of file fec_mpc52xx.h.
#define FEC_MII_DATA_PA_MSK 0x0f800000 /* PHY Address mask */ |
Definition at line 261 of file fec_mpc52xx.h.
#define FEC_MII_DATA_PA_SHIFT 0x17 /* MII PHY addr bits */ |
Definition at line 270 of file fec_mpc52xx.h.
#define FEC_MII_DATA_RA_MSK 0x007c0000 /* PHY Register mask */ |
Definition at line 262 of file fec_mpc52xx.h.
#define FEC_MII_DATA_RA_SHIFT 0x12 /* MII reg addr bits */ |
Definition at line 269 of file fec_mpc52xx.h.
#define FEC_MII_DATA_ST 0x40000000 /* Start frame */ |
Definition at line 258 of file fec_mpc52xx.h.
#define FEC_MII_DATA_TA 0x00020000 /* Turnaround */ |
Definition at line 263 of file fec_mpc52xx.h.
#define FEC_MII_READ_FRAME (FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA) |
Definition at line 266 of file fec_mpc52xx.h.
#define FEC_MII_WRITE_FRAME (FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR | FEC_MII_DATA_TA) |
Definition at line 267 of file fec_mpc52xx.h.
#define FEC_OP_PAUSE_OPCODE 0x00010000 |
Definition at line 274 of file fec_mpc52xx.h.
#define FEC_PADDR2_TYPE 0x8808 |
Definition at line 272 of file fec_mpc52xx.h.
#define FEC_RCNTRL_BC_REJ 0x10 |
Definition at line 246 of file fec_mpc52xx.h.
#define FEC_RCNTRL_DRT 0x02 |
Definition at line 243 of file fec_mpc52xx.h.
#define FEC_RCNTRL_FCE 0x20 |
Definition at line 247 of file fec_mpc52xx.h.
#define FEC_RCNTRL_LOOP 0x01 |
Definition at line 242 of file fec_mpc52xx.h.
#define FEC_RCNTRL_MAX_FL_SHIFT 16 |
Definition at line 241 of file fec_mpc52xx.h.
#define FEC_RCNTRL_MII_MODE 0x04 |
Definition at line 244 of file fec_mpc52xx.h.
#define FEC_RCNTRL_PROM 0x08 |
Definition at line 245 of file fec_mpc52xx.h.
#define FEC_RESET_CNTRL_ENABLE_IS_RESET 0x01000000 |
Definition at line 286 of file fec_mpc52xx.h.
#define FEC_RESET_CNTRL_RESET_FIFO 0x02000000 |
Definition at line 285 of file fec_mpc52xx.h.
#define FEC_RESET_DELAY 50 /* uS */ |
Definition at line 25 of file fec_mpc52xx.h.
Definition at line 21 of file fec_mpc52xx.h.
#define FEC_RX_NUM_BD 256 |
Definition at line 22 of file fec_mpc52xx.h.
#define FEC_TCNTRL_FDEN 0x00000004 |
Definition at line 251 of file fec_mpc52xx.h.
#define FEC_TCNTRL_GTS 0x00000001 |
Definition at line 249 of file fec_mpc52xx.h.
#define FEC_TCNTRL_HBC 0x00000002 |
Definition at line 250 of file fec_mpc52xx.h.
#define FEC_TCNTRL_RFC_PAUSE 0x00000010 |
Definition at line 253 of file fec_mpc52xx.h.
#define FEC_TCNTRL_TFC_PAUSE 0x00000008 |
Definition at line 252 of file fec_mpc52xx.h.
#define FEC_TX_NUM_BD 64 |
Definition at line 23 of file fec_mpc52xx.h.
#define FEC_WATCHDOG_TIMEOUT ((400*HZ)/1000) |
Definition at line 27 of file fec_mpc52xx.h.
#define FEC_XMIT_FSM_APPEND_CRC 0x02000000 |
Definition at line 288 of file fec_mpc52xx.h.
#define FEC_XMIT_FSM_ENABLE_CRC 0x01000000 |
Definition at line 289 of file fec_mpc52xx.h.
struct platform_driver mpc52xx_fec_mdio_driver |
Definition at line 147 of file fec_mpc52xx_phy.c.