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arch
mips
pci
fixup-sni.c
Go to the documentation of this file.
1
/*
2
* This file is subject to the terms and conditions of the GNU General Public
3
* License. See the file "COPYING" in the main directory of this archive
4
* for more details.
5
*
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* SNI specific PCI support for RM200/RM300.
7
*
8
* Copyright (C) 1997 - 2000, 2003, 04 Ralf Baechle (
[email protected]
)
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*/
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#include <linux/kernel.h>
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#include <
linux/init.h
>
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#include <linux/pci.h>
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14
#include <
asm/mipsregs.h
>
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#include <
asm/sni.h
>
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#include <irq.h>
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19
/*
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* PCIMT Shortcuts ...
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*/
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#define SCSI PCIMT_IRQ_SCSI
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#define ETH PCIMT_IRQ_ETHERNET
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#define INTA PCIMT_IRQ_INTA
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#define INTB PCIMT_IRQ_INTB
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#define INTC PCIMT_IRQ_INTC
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#define INTD PCIMT_IRQ_INTD
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/*
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* Device 0: PCI EISA Bridge (directly routed)
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* Device 1: NCR53c810 SCSI (directly routed)
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* Device 2: PCnet32 Ethernet (directly routed)
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* Device 3: VGA (routed to INTB)
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* Device 4: Unused
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* Device 5: Slot 2
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* Device 6: Slot 3
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* Device 7: Slot 4
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*
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* Documentation says the VGA is device 5 and device 3 is unused but that
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* seem to be a documentation error. At least on my RM200C the Cirrus
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* Logic CL-GD5434 VGA is device 3.
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*/
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static
char
irq_tab_rm200[8][5]
__initdata
= {
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/* INTA INTB INTC INTD */
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{ 0, 0, 0, 0, 0 },
/* EISA bridge */
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{
SCSI
,
SCSI
,
SCSI
,
SCSI
, SCSI },
/* SCSI */
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{
ETH
,
ETH
,
ETH
,
ETH
, ETH },
/* Ethernet */
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{
INTB
,
INTB
,
INTB
,
INTB
, INTB },
/* VGA */
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{ 0, 0, 0, 0, 0 },
/* Unused */
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{ 0,
INTB
,
INTC
,
INTD
,
INTA
},
/* Slot 2 */
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{ 0,
INTC
,
INTD
,
INTA
,
INTB
},
/* Slot 3 */
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{ 0,
INTD
,
INTA
,
INTB
,
INTC
},
/* Slot 4 */
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};
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/*
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* In Revision D of the RM300 Device 2 has become a normal purpose Slot 1
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*
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* The VGA card is optional for RM300 systems.
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*/
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static
char
irq_tab_rm300d[8][5]
__initdata
= {
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/* INTA INTB INTC INTD */
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{ 0, 0, 0, 0, 0 },
/* EISA bridge */
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{
SCSI
,
SCSI
,
SCSI
,
SCSI
, SCSI },
/* SCSI */
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{ 0,
INTC
,
INTD
,
INTA
,
INTB
},
/* Slot 1 */
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{
INTB
,
INTB
,
INTB
,
INTB
, INTB },
/* VGA */
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{ 0, 0, 0, 0, 0 },
/* Unused */
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{ 0,
INTB
,
INTC
,
INTD
,
INTA
},
/* Slot 2 */
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{ 0,
INTC
,
INTD
,
INTA
,
INTB
},
/* Slot 3 */
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{ 0,
INTD
,
INTA
,
INTB
,
INTC
},
/* Slot 4 */
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};
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static
char
irq_tab_rm300e[5][5]
__initdata
= {
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/* INTA INTB INTC INTD */
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{ 0, 0, 0, 0, 0 },
/* HOST bridge */
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{
SCSI
,
SCSI
,
SCSI
,
SCSI
, SCSI },
/* SCSI */
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{ 0,
INTC
,
INTD
,
INTA
,
INTB
},
/* Bridge/i960 */
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{ 0,
INTD
,
INTA
,
INTB
,
INTC
},
/* Slot 1 */
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{ 0,
INTA
,
INTB
,
INTC
,
INTD
},
/* Slot 2 */
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};
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#undef SCSI
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#undef ETH
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#undef INTA
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#undef INTB
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#undef INTC
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#undef INTD
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/*
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* PCIT Shortcuts ...
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*/
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#define SCSI0 PCIT_IRQ_SCSI0
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#define SCSI1 PCIT_IRQ_SCSI1
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#define ETH PCIT_IRQ_ETHERNET
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#define INTA PCIT_IRQ_INTA
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#define INTB PCIT_IRQ_INTB
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#define INTC PCIT_IRQ_INTC
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#define INTD PCIT_IRQ_INTD
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static
char
irq_tab_pcit[13][5]
__initdata
= {
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/* INTA INTB INTC INTD */
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{ 0, 0, 0, 0, 0 },
/* HOST bridge */
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{
SCSI0
,
SCSI0
,
SCSI0
,
SCSI0
, SCSI0 },
/* SCSI */
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{
SCSI1
,
SCSI1
,
SCSI1
,
SCSI1
, SCSI1 },
/* SCSI */
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{
ETH
,
ETH
,
ETH
,
ETH
, ETH },
/* Ethernet */
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{ 0,
INTA
,
INTB
,
INTC
,
INTD
},
/* PCI-PCI bridge */
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{ 0, 0, 0, 0, 0 },
/* Unused */
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{ 0, 0, 0, 0, 0 },
/* Unused */
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{ 0, 0, 0, 0, 0 },
/* Unused */
109
{ 0,
INTA
,
INTB
,
INTC
,
INTD
},
/* Slot 1 */
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{ 0,
INTB
,
INTC
,
INTD
,
INTA
},
/* Slot 2 */
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{ 0,
INTC
,
INTD
,
INTA
,
INTB
},
/* Slot 3 */
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{ 0,
INTD
,
INTA
,
INTB
,
INTC
},
/* Slot 4 */
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{ 0,
INTA
,
INTB
,
INTC
,
INTD
},
/* Slot 5 */
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};
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static
char
irq_tab_pcit_cplus[13][5]
__initdata
= {
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/* INTA INTB INTC INTD */
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{ 0, 0, 0, 0, 0 },
/* HOST bridge */
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{ 0,
INTB
,
INTC
,
INTD
,
INTA
},
/* PCI Slot 9 */
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{ 0, 0, 0, 0, 0 },
/* PCI-EISA */
121
{ 0, 0, 0, 0, 0 },
/* Unused */
122
{ 0,
INTA
,
INTB
,
INTC
,
INTD
},
/* PCI-PCI bridge */
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{ 0,
INTB
,
INTC
,
INTD
,
INTA
},
/* fixup */
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};
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126
static
inline
int
is_rm300_revd(
void
)
127
{
128
unsigned
char
csmsr = *(
volatile
unsigned
char
*)
PCIMT_CSMSR
;
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return
(csmsr & 0xa0) == 0x20;
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}
132
133
int
__init
pcibios_map_irq
(
const
struct
pci_dev
*
dev
,
u8
slot
,
u8
pin
)
134
{
135
switch
(
sni_brd_type
) {
136
case
SNI_BRD_PCI_TOWER_CPLUS
:
137
if
(slot == 4) {
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/*
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* SNI messed up interrupt wiring for onboard
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* PCI bus 1; we need to fix this up here
141
*/
142
while
(dev && dev->
bus
->number != 1)
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dev = dev->
bus
->self;
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if
(dev && dev->
devfn
>=
PCI_DEVFN
(4, 0))
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slot = 5;
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}
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return
irq_tab_pcit_cplus[
slot
][
pin
];
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case
SNI_BRD_PCI_TOWER
:
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return
irq_tab_pcit[
slot
][
pin
];
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case
SNI_BRD_PCI_MTOWER
:
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if
(is_rm300_revd())
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return
irq_tab_rm300d[
slot
][
pin
];
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/* fall through */
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case
SNI_BRD_PCI_DESKTOP
:
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return
irq_tab_rm200[
slot
][
pin
];
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case
SNI_BRD_PCI_MTOWER_CPLUS
:
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return
irq_tab_rm300e[
slot
][
pin
];
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}
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return
0;
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int
pcibios_plat_dev_init
(
struct
pci_dev
*
dev
)
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{
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return
0;
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}
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