#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/i2c.h>
#include <linux/fs.h>
#include <linux/io.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/jiffies.h>
#include <linux/pci.h>
#include <linux/mutex.h>
#include <linux/ktime.h>
#include <linux/slab.h>

Data Structures
struct	i2c_algo_pch_data

struct	adapter_info

Macros
#define	PCH_EVENT_SET 0 /* I2C Interrupt Event Set Status */

#define	PCH_EVENT_NONE 1 /* I2C Interrupt Event Clear Status */

#define	PCH_MAX_CLK 100000 /* Maximum Clock speed in MHz */

#define	PCH_BUFFER_MODE_ENABLE 0x0002 /* flag for Buffer mode enable */

#define	PCH_EEPROM_SW_RST_MODE_ENABLE 0x0008 /* EEPROM SW RST enable flag */

#define	PCH_I2CSADR 0x00 /* I2C slave address register */

#define	PCH_I2CCTL 0x04 /* I2C control register */

#define	PCH_I2CSR 0x08 /* I2C status register */

#define	PCH_I2CDR 0x0C /* I2C data register */

#define	PCH_I2CMON 0x10 /* I2C bus monitor register */

#define	PCH_I2CBC 0x14 /* I2C bus transfer rate setup counter */

#define	PCH_I2CMOD 0x18 /* I2C mode register */

#define	PCH_I2CBUFSLV 0x1C /* I2C buffer mode slave address register */

#define	PCH_I2CBUFSUB 0x20 /* I2C buffer mode subaddress register */

#define	PCH_I2CBUFFOR 0x24 /* I2C buffer mode format register */

#define	PCH_I2CBUFCTL 0x28 /* I2C buffer mode control register */

#define	PCH_I2CBUFMSK 0x2C /* I2C buffer mode interrupt mask register */

#define	PCH_I2CBUFSTA 0x30 /* I2C buffer mode status register */

#define	PCH_I2CBUFLEV 0x34 /* I2C buffer mode level register */

#define	PCH_I2CESRFOR 0x38 /* EEPROM software reset mode format register */

#define	PCH_I2CESRCTL 0x3C /* EEPROM software reset mode ctrl register */

#define	PCH_I2CESRMSK 0x40 /* EEPROM software reset mode */

#define	PCH_I2CESRSTA 0x44 /* EEPROM software reset mode status register */

#define	PCH_I2CTMR 0x48 /* I2C timer register */

#define	PCH_I2CSRST 0xFC /* I2C reset register */

#define	PCH_I2CNF 0xF8 /* I2C noise filter register */

#define	BUS_IDLE_TIMEOUT 20

#define	PCH_I2CCTL_I2CMEN 0x0080

#define	TEN_BIT_ADDR_DEFAULT 0xF000

#define	TEN_BIT_ADDR_MASK 0xF0

#define	PCH_START 0x0020

#define	PCH_RESTART 0x0004

#define	PCH_ESR_START 0x0001

#define	PCH_BUFF_START 0x1

#define	PCH_REPSTART 0x0004

#define	PCH_ACK 0x0008

#define	PCH_GETACK 0x0001

#define	CLR_REG 0x0

#define	I2C_RD 0x1

#define	I2CMCF_BIT 0x0080

#define	I2CMIF_BIT 0x0002

#define	I2CMAL_BIT 0x0010

#define	I2CBMFI_BIT 0x0001

#define	I2CBMAL_BIT 0x0002

#define	I2CBMNA_BIT 0x0004

#define	I2CBMTO_BIT 0x0008

#define	I2CBMIS_BIT 0x0010

#define	I2CESRFI_BIT 0X0001

#define	I2CESRTO_BIT 0x0002

#define	I2CESRFIIE_BIT 0x1

#define	I2CESRTOIE_BIT 0x2

#define	I2CBMDZ_BIT 0x0040

#define	I2CBMAG_BIT 0x0020

#define	I2CMBB_BIT 0x0020

#define	BUFFER_MODE_MASK

#define	I2C_ADDR_MSK 0xFF

#define	I2C_MSB_2B_MSK 0x300

#define	FAST_MODE_CLK 400

#define	FAST_MODE_EN 0x0001

#define	SUB_ADDR_LEN_MAX 4

#define	BUF_LEN_MAX 32

#define	PCH_BUFFER_MODE 0x1

#define	EEPROM_SW_RST_MODE 0x0002

#define	NORMAL_INTR_ENBL 0x0300

#define	EEPROM_RST_INTR_ENBL (I2CESRFIIE_BIT \| I2CESRTOIE_BIT)

#define	EEPROM_RST_INTR_DISBL 0x0

#define	BUFFER_MODE_INTR_ENBL 0x001F

#define	BUFFER_MODE_INTR_DISBL 0x0

#define	NORMAL_MODE 0x0

#define	BUFFER_MODE 0x1

#define	EEPROM_SR_MODE 0x2

#define	I2C_TX_MODE 0x0010

#define	PCH_BUF_TX 0xFFF7

#define	PCH_BUF_RD 0x0008

#define	I2C_ERROR_MASK

#define	I2CMAL_EVENT 0x0001

#define	I2CMCF_EVENT 0x0002

#define	I2CBMFI_EVENT 0x0004

#define	I2CBMAL_EVENT 0x0008

#define	I2CBMNA_EVENT 0x0010

#define	I2CBMTO_EVENT 0x0020

#define	I2CBMIS_EVENT 0x0040

#define	I2CESRFI_EVENT 0x0080

#define	I2CESRTO_EVENT 0x0100

#define	PCI_DEVICE_ID_PCH_I2C 0x8817

#define	pch_dbg(adap, fmt, arg...) dev_dbg(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)

#define	pch_err(adap, fmt, arg...) dev_err(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)

#define	pch_pci_err(pdev, fmt, arg...) dev_err(&pdev->dev, "%s :" fmt, __func__, ##arg)

#define	pch_pci_dbg(pdev, fmt, arg...) dev_dbg(&pdev->dev, "%s :" fmt, __func__, ##arg)

#define	PCH_I2C_MAX_DEV 2

#define	PCI_VENDOR_ID_ROHM 0x10DB

#define	PCI_DEVICE_ID_ML7213_I2C 0x802D

#define	PCI_DEVICE_ID_ML7223_I2C 0x8010

#define	PCI_DEVICE_ID_ML7831_I2C 0x8817

#define	pch_i2c_suspend NULL

#define	pch_i2c_resume NULL

Functions
	module_pci_driver (pch_pcidriver)

	MODULE_DESCRIPTION ("Intel EG20T PCH/LAPIS Semico ML7213/ML7223/ML7831 IOH I2C")

	MODULE_LICENSE ("GPL")

	MODULE_AUTHOR ("Tomoya MORINAGA. <[email protected]>")

	module_param (pch_i2c_speed, int,(S_IRUSR\|S_IWUSR))

	module_param (pch_clk, int,(S_IRUSR\|S_IWUSR))

Macro Definition Documentation

#define BUF_LEN_MAX 32

Definition at line 97 of file i2c-eg20t.c.

#define BUFFER_MODE 0x1

Definition at line 106 of file i2c-eg20t.c.

#define BUFFER_MODE_INTR_DISBL 0x0

Definition at line 104 of file i2c-eg20t.c.

#define BUFFER_MODE_INTR_ENBL 0x001F

Definition at line 103 of file i2c-eg20t.c.

#define BUFFER_MODE_MASK

Value:

(I2CBMFI_BIT | I2CBMAL_BIT | I2CBMNA_BIT | \

I2CBMTO_BIT | I2CBMIS_BIT)

Definition at line 90 of file i2c-eg20t.c.

#define BUS_IDLE_TIMEOUT 20

Definition at line 62 of file i2c-eg20t.c.

#define CLR_REG 0x0

Definition at line 73 of file i2c-eg20t.c.

#define EEPROM_RST_INTR_DISBL 0x0

Definition at line 102 of file i2c-eg20t.c.

#define EEPROM_RST_INTR_ENBL (I2CESRFIIE_BIT | I2CESRTOIE_BIT)

Definition at line 101 of file i2c-eg20t.c.

#define EEPROM_SR_MODE 0x2

Definition at line 107 of file i2c-eg20t.c.

#define EEPROM_SW_RST_MODE 0x0002

Definition at line 99 of file i2c-eg20t.c.

#define FAST_MODE_CLK 400

Definition at line 94 of file i2c-eg20t.c.

#define FAST_MODE_EN 0x0001

Definition at line 95 of file i2c-eg20t.c.

#define I2C_ADDR_MSK 0xFF

Definition at line 92 of file i2c-eg20t.c.

#define I2C_ERROR_MASK

Value:

(I2CESRTO_EVENT | I2CBMIS_EVENT | I2CBMTO_EVENT | \

I2CBMNA_EVENT | I2CBMAL_EVENT | I2CMAL_EVENT)

Definition at line 111 of file i2c-eg20t.c.

#define I2C_MSB_2B_MSK 0x300

Definition at line 93 of file i2c-eg20t.c.

#define I2C_RD 0x1

Definition at line 74 of file i2c-eg20t.c.

#define I2C_TX_MODE 0x0010

Definition at line 108 of file i2c-eg20t.c.

#define I2CBMAG_BIT 0x0020

Definition at line 88 of file i2c-eg20t.c.

#define I2CBMAL_BIT 0x0002

Definition at line 79 of file i2c-eg20t.c.

#define I2CBMAL_EVENT 0x0008

Definition at line 116 of file i2c-eg20t.c.

#define I2CBMDZ_BIT 0x0040

Definition at line 87 of file i2c-eg20t.c.

#define I2CBMFI_BIT 0x0001

Definition at line 78 of file i2c-eg20t.c.

#define I2CBMFI_EVENT 0x0004

Definition at line 115 of file i2c-eg20t.c.

#define I2CBMIS_BIT 0x0010

Definition at line 82 of file i2c-eg20t.c.

#define I2CBMIS_EVENT 0x0040

Definition at line 119 of file i2c-eg20t.c.

#define I2CBMNA_BIT 0x0004

Definition at line 80 of file i2c-eg20t.c.

#define I2CBMNA_EVENT 0x0010

Definition at line 117 of file i2c-eg20t.c.

#define I2CBMTO_BIT 0x0008

Definition at line 81 of file i2c-eg20t.c.

#define I2CBMTO_EVENT 0x0020

Definition at line 118 of file i2c-eg20t.c.

#define I2CESRFI_BIT 0X0001

Definition at line 83 of file i2c-eg20t.c.

#define I2CESRFI_EVENT 0x0080

Definition at line 120 of file i2c-eg20t.c.

#define I2CESRFIIE_BIT 0x1

Definition at line 85 of file i2c-eg20t.c.

#define I2CESRTO_BIT 0x0002

Definition at line 84 of file i2c-eg20t.c.

#define I2CESRTO_EVENT 0x0100

Definition at line 121 of file i2c-eg20t.c.

#define I2CESRTOIE_BIT 0x2

Definition at line 86 of file i2c-eg20t.c.

#define I2CMAL_BIT 0x0010

Definition at line 77 of file i2c-eg20t.c.

#define I2CMAL_EVENT 0x0001

Definition at line 113 of file i2c-eg20t.c.

#define I2CMBB_BIT 0x0020

Definition at line 89 of file i2c-eg20t.c.

#define I2CMCF_BIT 0x0080

Definition at line 75 of file i2c-eg20t.c.

#define I2CMCF_EVENT 0x0002

Definition at line 114 of file i2c-eg20t.c.

#define I2CMIF_BIT 0x0002

Definition at line 76 of file i2c-eg20t.c.

#define NORMAL_INTR_ENBL 0x0300

Definition at line 100 of file i2c-eg20t.c.

#define NORMAL_MODE 0x0

Definition at line 105 of file i2c-eg20t.c.

#define PCH_ACK 0x0008

Definition at line 71 of file i2c-eg20t.c.

#define PCH_BUF_RD 0x0008

Definition at line 110 of file i2c-eg20t.c.

#define PCH_BUF_TX 0xFFF7

Definition at line 109 of file i2c-eg20t.c.

#define PCH_BUFF_START 0x1

Definition at line 69 of file i2c-eg20t.c.

#define PCH_BUFFER_MODE 0x1

Definition at line 98 of file i2c-eg20t.c.

#define PCH_BUFFER_MODE_ENABLE 0x0002 /* flag for Buffer mode enable */

Definition at line 37 of file i2c-eg20t.c.

#define pch_dbg	(	adap,
		fmt,
		arg...
	)	dev_dbg(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)

Definition at line 124 of file i2c-eg20t.c.

#define PCH_EEPROM_SW_RST_MODE_ENABLE 0x0008 /* EEPROM SW RST enable flag */

Definition at line 38 of file i2c-eg20t.c.

#define pch_err	(	adap,
		fmt,
		arg...
	)	dev_err(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)

Definition at line 127 of file i2c-eg20t.c.

#define PCH_ESR_START 0x0001

Definition at line 68 of file i2c-eg20t.c.

#define PCH_EVENT_NONE 1 /* I2C Interrupt Event Clear Status */

Definition at line 35 of file i2c-eg20t.c.

#define PCH_EVENT_SET 0 /* I2C Interrupt Event Set Status */

Definition at line 34 of file i2c-eg20t.c.

#define PCH_GETACK 0x0001

Definition at line 72 of file i2c-eg20t.c.

#define PCH_I2C_MAX_DEV 2

Definition at line 142 of file i2c-eg20t.c.

#define pch_i2c_resume NULL

Definition at line 944 of file i2c-eg20t.c.

#define pch_i2c_suspend NULL

Definition at line 943 of file i2c-eg20t.c.

#define PCH_I2CBC 0x14 /* I2C bus transfer rate setup counter */

Definition at line 45 of file i2c-eg20t.c.

#define PCH_I2CBUFCTL 0x28 /* I2C buffer mode control register */

Definition at line 50 of file i2c-eg20t.c.

#define PCH_I2CBUFFOR 0x24 /* I2C buffer mode format register */

Definition at line 49 of file i2c-eg20t.c.

#define PCH_I2CBUFLEV 0x34 /* I2C buffer mode level register */

Definition at line 53 of file i2c-eg20t.c.

#define PCH_I2CBUFMSK 0x2C /* I2C buffer mode interrupt mask register */

Definition at line 51 of file i2c-eg20t.c.

#define PCH_I2CBUFSLV 0x1C /* I2C buffer mode slave address register */

Definition at line 47 of file i2c-eg20t.c.

#define PCH_I2CBUFSTA 0x30 /* I2C buffer mode status register */

Definition at line 52 of file i2c-eg20t.c.

#define PCH_I2CBUFSUB 0x20 /* I2C buffer mode subaddress register */

Definition at line 48 of file i2c-eg20t.c.

#define PCH_I2CCTL 0x04 /* I2C control register */

Definition at line 41 of file i2c-eg20t.c.

#define PCH_I2CCTL_I2CMEN 0x0080

Definition at line 63 of file i2c-eg20t.c.

#define PCH_I2CDR 0x0C /* I2C data register */

Definition at line 43 of file i2c-eg20t.c.

#define PCH_I2CESRCTL 0x3C /* EEPROM software reset mode ctrl register */

Definition at line 55 of file i2c-eg20t.c.

#define PCH_I2CESRFOR 0x38 /* EEPROM software reset mode format register */

Definition at line 54 of file i2c-eg20t.c.

#define PCH_I2CESRMSK 0x40 /* EEPROM software reset mode */

Definition at line 56 of file i2c-eg20t.c.

#define PCH_I2CESRSTA 0x44 /* EEPROM software reset mode status register */

Definition at line 57 of file i2c-eg20t.c.

#define PCH_I2CMOD 0x18 /* I2C mode register */

Definition at line 46 of file i2c-eg20t.c.

#define PCH_I2CMON 0x10 /* I2C bus monitor register */

Definition at line 44 of file i2c-eg20t.c.

#define PCH_I2CNF 0xF8 /* I2C noise filter register */

Definition at line 60 of file i2c-eg20t.c.

#define PCH_I2CSADR 0x00 /* I2C slave address register */

Definition at line 40 of file i2c-eg20t.c.

#define PCH_I2CSR 0x08 /* I2C status register */

Definition at line 42 of file i2c-eg20t.c.

#define PCH_I2CSRST 0xFC /* I2C reset register */

Definition at line 59 of file i2c-eg20t.c.

#define PCH_I2CTMR 0x48 /* I2C timer register */

Definition at line 58 of file i2c-eg20t.c.

#define PCH_MAX_CLK 100000 /* Maximum Clock speed in MHz */

Definition at line 36 of file i2c-eg20t.c.

#define pch_pci_dbg	(	pdev,
		fmt,
		arg...
	)	dev_dbg(&pdev->dev, "%s :" fmt, __func__, ##arg)

Definition at line 133 of file i2c-eg20t.c.

#define pch_pci_err	(	pdev,
		fmt,
		arg...
	)	dev_err(&pdev->dev, "%s :" fmt, __func__, ##arg)

Definition at line 130 of file i2c-eg20t.c.

#define PCH_REPSTART 0x0004

Definition at line 70 of file i2c-eg20t.c.

#define PCH_RESTART 0x0004

Definition at line 67 of file i2c-eg20t.c.

#define PCH_START 0x0020

Definition at line 66 of file i2c-eg20t.c.

#define PCI_DEVICE_ID_ML7213_I2C 0x802D

Definition at line 186 of file i2c-eg20t.c.

#define PCI_DEVICE_ID_ML7223_I2C 0x8010

Definition at line 187 of file i2c-eg20t.c.

#define PCI_DEVICE_ID_ML7831_I2C 0x8817

Definition at line 188 of file i2c-eg20t.c.

#define PCI_DEVICE_ID_PCH_I2C 0x8817

Definition at line 122 of file i2c-eg20t.c.

#define PCI_VENDOR_ID_ROHM 0x10DB

Definition at line 185 of file i2c-eg20t.c.

#define SUB_ADDR_LEN_MAX 4

Definition at line 96 of file i2c-eg20t.c.

#define TEN_BIT_ADDR_DEFAULT 0xF000

Definition at line 64 of file i2c-eg20t.c.

#define TEN_BIT_ADDR_MASK 0xF0

Definition at line 65 of file i2c-eg20t.c.

Function Documentation

MODULE_AUTHOR ( "Tomoya MORINAGA. <[email protected]>" )

MODULE_DESCRIPTION ( "Intel EG20T PCH/LAPIS Semico ML7213/ML7223/ML7831 IOH I2C" )

MODULE_LICENSE ( "GPL" )

module_param	(	pch_i2c_speed	,
		int	,
		(S_IRUSR\|S_IWUSR)
	)

module_param	(	pch_clk	,
		int	,
		(S_IRUSR\|S_IWUSR)
	)

module_pci_driver ( pch_pcidriver )

Data Structures

Macros

Functions

Macro Definition Documentation

Function Documentation