31 #include <linux/errno.h>
35 #include <linux/module.h>
37 #include <linux/types.h>
47 static unsigned char sysint1_assign[16] = {
48 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
49 static unsigned char sysint2_assign[16] = {
50 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
52 #define ICU1_TYPE1_BASE 0x0b000080UL
53 #define ICU2_TYPE1_BASE 0x0b000200UL
55 #define ICU1_TYPE2_BASE 0x0f000080UL
56 #define ICU2_TYPE2_BASE 0x0f0000a0UL
58 #define ICU1_SIZE 0x20
59 #define ICU2_SIZE 0x1c
61 #define SYSINT1REG 0x00
62 #define PIUINTREG 0x02
63 #define INTASSIGN0 0x04
64 #define INTASSIGN1 0x06
65 #define GIUINTLREG 0x08
66 #define DSIUINTREG 0x0a
67 #define MSYSINT1REG 0x0c
68 #define MPIUINTREG 0x0e
69 #define MAIUINTREG 0x10
70 #define MKIUINTREG 0x12
71 #define MMACINTREG 0x12
72 #define MGIUINTLREG 0x14
73 #define MDSIUINTREG 0x16
76 #define INTASSIGN2 0x1c
77 #define INTASSIGN3 0x1e
79 #define SYSINT2REG 0x00
80 #define GIUINTHREG 0x02
81 #define FIRINTREG 0x04
82 #define MSYSINT2REG 0x06
83 #define MGIUINTHREG 0x08
84 #define MFIRINTREG 0x0a
85 #define PCIINTREG 0x0c
86 #define PCIINT0 0x0001
87 #define SCUINTREG 0x0e
88 #define SCUINT0 0x0001
89 #define CSIINTREG 0x10
90 #define MPCIINTREG 0x12
91 #define MSCUINTREG 0x14
92 #define MCSIINTREG 0x16
93 #define BCUINTREG 0x18
94 #define BCUINTR 0x0001
95 #define MBCUINTREG 0x1a
97 #define SYSINT1_IRQ_TO_PIN(x) ((x) - SYSINT1_IRQ_BASE)
98 #define SYSINT2_IRQ_TO_PIN(x) ((x) - SYSINT2_IRQ_BASE)
100 #define INT_TO_IRQ(x) ((x) + 2)
102 #define icu1_read(offset) readw(icu1_base + (offset))
103 #define icu1_write(offset, value) writew((value), icu1_base + (offset))
105 #define icu2_read(offset) readw(icu2_base + (offset))
106 #define icu2_write(offset, value) writew((value), icu2_base + (offset))
108 #define INTASSIGN_MAX 4
109 #define INTASSIGN_MASK 0x0007
445 static void disable_sysint1_irq(
struct irq_data *
d)
450 static void enable_sysint1_irq(
struct irq_data *d)
455 static struct irq_chip sysint1_irq_type = {
457 .irq_mask = disable_sysint1_irq,
458 .irq_unmask = enable_sysint1_irq,
461 static void disable_sysint2_irq(
struct irq_data *d)
466 static void enable_sysint2_irq(
struct irq_data *d)
471 static struct irq_chip sysint2_irq_type = {
473 .irq_mask = disable_sysint2_irq,
474 .irq_unmask = enable_sysint2_irq,
477 static inline int set_sysint1_assign(
unsigned int irq,
unsigned char assign)
497 intassign0 |= (
uint16_t)assign << 3;
501 intassign0 |= (
uint16_t)assign << 6;
505 intassign0 |= (
uint16_t)assign << 9;
509 intassign0 |= (
uint16_t)assign << 12;
517 intassign1 |= (
uint16_t)assign << 6;
521 intassign1 |= (
uint16_t)assign << 9;
528 sysint1_assign[
pin] = assign;
537 static inline int set_sysint2_assign(
unsigned int irq,
unsigned char assign)
557 intassign2 |= (
uint16_t)assign << 3;
561 intassign2 |= (
uint16_t)assign << 6;
565 intassign2 |= (
uint16_t)assign << 9;
569 intassign2 |= (
uint16_t)assign << 12;
577 intassign3 |= (
uint16_t)assign << 3;
581 intassign3 |= (
uint16_t)assign << 6;
585 intassign3 |= (
uint16_t)assign << 9;
589 intassign3 |= (
uint16_t)assign << 12;
596 sysint2_assign[
pin] = assign;
616 retval = set_sysint1_assign(irq, intassign);
618 retval = set_sysint2_assign(irq, intassign);
625 static int icu_get_irq(
unsigned int irq)
641 for (i = 0; i < 16; i++) {
642 if (irq ==
INT_TO_IRQ(sysint1_assign[i]) && (mask1 & (1 << i)))
648 for (i = 0; i < 16; i++) {
649 if (irq ==
INT_TO_IRQ(sysint2_assign[i]) && (mask2 & (1 << i)))
654 printk(
KERN_ERR "spurious ICU interrupt: %04x,%04x\n", pend1, pend2);
661 static int __init vr41xx_icu_init(
void)
663 unsigned long icu1_start, icu2_start;
692 if (icu1_base ==
NULL) {
699 if (icu2_base ==
NULL) {
713 irq_set_chip_and_handler(i, &sysint1_irq_type,
717 irq_set_chip_and_handler(i, &sysint2_irq_type,