enum | {
UNUSED_INTCA = 0,
ENABLED,
DISABLED,
DIRC,
CRYPT1_ERR,
CRYPT2_STD,
IIC1_ALI1,
IIC1_TACKI1,
IIC1_WAITI1,
IIC1_DTEI1,
ARM11_IRQPMU,
ARM11_COMMTX,
ARM11_COMMRX,
ETM11_ACQCMP,
ETM11_FULL,
MFI_MFIM,
MFI_MFIS,
BBIF1,
BBIF2,
USBDMAC_USHDMI,
USBHS_USHI0,
USBHS_USHI1,
CMT1_CMT10,
CMT1_CMT11,
CMT1_CMT12,
CMT1_CMT13,
CMT2,
CMT3,
KEYSC_KEY,
SCIFA0,
SCIFA1,
SCIFA2,
SCIFA3,
MSIOF2,
MSIOF1,
SCIFA4,
SCIFA5,
SCIFB,
FLCTL_FLSTEI,
FLCTL_FLTENDI,
FLCTL_FLTREQ0I,
FLCTL_FLTREQ1I,
SDHI0,
SDHI1,
MSU_MSU,
MSU_MSU2,
IREM,
SIU,
SPU,
IRDA,
TPU0,
TPU1,
TPU2,
TPU3,
TPU4,
LCRC,
PINT1,
PINT2,
TTI20,
MISTY,
DDM,
SDHI2,
RWDT0,
RWDT1,
DMAC_1_DEI0,
DMAC_1_DEI1,
DMAC_1_DEI2,
DMAC_1_DEI3,
DMAC_2_DEI4,
DMAC_2_DEI5,
DMAC_2_DADERR,
DMAC2_1_DEI0,
DMAC2_1_DEI1,
DMAC2_1_DEI2,
DMAC2_1_DEI3,
DMAC2_2_DEI4,
DMAC2_2_DEI5,
DMAC2_2_DADERR,
DMAC3_1_DEI0,
DMAC3_1_DEI1,
DMAC3_1_DEI2,
DMAC3_1_DEI3,
DMAC3_2_DEI4,
DMAC3_2_DEI5,
DMAC3_2_DADERR,
DMAC_1,
DMAC_2,
DMAC2_1,
DMAC2_2,
DMAC3_1,
DMAC3_2,
ETM11,
ARM11,
USBHS,
FLCTL,
IIC1
} |
enum | {
UNUSED_INTCS = 0,
INTCS,
VIO2_VEU0,
VIO2_VEU1,
VIO2_VEU2,
VIO2_VEU3,
VIO3_VOU,
RTDMAC_1_DEI0,
RTDMAC_1_DEI1,
RTDMAC_1_DEI2,
RTDMAC_1_DEI3,
VIO1_CEU,
VIO1_BEU0,
VIO1_BEU1,
VIO1_BEU2,
VPU,
SGX530,
_2DDMAC_2DDM0,
_2DDMAC_2DDM1,
_2DDMAC_2DDM2,
_2DDMAC_2DDM3,
IIC2_ALI2,
IIC2_TACKI2,
IIC2_WAITI2,
IIC2_DTEI2,
IPMMU_IPMMUB,
IPMMU_IPMMUS,
RTDMAC_2_DEI4,
RTDMAC_2_DEI5,
RTDMAC_2_DADERR,
MSIOF,
IIC0_ALI0,
IIC0_TACKI0,
IIC0_WAITI0,
IIC0_DTEI0,
TMU_TUNI0,
TMU_TUNI1,
TMU_TUNI2,
CMT,
TSIF,
IPMMUI,
MVI3,
ICB,
PEP,
ASA,
BEM,
VE2HO,
HQE,
JPEG,
LCDC,
_2DDMAC,
RTDMAC_1,
RTDMAC_2,
VEU,
BEU,
IIC0,
IPMMU,
IIC2
} |