| enum | {
UNUSED_INTCA = 0,
ENABLED,
DISABLED,
DIRC,
_2DG,
CRYPT_STD,
IIC1_ALI1,
IIC1_TACKI1,
IIC1_WAITI1,
IIC1_DTEI1,
AP_ARM_IRQPMU,
AP_ARM_COMMTX,
AP_ARM_COMMRX,
MFI_MFIM,
MFI_MFIS,
BBIF1,
BBIF2,
USBDMAC_USHDMI,
USBHS_USHI0,
USBHS_USHI1,
_3DG_SGX540,
CMT1_CMT10,
CMT1_CMT11,
CMT1_CMT12,
CMT1_CMT13,
CMT2,
CMT3,
KEYSC_KEY,
SCIFA0,
SCIFA1,
SCIFA2,
SCIFA3,
MSIOF2,
MSIOF1,
SCIFA4,
SCIFA5,
SCIFB,
FLCTL_FLSTEI,
FLCTL_FLTENDI,
FLCTL_FLTREQ0I,
FLCTL_FLTREQ1I,
SDHI0,
SDHI1,
MSU_MSU,
MSU_MSU2,
IRREM,
MSUG,
IRDA,
TPU0,
TPU1,
TPU2,
TPU3,
TPU4,
LCRC,
PINTCA_PINT1,
PINTCA_PINT2,
TTI20,
MISTY,
DDM,
RWDT0,
RWDT1,
DMAC_1_DEI0,
DMAC_1_DEI1,
DMAC_1_DEI2,
DMAC_1_DEI3,
DMAC_2_DEI4,
DMAC_2_DEI5,
DMAC_2_DADERR,
DMAC2_1_DEI0,
DMAC2_1_DEI1,
DMAC2_1_DEI2,
DMAC2_1_DEI3,
DMAC2_2_DEI4,
DMAC2_2_DEI5,
DMAC2_2_DADERR,
DMAC3_1_DEI0,
DMAC3_1_DEI1,
DMAC3_1_DEI2,
DMAC3_1_DEI3,
DMAC3_2_DEI4,
DMAC3_2_DEI5,
DMAC3_2_DADERR,
SHWYSTAT_RT,
SHWYSTAT_HS,
SHWYSTAT_COM,
ICUSB_ICUSB0,
ICUSB_ICUSB1,
ICUDMC_ICUDMC1,
ICUDMC_ICUDMC2,
SPU2_SPU0,
SPU2_SPU1,
FSI,
FMSI,
SCUV,
IPMMU_IPMMUB,
AP_ARM_CTIIRQ,
AP_ARM_DMAEXTERRIRQ,
AP_ARM_DMAIRQ,
AP_ARM_DMASIRQ,
MFIS2,
CPORTR2S,
CMT14,
CMT15,
SCIFA6,
DMAC_1,
DMAC_2,
DMAC2_1,
DMAC2_2,
DMAC3_1,
DMAC3_2,
SHWYSTAT,
AP_ARM1,
AP_ARM2,
USBHS,
SPU2,
FLCTL,
IIC1,
ICUSB,
ICUDMC
} |
| enum | {
UNUSED_INTCS = 0,
INTCS,
VEU_VEU0,
VEU_VEU1,
VEU_VEU2,
VEU_VEU3,
RTDMAC1_1_DEI0,
RTDMAC1_1_DEI1,
RTDMAC1_1_DEI2,
RTDMAC1_1_DEI3,
CEU,
BEU_BEU0,
BEU_BEU1,
BEU_BEU2,
VPU,
TSIF1,
_2DDMAC,
IIC2_ALI2,
IIC2_TACKI2,
IIC2_WAITI2,
IIC2_DTEI2,
IPMMU_IPMMUR,
IPMMU_IPMMUR2,
RTDMAC1_2_DEI4,
RTDMAC1_2_DEI5,
RTDMAC1_2_DADERR,
IIC0_ALI0,
IIC0_TACKI0,
IIC0_WAITI0,
IIC0_DTEI0,
TMU_TUNI0,
TMU_TUNI1,
TMU_TUNI2,
CMT0,
TSIF0,
LMB,
MVI3,
ICB,
PEP,
ASA,
HQE,
JPU,
LCDC0,
RTDMAC2_1_DEI0,
RTDMAC2_1_DEI1,
RTDMAC2_1_DEI2,
RTDMAC2_1_DEI3,
RTDMAC2_2_DEI4,
RTDMAC2_2_DEI5,
RTDMAC2_2_DADERR,
FRC,
LCDC1,
CSIRX,
DSITX_DSITX0,
DSITX_DSITX1,
TMU1_TUNI10,
TMU1_TUNI11,
TMU1_TUNI12,
TSIF2,
CMT4,
CPORTS2R,
RTDMAC1_1,
RTDMAC1_2,
VEU,
BEU,
IIC0,
__IGNORE =(MSU) IPMMU,
IIC2,
RTDMAC2_1,
RTDMAC2_2,
DSITX,
__IGNORE =(MSU) IPMMU
} |