#include <linux/init.h>
#include <linux/bitmap.h>
#include <linux/debugfs.h>
#include <linux/export.h>
#include <linux/slab.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/pci.h>
#include <linux/dmar.h>
#include <linux/dma-mapping.h>
#include <linux/mempool.h>
#include <linux/timer.h>
#include <linux/iova.h>
#include <linux/iommu.h>
#include <linux/intel-iommu.h>
#include <linux/syscore_ops.h>
#include <linux/tboot.h>
#include <linux/dmi.h>
#include <linux/pci-ats.h>
#include <linux/memblock.h>
#include <asm/irq_remapping.h>
#include <asm/cacheflush.h>
#include <asm/iommu.h>

Data Structures
struct	root_entry

struct	context_entry

struct	dma_pte

struct	dmar_domain

struct	device_domain_info

struct	deferred_flush_tables

Macros
#define	ROOT_SIZE VTD_PAGE_SIZE

#define	CONTEXT_SIZE VTD_PAGE_SIZE

#define	IS_GFX_DEVICE(pdev) ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)

#define	IS_ISA_DEVICE(pdev) ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA)

#define	IS_AZALIA(pdev) ((pdev)->vendor == 0x8086 && (pdev)->device == 0x3a3e)

#define	IOAPIC_RANGE_START (0xfee00000)

#define	IOAPIC_RANGE_END (0xfeefffff)

#define	IOVA_START_ADDR (0x1000)

#define	DEFAULT_DOMAIN_ADDRESS_WIDTH 48

#define	MAX_AGAW_WIDTH 64

#define	__DOMAIN_MAX_PFN(gaw) ((((uint64_t)1) << (gaw-VTD_PAGE_SHIFT)) - 1)

#define	__DOMAIN_MAX_ADDR(gaw) ((((uint64_t)1) << gaw) - 1)

#define	DOMAIN_MAX_PFN(gaw)

#define	DOMAIN_MAX_ADDR(gaw) (((uint64_t)__DOMAIN_MAX_PFN(gaw)) << VTD_PAGE_SHIFT)

#define	IOVA_PFN(addr) ((addr) >> PAGE_SHIFT)

#define	DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32))

#define	DMA_64BIT_PFN IOVA_PFN(DMA_BIT_MASK(64))

#define	LEVEL_STRIDE (9)

#define	LEVEL_MASK (((u64)1 << LEVEL_STRIDE) - 1)

#define	INTEL_IOMMU_PGSIZES (~0xFFFUL)

#define	ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))

#define	DOMAIN_FLAG_P2P_MULTIPLE_DEVICES (1 << 0)

#define	DOMAIN_FLAG_VIRTUAL_MACHINE (1 << 1)

#define	DOMAIN_FLAG_STATIC_IDENTITY (1 << 2)

#define	IOMMU_UNITS_SUPPORTED 64

#define	HIGH_WATER_MARK 250

#define	DUMMY_DEVICE_DOMAIN_INFO ((struct device_domain_info *)(-1))

#define	IDENTMAP_ALL 1

#define	IDENTMAP_GFX 2

#define	IDENTMAP_AZALIA 4

#define	REQ_ACS_FLAGS (PCI_ACS_SV \| PCI_ACS_RR \| PCI_ACS_CR \| PCI_ACS_UF)

#define	GGC 0x52

#define	GGC_MEMORY_SIZE_MASK (0xf << 8)

#define	GGC_MEMORY_SIZE_NONE (0x0 << 8)

#define	GGC_MEMORY_SIZE_1M (0x1 << 8)

#define	GGC_MEMORY_SIZE_2M (0x3 << 8)

#define	GGC_MEMORY_VT_ENABLED (0x8 << 8)

#define	GGC_MEMORY_SIZE_2M_VT (0x9 << 8)

#define	GGC_MEMORY_SIZE_3M_VT (0xa << 8)

#define	GGC_MEMORY_SIZE_4M_VT (0xb << 8)

Functions
	DEFINE_TIMER (unmap_timer, flush_unmaps_timeout, 0, 0)

	EXPORT_SYMBOL_GPL (intel_iommu_enabled)

	EXPORT_SYMBOL_GPL (intel_iommu_gfx_mapped)

	__setup ("intel_iommu=", intel_iommu_setup)

struct iova *	alloc_iova_mem (void)

void	free_iova_mem (struct iova *iova)

int	iommu_calculate_max_sagaw (struct intel_iommu *iommu)

int	iommu_calculate_agaw (struct intel_iommu *iommu)

void	free_dmar_iommu (struct intel_iommu *iommu)

	DECLARE_PCI_FIXUP_ENABLE (PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB, quirk_ioat_snb_local_iommu)

	LIST_HEAD (dmar_rmrr_units)

int __init	dmar_parse_one_rmrr (struct acpi_dmar_header *header)

int __init	dmar_parse_one_atsr (struct acpi_dmar_header *hdr)

int	dmar_find_matched_atsr_unit (struct pci_dev *dev)

int __init	dmar_parse_rmrr_atsr_dev (void)

int __init	intel_iommu_init (void)

	DECLARE_PCI_FIXUP_HEADER (PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf)

	DECLARE_PCI_FIXUP_HEADER (PCI_VENDOR_ID_INTEL, 0x0040, quirk_calpella_no_shadow_gtt)

	DECLARE_PCI_FIXUP_HEADER (PCI_VENDOR_ID_INTEL, 0x0044, quirk_calpella_no_shadow_gtt)

	DECLARE_PCI_FIXUP_HEADER (PCI_VENDOR_ID_INTEL, 0x0062, quirk_calpella_no_shadow_gtt)

	DECLARE_PCI_FIXUP_HEADER (PCI_VENDOR_ID_INTEL, 0x006a, quirk_calpella_no_shadow_gtt)

Variables
int	dmar_disabled = 1

int	intel_iommu_enabled = 0

int	intel_iommu_gfx_mapped

struct dma_map_ops	intel_dma_ops

Macro Definition Documentation

#define __DOMAIN_MAX_ADDR ( gaw ) ((((uint64_t)1) << gaw) - 1)

Definition at line 65 of file intel-iommu.c.

#define __DOMAIN_MAX_PFN ( gaw ) ((((uint64_t)1) << (gaw-VTD_PAGE_SHIFT)) - 1)

Definition at line 64 of file intel-iommu.c.

#define CONTEXT_SIZE VTD_PAGE_SIZE

Definition at line 50 of file intel-iommu.c.

#define DEFAULT_DOMAIN_ADDRESS_WIDTH 48

Definition at line 60 of file intel-iommu.c.

#define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32))

Definition at line 74 of file intel-iommu.c.

#define DMA_64BIT_PFN IOVA_PFN(DMA_BIT_MASK(64))

Definition at line 75 of file intel-iommu.c.

#define DOMAIN_FLAG_P2P_MULTIPLE_DEVICES (1 << 0)

Definition at line 348 of file intel-iommu.c.

#define DOMAIN_FLAG_STATIC_IDENTITY (1 << 2)

Definition at line 356 of file intel-iommu.c.

#define DOMAIN_FLAG_VIRTUAL_MACHINE (1 << 1)

Definition at line 353 of file intel-iommu.c.

#define DOMAIN_MAX_ADDR ( gaw ) (((uint64_t)__DOMAIN_MAX_PFN(gaw)) << VTD_PAGE_SHIFT)

Definition at line 71 of file intel-iommu.c.

#define DOMAIN_MAX_PFN ( gaw )

Value:

((unsigned long) min_t(uint64_t, \

__DOMAIN_MAX_PFN(gaw), (unsigned long)-1))

Definition at line 69 of file intel-iommu.c.

#define DUMMY_DEVICE_DOMAIN_INFO ((struct device_domain_info *)(-1))

Definition at line 445 of file intel-iommu.c.

#define GGC 0x52

Definition at line 4217 of file intel-iommu.c.

#define GGC_MEMORY_SIZE_1M (0x1 << 8)

Definition at line 4220 of file intel-iommu.c.

#define GGC_MEMORY_SIZE_2M (0x3 << 8)

Definition at line 4221 of file intel-iommu.c.

#define GGC_MEMORY_SIZE_2M_VT (0x9 << 8)

Definition at line 4223 of file intel-iommu.c.

#define GGC_MEMORY_SIZE_3M_VT (0xa << 8)

Definition at line 4224 of file intel-iommu.c.

#define GGC_MEMORY_SIZE_4M_VT (0xb << 8)

Definition at line 4225 of file intel-iommu.c.

#define GGC_MEMORY_SIZE_MASK (0xf << 8)

Definition at line 4218 of file intel-iommu.c.

#define GGC_MEMORY_SIZE_NONE (0x0 << 8)

Definition at line 4219 of file intel-iommu.c.

#define GGC_MEMORY_VT_ENABLED (0x8 << 8)

Definition at line 4222 of file intel-iommu.c.

#define HIGH_WATER_MARK 250

Definition at line 408 of file intel-iommu.c.

#define IDENTMAP_ALL 1

Definition at line 2098 of file intel-iommu.c.

#define IDENTMAP_AZALIA 4

Definition at line 2100 of file intel-iommu.c.

#define IDENTMAP_GFX 2

Definition at line 2099 of file intel-iommu.c.

#define INTEL_IOMMU_PGSIZES (~0xFFFUL)

Definition at line 97 of file intel-iommu.c.

#define IOAPIC_RANGE_END (0xfeefffff)

Definition at line 57 of file intel-iommu.c.

#define IOAPIC_RANGE_START (0xfee00000)

Definition at line 56 of file intel-iommu.c.

#define IOMMU_UNITS_SUPPORTED 64

Definition at line 362 of file intel-iommu.c.

#define IOVA_PFN ( addr ) ((addr) >> PAGE_SHIFT)

Definition at line 73 of file intel-iommu.c.

#define IOVA_START_ADDR (0x1000)

Definition at line 58 of file intel-iommu.c.

#define IS_AZALIA ( pdev ) ((pdev)->vendor == 0x8086 && (pdev)->device == 0x3a3e)

Definition at line 54 of file intel-iommu.c.

#define IS_GFX_DEVICE ( pdev ) ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)

Definition at line 52 of file intel-iommu.c.

#define IS_ISA_DEVICE ( pdev ) ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA)

Definition at line 53 of file intel-iommu.c.

#define LEVEL_MASK (((u64)1 << LEVEL_STRIDE) - 1)

Definition at line 79 of file intel-iommu.c.

#define LEVEL_STRIDE (9)

Definition at line 78 of file intel-iommu.c.

#define MAX_AGAW_WIDTH 64

Definition at line 62 of file intel-iommu.c.

#define REQ_ACS_FLAGS (PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF)

Definition at line 4106 of file intel-iommu.c.

#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))

Definition at line 186 of file intel-iommu.c.

#define ROOT_SIZE VTD_PAGE_SIZE

Definition at line 49 of file intel-iommu.c.

Function Documentation

__setup ( )

struct iova* alloc_iova_mem ( void )

read

Definition at line 528 of file intel-iommu.c.

DECLARE_PCI_FIXUP_ENABLE	(	PCI_VENDOR_ID_INTEL	,
		PCI_DEVICE_ID_INTEL_IOAT_SNB	,
		quirk_ioat_snb_local_iommu
	)

DECLARE_PCI_FIXUP_HEADER	(	PCI_VENDOR_ID_INTEL	,
		0x2a40	,
		quirk_iommu_rwbf
	)

DECLARE_PCI_FIXUP_HEADER	(	PCI_VENDOR_ID_INTEL	,
		0x0040	,
		quirk_calpella_no_shadow_gtt
	)

DECLARE_PCI_FIXUP_HEADER	(	PCI_VENDOR_ID_INTEL	,
		0x0044	,
		quirk_calpella_no_shadow_gtt
	)

DECLARE_PCI_FIXUP_HEADER	(	PCI_VENDOR_ID_INTEL	,
		0x0062	,
		quirk_calpella_no_shadow_gtt
	)

DECLARE_PCI_FIXUP_HEADER	(	PCI_VENDOR_ID_INTEL	,
		0x006a	,
		quirk_calpella_no_shadow_gtt
	)

DEFINE_TIMER	(	unmap_timer	,
		flush_unmaps_timeout	,
		0	,
		0
	)

int dmar_find_matched_atsr_unit ( struct pci_dev * dev )

Definition at line 3529 of file intel-iommu.c.

int __init dmar_parse_one_atsr ( struct acpi_dmar_header * hdr )

Definition at line 3490 of file intel-iommu.c.

int __init dmar_parse_one_rmrr ( struct acpi_dmar_header * header )

Definition at line 3452 of file intel-iommu.c.

int __init dmar_parse_rmrr_atsr_dev ( void )

Definition at line 3568 of file intel-iommu.c.

EXPORT_SYMBOL_GPL ( intel_iommu_enabled )

EXPORT_SYMBOL_GPL ( intel_iommu_gfx_mapped )

void free_dmar_iommu ( struct intel_iommu * iommu )

Definition at line 1287 of file intel-iommu.c.

void free_iova_mem ( struct iova * iova )

Definition at line 533 of file intel-iommu.c.

int __init intel_iommu_init ( void )

Definition at line 3625 of file intel-iommu.c.

int iommu_calculate_agaw ( struct intel_iommu * iommu )

Definition at line 567 of file intel-iommu.c.

int iommu_calculate_max_sagaw ( struct intel_iommu * iommu )

Definition at line 557 of file intel-iommu.c.

LIST_HEAD ( dmar_rmrr_units )

Variable Documentation

int dmar_disabled = 1

Definition at line 431 of file intel-iommu.c.

struct dma_map_ops intel_dma_ops

Initial value:

= {
    .alloc = intel_alloc_coherent,
    .free = intel_free_coherent,
    .map_sg = intel_map_sg,
    .unmap_sg = intel_unmap_sg,
    .map_page = intel_map_page,
    .unmap_page = intel_unmap_page,
    .mapping_error = intel_mapping_error,
}

Definition at line 3142 of file intel-iommu.c.

int intel_iommu_enabled = 0

Definition at line 434 of file intel-iommu.c.

int intel_iommu_gfx_mapped

Definition at line 442 of file intel-iommu.c.

Data Structures

Macros

Functions

Variables

Macro Definition Documentation

Function Documentation

Variable Documentation