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intel_crt.c
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1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  * Eric Anholt <[email protected]>
25  */
26 
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <drm/drmP.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_edid.h>
34 #include "intel_drv.h"
35 #include <drm/i915_drm.h>
36 #include "i915_drv.h"
37 
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40  ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41  ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42  ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43  ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44  ADPA_CRT_HOTPLUG_ENABLE)
45 
46 struct intel_crt {
50 };
51 
52 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
53 {
54  return container_of(intel_attached_encoder(connector),
55  struct intel_crt, base);
56 }
57 
58 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
59 {
60  return container_of(encoder, struct intel_crt, base);
61 }
62 
63 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
64  enum pipe *pipe)
65 {
66  struct drm_device *dev = encoder->base.dev;
67  struct drm_i915_private *dev_priv = dev->dev_private;
68  struct intel_crt *crt = intel_encoder_to_crt(encoder);
69  u32 tmp;
70 
71  tmp = I915_READ(crt->adpa_reg);
72 
73  if (!(tmp & ADPA_DAC_ENABLE))
74  return false;
75 
76  if (HAS_PCH_CPT(dev))
77  *pipe = PORT_TO_PIPE_CPT(tmp);
78  else
79  *pipe = PORT_TO_PIPE(tmp);
80 
81  return true;
82 }
83 
84 static void intel_disable_crt(struct intel_encoder *encoder)
85 {
86  struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
87  struct intel_crt *crt = intel_encoder_to_crt(encoder);
88  u32 temp;
89 
90  temp = I915_READ(crt->adpa_reg);
92  temp &= ~ADPA_DAC_ENABLE;
93  I915_WRITE(crt->adpa_reg, temp);
94 }
95 
96 static void intel_enable_crt(struct intel_encoder *encoder)
97 {
98  struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
99  struct intel_crt *crt = intel_encoder_to_crt(encoder);
100  u32 temp;
101 
102  temp = I915_READ(crt->adpa_reg);
103  temp |= ADPA_DAC_ENABLE;
104  I915_WRITE(crt->adpa_reg, temp);
105 }
106 
107 /* Note: The caller is required to filter out dpms modes not supported by the
108  * platform. */
109 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
110 {
111  struct drm_device *dev = encoder->base.dev;
112  struct drm_i915_private *dev_priv = dev->dev_private;
113  struct intel_crt *crt = intel_encoder_to_crt(encoder);
114  u32 temp;
115 
116  temp = I915_READ(crt->adpa_reg);
118  temp &= ~ADPA_DAC_ENABLE;
119 
120  switch (mode) {
121  case DRM_MODE_DPMS_ON:
122  temp |= ADPA_DAC_ENABLE;
123  break;
125  temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
126  break;
128  temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
129  break;
130  case DRM_MODE_DPMS_OFF:
132  break;
133  }
134 
135  I915_WRITE(crt->adpa_reg, temp);
136 }
137 
138 static void intel_crt_dpms(struct drm_connector *connector, int mode)
139 {
140  struct drm_device *dev = connector->dev;
141  struct intel_encoder *encoder = intel_attached_encoder(connector);
142  struct drm_crtc *crtc;
143  int old_dpms;
144 
145  /* PCH platforms and VLV only support on/off. */
146  if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
147  mode = DRM_MODE_DPMS_OFF;
148 
149  if (mode == connector->dpms)
150  return;
151 
152  old_dpms = connector->dpms;
153  connector->dpms = mode;
154 
155  /* Only need to change hw state when actually enabled */
156  crtc = encoder->base.crtc;
157  if (!crtc) {
158  encoder->connectors_active = false;
159  return;
160  }
161 
162  /* We need the pipe to run for anything but OFF. */
163  if (mode == DRM_MODE_DPMS_OFF)
164  encoder->connectors_active = false;
165  else
166  encoder->connectors_active = true;
167 
168  if (mode < old_dpms) {
169  /* From off to on, enable the pipe first. */
171 
172  intel_crt_set_dpms(encoder, mode);
173  } else {
174  intel_crt_set_dpms(encoder, mode);
175 
177  }
178 
179  intel_modeset_check_state(connector->dev);
180 }
181 
182 static int intel_crt_mode_valid(struct drm_connector *connector,
183  struct drm_display_mode *mode)
184 {
185  struct drm_device *dev = connector->dev;
186 
187  int max_clock = 0;
188  if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
189  return MODE_NO_DBLESCAN;
190 
191  if (mode->clock < 25000)
192  return MODE_CLOCK_LOW;
193 
194  if (IS_GEN2(dev))
195  max_clock = 350000;
196  else
197  max_clock = 400000;
198  if (mode->clock > max_clock)
199  return MODE_CLOCK_HIGH;
200 
201  return MODE_OK;
202 }
203 
204 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
205  const struct drm_display_mode *mode,
206  struct drm_display_mode *adjusted_mode)
207 {
208  return true;
209 }
210 
211 static void intel_crt_mode_set(struct drm_encoder *encoder,
212  struct drm_display_mode *mode,
213  struct drm_display_mode *adjusted_mode)
214 {
215 
216  struct drm_device *dev = encoder->dev;
217  struct drm_crtc *crtc = encoder->crtc;
218  struct intel_crt *crt =
219  intel_encoder_to_crt(to_intel_encoder(encoder));
220  struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
221  struct drm_i915_private *dev_priv = dev->dev_private;
222  u32 adpa;
223 
224  adpa = ADPA_HOTPLUG_BITS;
225  if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
226  adpa |= ADPA_HSYNC_ACTIVE_HIGH;
227  if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
228  adpa |= ADPA_VSYNC_ACTIVE_HIGH;
229 
230  /* For CPT allow 3 pipe config, for others just use A or B */
231  if (HAS_PCH_CPT(dev))
232  adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
233  else if (intel_crtc->pipe == 0)
234  adpa |= ADPA_PIPE_A_SELECT;
235  else
236  adpa |= ADPA_PIPE_B_SELECT;
237 
238  if (!HAS_PCH_SPLIT(dev))
239  I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
240 
241  I915_WRITE(crt->adpa_reg, adpa);
242 }
243 
244 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
245 {
246  struct drm_device *dev = connector->dev;
247  struct intel_crt *crt = intel_attached_crt(connector);
248  struct drm_i915_private *dev_priv = dev->dev_private;
249  u32 adpa;
250  bool ret;
251 
252  /* The first time through, trigger an explicit detection cycle */
253  if (crt->force_hotplug_required) {
254  bool turn_off_dac = HAS_PCH_SPLIT(dev);
255  u32 save_adpa;
256 
257  crt->force_hotplug_required = 0;
258 
259  save_adpa = adpa = I915_READ(PCH_ADPA);
260  DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
261 
263  if (turn_off_dac)
264  adpa &= ~ADPA_DAC_ENABLE;
265 
266  I915_WRITE(PCH_ADPA, adpa);
267 
269  1000))
270  DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
271 
272  if (turn_off_dac) {
273  I915_WRITE(PCH_ADPA, save_adpa);
275  }
276  }
277 
278  /* Check the status to see if both blue and green are on now */
279  adpa = I915_READ(PCH_ADPA);
280  if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
281  ret = true;
282  else
283  ret = false;
284  DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
285 
286  return ret;
287 }
288 
289 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
290 {
291  struct drm_device *dev = connector->dev;
292  struct drm_i915_private *dev_priv = dev->dev_private;
293  u32 adpa;
294  bool ret;
295  u32 save_adpa;
296 
297  save_adpa = adpa = I915_READ(ADPA);
298  DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
299 
301 
302  I915_WRITE(ADPA, adpa);
303 
304  if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
305  1000)) {
306  DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
307  I915_WRITE(ADPA, save_adpa);
308  }
309 
310  /* Check the status to see if both blue and green are on now */
311  adpa = I915_READ(ADPA);
312  if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
313  ret = true;
314  else
315  ret = false;
316 
317  DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
318 
319  /* FIXME: debug force function and remove */
320  ret = true;
321 
322  return ret;
323 }
324 
333 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
334 {
335  struct drm_device *dev = connector->dev;
336  struct drm_i915_private *dev_priv = dev->dev_private;
337  u32 hotplug_en, orig, stat;
338  bool ret = false;
339  int i, tries = 0;
340 
341  if (HAS_PCH_SPLIT(dev))
342  return intel_ironlake_crt_detect_hotplug(connector);
343 
344  if (IS_VALLEYVIEW(dev))
345  return valleyview_crt_detect_hotplug(connector);
346 
347  /*
348  * On 4 series desktop, CRT detect sequence need to be done twice
349  * to get a reliable result.
350  */
351 
352  if (IS_G4X(dev) && !IS_GM45(dev))
353  tries = 2;
354  else
355  tries = 1;
356  hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
357  hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
358 
359  for (i = 0; i < tries ; i++) {
360  /* turn on the FORCE_DETECT */
361  I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
362  /* wait for FORCE_DETECT to go off */
365  1000))
366  DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
367  }
368 
371  ret = true;
372 
373  /* clear the interrupt we just generated, if any */
375 
376  /* and put the bits back */
378 
379  return ret;
380 }
381 
382 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
383  struct i2c_adapter *i2c)
384 {
385  struct edid *edid;
386 
387  edid = drm_get_edid(connector, i2c);
388 
389  if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
390  DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
391  intel_gmbus_force_bit(i2c, true);
392  edid = drm_get_edid(connector, i2c);
393  intel_gmbus_force_bit(i2c, false);
394  }
395 
396  return edid;
397 }
398 
399 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
400 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
401  struct i2c_adapter *adapter)
402 {
403  struct edid *edid;
404 
405  edid = intel_crt_get_edid(connector, adapter);
406  if (!edid)
407  return 0;
408 
409  return intel_connector_update_modes(connector, edid);
410 }
411 
412 static bool intel_crt_detect_ddc(struct drm_connector *connector)
413 {
414  struct intel_crt *crt = intel_attached_crt(connector);
415  struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
416  struct edid *edid;
417  struct i2c_adapter *i2c;
418 
419  BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
420 
421  i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
422  edid = intel_crt_get_edid(connector, i2c);
423 
424  if (edid) {
425  bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
426 
427  /*
428  * This may be a DVI-I connector with a shared DDC
429  * link between analog and digital outputs, so we
430  * have to check the EDID input spec of the attached device.
431  */
432  if (!is_digital) {
433  DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
434  return true;
435  }
436 
437  DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
438  } else {
439  DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
440  }
441 
442  kfree(edid);
443 
444  return false;
445 }
446 
447 static enum drm_connector_status
448 intel_crt_load_detect(struct intel_crt *crt)
449 {
450  struct drm_device *dev = crt->base.base.dev;
451  struct drm_i915_private *dev_priv = dev->dev_private;
452  uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
453  uint32_t save_bclrpat;
454  uint32_t save_vtotal;
455  uint32_t vtotal, vactive;
456  uint32_t vsample;
457  uint32_t vblank, vblank_start, vblank_end;
458  uint32_t dsl;
459  uint32_t bclrpat_reg;
460  uint32_t vtotal_reg;
461  uint32_t vblank_reg;
462  uint32_t vsync_reg;
463  uint32_t pipeconf_reg;
464  uint32_t pipe_dsl_reg;
465  uint8_t st00;
467 
468  DRM_DEBUG_KMS("starting load-detect on CRT\n");
469 
470  bclrpat_reg = BCLRPAT(pipe);
471  vtotal_reg = VTOTAL(pipe);
472  vblank_reg = VBLANK(pipe);
473  vsync_reg = VSYNC(pipe);
474  pipeconf_reg = PIPECONF(pipe);
475  pipe_dsl_reg = PIPEDSL(pipe);
476 
477  save_bclrpat = I915_READ(bclrpat_reg);
478  save_vtotal = I915_READ(vtotal_reg);
479  vblank = I915_READ(vblank_reg);
480 
481  vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
482  vactive = (save_vtotal & 0x7ff) + 1;
483 
484  vblank_start = (vblank & 0xfff) + 1;
485  vblank_end = ((vblank >> 16) & 0xfff) + 1;
486 
487  /* Set the border color to purple. */
488  I915_WRITE(bclrpat_reg, 0x500050);
489 
490  if (!IS_GEN2(dev)) {
491  uint32_t pipeconf = I915_READ(pipeconf_reg);
492  I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
493  POSTING_READ(pipeconf_reg);
494  /* Wait for next Vblank to substitue
495  * border color for Color info */
496  intel_wait_for_vblank(dev, pipe);
497  st00 = I915_READ8(VGA_MSR_WRITE);
498  status = ((st00 & (1 << 4)) != 0) ?
501 
502  I915_WRITE(pipeconf_reg, pipeconf);
503  } else {
504  bool restore_vblank = false;
505  int count, detect;
506 
507  /*
508  * If there isn't any border, add some.
509  * Yes, this will flicker
510  */
511  if (vblank_start <= vactive && vblank_end >= vtotal) {
512  uint32_t vsync = I915_READ(vsync_reg);
513  uint32_t vsync_start = (vsync & 0xffff) + 1;
514 
515  vblank_start = vsync_start;
516  I915_WRITE(vblank_reg,
517  (vblank_start - 1) |
518  ((vblank_end - 1) << 16));
519  restore_vblank = true;
520  }
521  /* sample in the vertical border, selecting the larger one */
522  if (vblank_start - vactive >= vtotal - vblank_end)
523  vsample = (vblank_start + vactive) >> 1;
524  else
525  vsample = (vtotal + vblank_end) >> 1;
526 
527  /*
528  * Wait for the border to be displayed
529  */
530  while (I915_READ(pipe_dsl_reg) >= vactive)
531  ;
532  while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
533  ;
534  /*
535  * Watch ST00 for an entire scanline
536  */
537  detect = 0;
538  count = 0;
539  do {
540  count++;
541  /* Read the ST00 VGA status register */
542  st00 = I915_READ8(VGA_MSR_WRITE);
543  if (st00 & (1 << 4))
544  detect++;
545  } while ((I915_READ(pipe_dsl_reg) == dsl));
546 
547  /* restore vblank if necessary */
548  if (restore_vblank)
549  I915_WRITE(vblank_reg, vblank);
550  /*
551  * If more than 3/4 of the scanline detected a monitor,
552  * then it is assumed to be present. This works even on i830,
553  * where there isn't any way to force the border color across
554  * the screen
555  */
556  status = detect * 4 > count * 3 ?
559  }
560 
561  /* Restore previous settings */
562  I915_WRITE(bclrpat_reg, save_bclrpat);
563 
564  return status;
565 }
566 
567 static enum drm_connector_status
568 intel_crt_detect(struct drm_connector *connector, bool force)
569 {
570  struct drm_device *dev = connector->dev;
571  struct intel_crt *crt = intel_attached_crt(connector);
573  struct intel_load_detect_pipe tmp;
574 
575  if (I915_HAS_HOTPLUG(dev)) {
576  /* We can not rely on the HPD pin always being correctly wired
577  * up, for example many KVM do not pass it through, and so
578  * only trust an assertion that the monitor is connected.
579  */
580  if (intel_crt_detect_hotplug(connector)) {
581  DRM_DEBUG_KMS("CRT detected via hotplug\n");
583  } else
584  DRM_DEBUG_KMS("CRT not detected via hotplug\n");
585  }
586 
587  if (intel_crt_detect_ddc(connector))
589 
590  /* Load detection is broken on HPD capable machines. Whoever wants a
591  * broken monitor (without edid) to work behind a broken kvm (that fails
592  * to have the right resistors for HP detection) needs to fix this up.
593  * For now just bail out. */
594  if (I915_HAS_HOTPLUG(dev))
596 
597  if (!force)
598  return connector->status;
599 
600  /* for pre-945g platforms use load detect */
601  if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
602  if (intel_crt_detect_ddc(connector))
604  else
605  status = intel_crt_load_detect(crt);
606  intel_release_load_detect_pipe(connector, &tmp);
607  } else
608  status = connector_status_unknown;
609 
610  return status;
611 }
612 
613 static void intel_crt_destroy(struct drm_connector *connector)
614 {
615  drm_sysfs_connector_remove(connector);
616  drm_connector_cleanup(connector);
617  kfree(connector);
618 }
619 
620 static int intel_crt_get_modes(struct drm_connector *connector)
621 {
622  struct drm_device *dev = connector->dev;
623  struct drm_i915_private *dev_priv = dev->dev_private;
624  int ret;
625  struct i2c_adapter *i2c;
626 
627  i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
628  ret = intel_crt_ddc_get_modes(connector, i2c);
629  if (ret || !IS_G4X(dev))
630  return ret;
631 
632  /* Try to probe digital port for output in DVI-I -> VGA mode. */
633  i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
634  return intel_crt_ddc_get_modes(connector, i2c);
635 }
636 
637 static int intel_crt_set_property(struct drm_connector *connector,
638  struct drm_property *property,
639  uint64_t value)
640 {
641  return 0;
642 }
643 
644 static void intel_crt_reset(struct drm_connector *connector)
645 {
646  struct drm_device *dev = connector->dev;
647  struct intel_crt *crt = intel_attached_crt(connector);
648 
649  if (HAS_PCH_SPLIT(dev))
650  crt->force_hotplug_required = 1;
651 }
652 
653 /*
654  * Routines for controlling stuff on the analog port
655  */
656 
657 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
658  .mode_fixup = intel_crt_mode_fixup,
659  .mode_set = intel_crt_mode_set,
660  .disable = intel_encoder_noop,
661 };
662 
663 static const struct drm_connector_funcs intel_crt_connector_funcs = {
664  .reset = intel_crt_reset,
665  .dpms = intel_crt_dpms,
666  .detect = intel_crt_detect,
668  .destroy = intel_crt_destroy,
669  .set_property = intel_crt_set_property,
670 };
671 
672 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
673  .mode_valid = intel_crt_mode_valid,
674  .get_modes = intel_crt_get_modes,
675  .best_encoder = intel_best_encoder,
676 };
677 
678 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
679  .destroy = intel_encoder_destroy,
680 };
681 
682 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
683 {
684  DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
685  return 1;
686 }
687 
688 static const struct dmi_system_id intel_no_crt[] = {
689  {
690  .callback = intel_no_crt_dmi_callback,
691  .ident = "ACER ZGB",
692  .matches = {
693  DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
694  DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
695  },
696  },
697  { }
698 };
699 
700 void intel_crt_init(struct drm_device *dev)
701 {
702  struct drm_connector *connector;
703  struct intel_crt *crt;
705  struct drm_i915_private *dev_priv = dev->dev_private;
706 
707  /* Skip machines without VGA that falsely report hotplug events */
708  if (dmi_check_system(intel_no_crt))
709  return;
710 
711  crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
712  if (!crt)
713  return;
714 
715  intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
716  if (!intel_connector) {
717  kfree(crt);
718  return;
719  }
720 
721  connector = &intel_connector->base;
722  drm_connector_init(dev, &intel_connector->base,
723  &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
724 
725  drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
727 
728  intel_connector_attach_encoder(intel_connector, &crt->base);
729 
730  crt->base.type = INTEL_OUTPUT_ANALOG;
731  crt->base.cloneable = true;
732  if (IS_HASWELL(dev) || IS_I830(dev))
733  crt->base.crtc_mask = (1 << 0);
734  else
735  crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
736 
737  if (IS_GEN2(dev))
738  connector->interlace_allowed = 0;
739  else
740  connector->interlace_allowed = 1;
741  connector->doublescan_allowed = 0;
742 
743  if (HAS_PCH_SPLIT(dev))
744  crt->adpa_reg = PCH_ADPA;
745  else if (IS_VALLEYVIEW(dev))
746  crt->adpa_reg = VLV_ADPA;
747  else
748  crt->adpa_reg = ADPA;
749 
750  crt->base.disable = intel_disable_crt;
751  crt->base.enable = intel_enable_crt;
752  crt->base.get_hw_state = intel_crt_get_hw_state;
753  intel_connector->get_hw_state = intel_connector_get_hw_state;
754 
755  drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
756  drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
757 
758  drm_sysfs_connector_add(connector);
759 
760  if (I915_HAS_HOTPLUG(dev))
761  connector->polled = DRM_CONNECTOR_POLL_HPD;
762  else
763  connector->polled = DRM_CONNECTOR_POLL_CONNECT;
764 
765  /*
766  * Configure the automatic hotplug detection stuff
767  */
768  crt->force_hotplug_required = 0;
769  if (HAS_PCH_SPLIT(dev)) {
770  u32 adpa;
771 
772  adpa = I915_READ(PCH_ADPA);
773  adpa &= ~ADPA_CRT_HOTPLUG_MASK;
774  adpa |= ADPA_HOTPLUG_BITS;
775  I915_WRITE(PCH_ADPA, adpa);
777 
778  DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
779  crt->force_hotplug_required = 1;
780  }
781 
783 }