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intel_dvo.c
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1 /*
2  * Copyright 2006 Dave Airlie <[email protected]>
3  * Copyright © 2006-2007 Intel Corporation
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  * Eric Anholt <[email protected]>
26  */
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <drm/drmP.h>
30 #include <drm/drm_crtc.h>
31 #include "intel_drv.h"
32 #include <drm/i915_drm.h>
33 #include "i915_drv.h"
34 #include "dvo.h"
35 
36 #define SIL164_ADDR 0x38
37 #define CH7xxx_ADDR 0x76
38 #define TFP410_ADDR 0x38
39 #define NS2501_ADDR 0x38
40 
41 static const struct intel_dvo_device intel_dvo_devices[] = {
42  {
43  .type = INTEL_DVO_CHIP_TMDS,
44  .name = "sil164",
45  .dvo_reg = DVOC,
46  .slave_addr = SIL164_ADDR,
47  .dev_ops = &sil164_ops,
48  },
49  {
50  .type = INTEL_DVO_CHIP_TMDS,
51  .name = "ch7xxx",
52  .dvo_reg = DVOC,
53  .slave_addr = CH7xxx_ADDR,
54  .dev_ops = &ch7xxx_ops,
55  },
56  {
57  .type = INTEL_DVO_CHIP_LVDS,
58  .name = "ivch",
59  .dvo_reg = DVOA,
60  .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
61  .dev_ops = &ivch_ops,
62  },
63  {
64  .type = INTEL_DVO_CHIP_TMDS,
65  .name = "tfp410",
66  .dvo_reg = DVOC,
67  .slave_addr = TFP410_ADDR,
68  .dev_ops = &tfp410_ops,
69  },
70  {
71  .type = INTEL_DVO_CHIP_LVDS,
72  .name = "ch7017",
73  .dvo_reg = DVOC,
74  .slave_addr = 0x75,
75  .gpio = GMBUS_PORT_DPB,
76  .dev_ops = &ch7017_ops,
77  },
78  {
79  .type = INTEL_DVO_CHIP_TMDS,
80  .name = "ns2501",
81  .dvo_reg = DVOC,
82  .slave_addr = NS2501_ADDR,
83  .dev_ops = &ns2501_ops,
84  }
85 };
86 
87 struct intel_dvo {
89 
91 
94 };
95 
96 static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
97 {
98  return container_of(encoder, struct intel_dvo, base.base);
99 }
100 
101 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
102 {
103  return container_of(intel_attached_encoder(connector),
104  struct intel_dvo, base);
105 }
106 
107 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
108 {
109  struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
110 
111  return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
112 }
113 
114 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
115  enum pipe *pipe)
116 {
117  struct drm_device *dev = encoder->base.dev;
118  struct drm_i915_private *dev_priv = dev->dev_private;
119  struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
120  u32 tmp;
121 
122  tmp = I915_READ(intel_dvo->dev.dvo_reg);
123 
124  if (!(tmp & DVO_ENABLE))
125  return false;
126 
127  *pipe = PORT_TO_PIPE(tmp);
128 
129  return true;
130 }
131 
132 static void intel_disable_dvo(struct intel_encoder *encoder)
133 {
134  struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
135  struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
136  u32 dvo_reg = intel_dvo->dev.dvo_reg;
137  u32 temp = I915_READ(dvo_reg);
138 
139  intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
140  I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
141  I915_READ(dvo_reg);
142 }
143 
144 static void intel_enable_dvo(struct intel_encoder *encoder)
145 {
146  struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
147  struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
148  u32 dvo_reg = intel_dvo->dev.dvo_reg;
149  u32 temp = I915_READ(dvo_reg);
150 
151  I915_WRITE(dvo_reg, temp | DVO_ENABLE);
152  I915_READ(dvo_reg);
153  intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
154 }
155 
156 static void intel_dvo_dpms(struct drm_connector *connector, int mode)
157 {
158  struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
159  struct drm_crtc *crtc;
160 
161  /* dvo supports only 2 dpms states. */
162  if (mode != DRM_MODE_DPMS_ON)
163  mode = DRM_MODE_DPMS_OFF;
164 
165  if (mode == connector->dpms)
166  return;
167 
168  connector->dpms = mode;
169 
170  /* Only need to change hw state when actually enabled */
171  crtc = intel_dvo->base.base.crtc;
172  if (!crtc) {
173  intel_dvo->base.connectors_active = false;
174  return;
175  }
176 
177  if (mode == DRM_MODE_DPMS_ON) {
178  intel_dvo->base.connectors_active = true;
179 
181 
182  intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
183  } else {
184  intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
185 
186  intel_dvo->base.connectors_active = false;
187 
189  }
190 
191  intel_modeset_check_state(connector->dev);
192 }
193 
194 static int intel_dvo_mode_valid(struct drm_connector *connector,
195  struct drm_display_mode *mode)
196 {
197  struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
198 
199  if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
200  return MODE_NO_DBLESCAN;
201 
202  /* XXX: Validate clock range */
203 
204  if (intel_dvo->panel_fixed_mode) {
205  if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
206  return MODE_PANEL;
207  if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
208  return MODE_PANEL;
209  }
210 
211  return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
212 }
213 
214 static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
215  const struct drm_display_mode *mode,
216  struct drm_display_mode *adjusted_mode)
217 {
218  struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
219 
220  /* If we have timings from the BIOS for the panel, put them in
221  * to the adjusted mode. The CRTC will be set up for this mode,
222  * with the panel scaling set up to source from the H/VDisplay
223  * of the original mode.
224  */
225  if (intel_dvo->panel_fixed_mode != NULL) {
226 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
227  C(hdisplay);
228  C(hsync_start);
229  C(hsync_end);
230  C(htotal);
231  C(vdisplay);
232  C(vsync_start);
233  C(vsync_end);
234  C(vtotal);
235  C(clock);
236 #undef C
237  }
238 
239  if (intel_dvo->dev.dev_ops->mode_fixup)
240  return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
241 
242  return true;
243 }
244 
245 static void intel_dvo_mode_set(struct drm_encoder *encoder,
246  struct drm_display_mode *mode,
247  struct drm_display_mode *adjusted_mode)
248 {
249  struct drm_device *dev = encoder->dev;
250  struct drm_i915_private *dev_priv = dev->dev_private;
251  struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
252  struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
253  int pipe = intel_crtc->pipe;
254  u32 dvo_val;
255  u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
256  int dpll_reg = DPLL(pipe);
257 
258  switch (dvo_reg) {
259  case DVOA:
260  default:
261  dvo_srcdim_reg = DVOA_SRCDIM;
262  break;
263  case DVOB:
264  dvo_srcdim_reg = DVOB_SRCDIM;
265  break;
266  case DVOC:
267  dvo_srcdim_reg = DVOC_SRCDIM;
268  break;
269  }
270 
271  intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
272 
273  /* Save the data order, since I don't know what it should be set to. */
274  dvo_val = I915_READ(dvo_reg) &
276  dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
278 
279  if (pipe == 1)
280  dvo_val |= DVO_PIPE_B_SELECT;
281  dvo_val |= DVO_PIPE_STALL;
282  if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
283  dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
284  if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
285  dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
286 
287  I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
288 
289  /*I915_WRITE(DVOB_SRCDIM,
290  (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
291  (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
292  I915_WRITE(dvo_srcdim_reg,
293  (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
294  (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
295  /*I915_WRITE(DVOB, dvo_val);*/
296  I915_WRITE(dvo_reg, dvo_val);
297 }
298 
304 static enum drm_connector_status
305 intel_dvo_detect(struct drm_connector *connector, bool force)
306 {
307  struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
308  return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
309 }
310 
311 static int intel_dvo_get_modes(struct drm_connector *connector)
312 {
313  struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
314  struct drm_i915_private *dev_priv = connector->dev->dev_private;
315 
316  /* We should probably have an i2c driver get_modes function for those
317  * devices which will have a fixed set of modes determined by the chip
318  * (TV-out, for example), but for now with just TMDS and LVDS,
319  * that's not the case.
320  */
321  intel_ddc_get_modes(connector,
323  if (!list_empty(&connector->probed_modes))
324  return 1;
325 
326  if (intel_dvo->panel_fixed_mode != NULL) {
327  struct drm_display_mode *mode;
328  mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
329  if (mode) {
330  drm_mode_probed_add(connector, mode);
331  return 1;
332  }
333  }
334 
335  return 0;
336 }
337 
338 static void intel_dvo_destroy(struct drm_connector *connector)
339 {
340  drm_sysfs_connector_remove(connector);
341  drm_connector_cleanup(connector);
342  kfree(connector);
343 }
344 
345 static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
346  .mode_fixup = intel_dvo_mode_fixup,
347  .mode_set = intel_dvo_mode_set,
348  .disable = intel_encoder_noop,
349 };
350 
351 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
352  .dpms = intel_dvo_dpms,
353  .detect = intel_dvo_detect,
354  .destroy = intel_dvo_destroy,
356 };
357 
358 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
359  .mode_valid = intel_dvo_mode_valid,
360  .get_modes = intel_dvo_get_modes,
361  .best_encoder = intel_best_encoder,
362 };
363 
364 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
365 {
366  struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
367 
368  if (intel_dvo->dev.dev_ops->destroy)
369  intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
370 
371  kfree(intel_dvo->panel_fixed_mode);
372 
373  intel_encoder_destroy(encoder);
374 }
375 
376 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
377  .destroy = intel_dvo_enc_destroy,
378 };
379 
386 static struct drm_display_mode *
387 intel_dvo_get_current_mode(struct drm_connector *connector)
388 {
389  struct drm_device *dev = connector->dev;
390  struct drm_i915_private *dev_priv = dev->dev_private;
391  struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
392  uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
393  struct drm_display_mode *mode = NULL;
394 
395  /* If the DVO port is active, that'll be the LVDS, so we can pull out
396  * its timings to get how the BIOS set up the panel.
397  */
398  if (dvo_val & DVO_ENABLE) {
399  struct drm_crtc *crtc;
400  int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
401 
402  crtc = intel_get_crtc_for_pipe(dev, pipe);
403  if (crtc) {
404  mode = intel_crtc_mode_get(dev, crtc);
405  if (mode) {
406  mode->type |= DRM_MODE_TYPE_PREFERRED;
407  if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
408  mode->flags |= DRM_MODE_FLAG_PHSYNC;
409  if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
410  mode->flags |= DRM_MODE_FLAG_PVSYNC;
411  }
412  }
413  }
414 
415  return mode;
416 }
417 
418 void intel_dvo_init(struct drm_device *dev)
419 {
420  struct drm_i915_private *dev_priv = dev->dev_private;
422  struct intel_dvo *intel_dvo;
424  int i;
425  int encoder_type = DRM_MODE_ENCODER_NONE;
426 
427  intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
428  if (!intel_dvo)
429  return;
430 
431  intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
432  if (!intel_connector) {
433  kfree(intel_dvo);
434  return;
435  }
436 
437  intel_encoder = &intel_dvo->base;
438  drm_encoder_init(dev, &intel_encoder->base,
439  &intel_dvo_enc_funcs, encoder_type);
440 
441  intel_encoder->disable = intel_disable_dvo;
442  intel_encoder->enable = intel_enable_dvo;
443  intel_encoder->get_hw_state = intel_dvo_get_hw_state;
444  intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
445 
446  /* Now, try to find a controller */
447  for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
448  struct drm_connector *connector = &intel_connector->base;
449  const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
450  struct i2c_adapter *i2c;
451  int gpio;
452 
453  /* Allow the I2C driver info to specify the GPIO to be used in
454  * special cases, but otherwise default to what's defined
455  * in the spec.
456  */
458  gpio = dvo->gpio;
459  else if (dvo->type == INTEL_DVO_CHIP_LVDS)
460  gpio = GMBUS_PORT_SSC;
461  else
462  gpio = GMBUS_PORT_DPB;
463 
464  /* Set up the I2C bus necessary for the chip we're probing.
465  * It appears that everything is on GPIOE except for panels
466  * on i830 laptops, which are on GPIOB (DVOA).
467  */
468  i2c = intel_gmbus_get_adapter(dev_priv, gpio);
469 
470  intel_dvo->dev = *dvo;
471  if (!dvo->dev_ops->init(&intel_dvo->dev, i2c))
472  continue;
473 
474  intel_encoder->type = INTEL_OUTPUT_DVO;
475  intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
476  switch (dvo->type) {
477  case INTEL_DVO_CHIP_TMDS:
478  intel_encoder->cloneable = true;
479  drm_connector_init(dev, connector,
480  &intel_dvo_connector_funcs,
482  encoder_type = DRM_MODE_ENCODER_TMDS;
483  break;
484  case INTEL_DVO_CHIP_LVDS:
485  intel_encoder->cloneable = false;
486  drm_connector_init(dev, connector,
487  &intel_dvo_connector_funcs,
489  encoder_type = DRM_MODE_ENCODER_LVDS;
490  break;
491  }
492 
493  drm_connector_helper_add(connector,
494  &intel_dvo_connector_helper_funcs);
495  connector->display_info.subpixel_order = SubPixelHorizontalRGB;
496  connector->interlace_allowed = false;
497  connector->doublescan_allowed = false;
498 
499  drm_encoder_helper_add(&intel_encoder->base,
500  &intel_dvo_helper_funcs);
501 
502  intel_connector_attach_encoder(intel_connector, intel_encoder);
503  if (dvo->type == INTEL_DVO_CHIP_LVDS) {
504  /* For our LVDS chipsets, we should hopefully be able
505  * to dig the fixed panel mode out of the BIOS data.
506  * However, it's in a different format from the BIOS
507  * data on chipsets with integrated LVDS (stored in AIM
508  * headers, likely), so for now, just get the current
509  * mode being output through DVO.
510  */
511  intel_dvo->panel_fixed_mode =
512  intel_dvo_get_current_mode(connector);
513  intel_dvo->panel_wants_dither = true;
514  }
515 
516  drm_sysfs_connector_add(connector);
517  return;
518  }
519 
520  drm_encoder_cleanup(&intel_encoder->base);
521  kfree(intel_dvo);
522  kfree(intel_connector);
523 }