#include <linux/export.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include "imx-ipu-v3.h"
#include "ipu-prv.h"
Go to the source code of this file.
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enum | di_pins {
DI_PIN11 = 0,
DI_PIN12 = 1,
DI_PIN13 = 2,
DI_PIN14 = 3,
DI_PIN15 = 4,
DI_PIN16 = 5,
DI_PIN17 = 6,
DI_PIN_CS = 7,
DI_PIN_SER_CLK = 0,
DI_PIN_SER_RS = 1
} |
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enum | di_sync_wave {
DI_SYNC_NONE = 0,
DI_SYNC_CLK = 1,
DI_SYNC_INT_HSYNC = 2,
DI_SYNC_HSYNC = 3,
DI_SYNC_VSYNC = 4,
DI_SYNC_DE = 6
} |
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#define DI_BS_CLKGEN0 0x0004 |
#define DI_BS_CLKGEN1 0x0008 |
#define DI_DW_GEN |
( |
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gen | ) |
(0x0058 + 4 * (gen)) |
#define DI_DW_GEN_ACCESS_SIZE_OFFSET 24 |
#define DI_DW_GEN_COMPONENT_SIZE_OFFSET 16 |
#define DI_DW_SET |
( |
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gen, |
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set |
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) |
| (0x0088 + 4 * ((gen) + 0xc * (set))) |
#define DI_GEN_DI_CLK_EXT (1 << 20) |
#define DI_GEN_DI_VSYNC_EXT (1 << 21) |
#define DI_GEN_POLARITY_1 (1 << 0) |
#define DI_GEN_POLARITY_2 (1 << 1) |
#define DI_GEN_POLARITY_3 (1 << 2) |
#define DI_GEN_POLARITY_4 (1 << 3) |
#define DI_GEN_POLARITY_5 (1 << 4) |
#define DI_GEN_POLARITY_6 (1 << 5) |
#define DI_GEN_POLARITY_7 (1 << 6) |
#define DI_GEN_POLARITY_8 (1 << 7) |
#define DI_GEN_POLARITY_DISP_CLK (1 << 17) |
#define DI_GENERAL 0x0000 |
#define DI_POL_DRDY_DATA_POLARITY (1 << 7) |
#define DI_POL_DRDY_POLARITY_15 (1 << 4) |
#define DI_SCR_CONF 0x0170 |
#define DI_SER_CONF 0x015c |
#define DI_STP_REP |
( |
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gen | ) |
(0x0148 + 4 * (((gen) - 1)/2)) |
#define DI_SW_GEN0 |
( |
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gen | ) |
(0x000c + 4 * ((gen) - 1)) |
#define DI_SW_GEN0_OFFSET_COUNT |
( |
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x | ) |
((x) << 3) |
#define DI_SW_GEN0_OFFSET_SRC |
( |
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x | ) |
((x) << 0) |
#define DI_SW_GEN0_RUN_COUNT |
( |
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x | ) |
((x) << 19) |
#define DI_SW_GEN0_RUN_SRC |
( |
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x | ) |
((x) << 16) |
#define DI_SW_GEN1 |
( |
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gen | ) |
(0x0030 + 4 * ((gen) - 1)) |
#define DI_SW_GEN1_AUTO_RELOAD (0x10000000) |
#define DI_SW_GEN1_CNT_CLR_SRC |
( |
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x | ) |
((x) << 25) |
#define DI_SW_GEN1_CNT_DOWN |
( |
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x | ) |
((x) << 16) |
#define DI_SW_GEN1_CNT_POL_CLR_SRC |
( |
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x | ) |
((x) << 9) |
#define DI_SW_GEN1_CNT_POL_GEN_EN |
( |
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x | ) |
((x) << 29) |
#define DI_SW_GEN1_CNT_POL_TRIGGER_SRC |
( |
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x | ) |
((x) << 12) |
#define DI_SW_GEN1_CNT_UP |
( |
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x | ) |
(x) |
#define DI_SYNC_AS_GEN 0x0054 |
#define DI_VSYNC_SEL_OFFSET 13 |
- Enumerator:
DI_PIN11 |
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DI_PIN12 |
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DI_PIN13 |
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DI_PIN14 |
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DI_PIN15 |
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DI_PIN16 |
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DI_PIN17 |
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DI_PIN_CS |
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DI_PIN_SER_CLK |
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DI_PIN_SER_RS |
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Definition at line 59 of file ipu-di.c.
- Enumerator:
DI_SYNC_NONE |
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DI_SYNC_CLK |
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DI_SYNC_INT_HSYNC |
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DI_SYNC_HSYNC |
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DI_SYNC_VSYNC |
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DI_SYNC_DE |
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Definition at line 73 of file ipu-di.c.