59 hw->
mac.ops.get_mac_addr(hw, hw->
mac.addr);
80 hw->
mac.ops.stop_adapter(hw);
89 while (!mbx->
ops.check_for_rst(hw) &&
timeout) {
101 mbx->
ops.write_posted(hw, msgbuf, 1);
132 u32 number_of_queues;
143 number_of_queues = hw->
mac.max_rx_queues;
144 for (i = 0; i < number_of_queues; i++) {
147 reg_val &= ~IXGBE_RXDCTL_ENABLE;
161 number_of_queues = hw->
mac.max_tx_queues;
162 for (i = 0; i < number_of_queues; i++) {
165 reg_val &= ~IXGBE_TXDCTL_ENABLE;
185 static s32 ixgbevf_mta_vector(
struct ixgbe_hw *hw,
u8 *mc_addr)
189 switch (hw->
mac.mc_filter_type) {
191 vector = ((mc_addr[4] >> 4) | (((
u16)mc_addr[5]) << 4));
194 vector = ((mc_addr[4] >> 3) | (((
u16)mc_addr[5]) << 5));
197 vector = ((mc_addr[4] >> 2) | (((
u16)mc_addr[5]) << 6));
200 vector = ((mc_addr[4]) | (((
u16)mc_addr[5]) << 8));
230 memset(msgbuf, 0,
sizeof(msgbuf));
240 memcpy(msg_addr, addr, 6);
241 ret_val = mbx->
ops.write_posted(hw, msgbuf, 3);
244 ret_val = mbx->
ops.read_posted(hw, msgbuf, 3);
268 u8 *msg_addr = (
u8 *)(&msgbuf[1]);
271 memset(msgbuf, 0,
sizeof(msgbuf));
273 memcpy(msg_addr, addr, 6);
274 ret_val = mbx->
ops.write_posted(hw, msgbuf, 3);
277 ret_val = mbx->
ops.read_posted(hw, msgbuf, 3);
284 ixgbevf_get_mac_addr_vf(hw, hw->
mac.addr);
289 static void ixgbevf_write_msg_read_ack(
struct ixgbe_hw *hw,
297 mbx->
ops.read_posted(hw, retmsg, size);
307 static s32 ixgbevf_update_mc_addr_list_vf(
struct ixgbe_hw *hw,
312 u16 *vector_list = (
u16 *)&msgbuf[1];
334 vector_list[i++] = ixgbevf_mta_vector(hw, ha->
addr);
361 err = mbx->
ops.write_posted(hw, msgbuf, 2);
365 err = mbx->
ops.read_posted(hw, msgbuf, 2);
390 static s32 ixgbevf_setup_mac_link_vf(
struct ixgbe_hw *hw,
392 bool autoneg_wait_to_complete)
406 static s32 ixgbevf_check_mac_link_vf(
struct ixgbe_hw *hw,
409 bool autoneg_wait_to_complete)
418 if (!mbx->
ops.check_for_rst(hw) || !mbx->
timeout)
443 if (mbx->
ops.read(hw, &in_msg, 1))
479 ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
496 err = hw->
mbx.ops.write_posted(hw, msg, 3);
499 err = hw->
mbx.ops.read_posted(hw, msg, 3);
502 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
517 .init_hw = ixgbevf_init_hw_vf,
518 .reset_hw = ixgbevf_reset_hw_vf,
519 .start_hw = ixgbevf_start_hw_vf,
520 .get_mac_addr = ixgbevf_get_mac_addr_vf,
521 .stop_adapter = ixgbevf_stop_hw_vf,
522 .setup_link = ixgbevf_setup_mac_link_vf,
523 .check_link = ixgbevf_check_mac_link_vf,
524 .set_rar = ixgbevf_set_rar_vf,
525 .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf,
526 .set_uc_addr = ixgbevf_set_uc_addr_vf,
527 .set_vfta = ixgbevf_set_vfta_vf,
532 .mac_ops = &ixgbevf_mac_ops,
537 .mac_ops = &ixgbevf_mac_ops,