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#define KN02XA_BOOT0 0x0e000008 /* boot 0 register */ |
#define KN02XA_EAR 0x0e000004 /* error address register */ |
#define KN02XA_EAR_ADDRESS (0x7ffffff<<2) /* address involved */ |
#define KN02XA_EAR_RES_0 (0x3<<0) /* unused */ |
#define KN02XA_EAR_RES_29 (0x7<<29) /* unused */ |
#define KN02XA_MEM_CONF 0x0e000000 /* write timeout config */ |
#define KN02XA_MEM_INTR 0x0e00000c /* write err IRQ stat & ack */ |
#define KN02XA_MER 0x0c400000 /* memory error register */ |
#define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask: */ |
#define KN02XA_MER_BYTERR_0 (0x1<<8) /* byte lane #0 */ |
#define KN02XA_MER_BYTERR_1 (0x2<<8) /* byte lane #1 */ |
#define KN02XA_MER_BYTERR_2 (0x4<<8) /* byte lane #2 */ |
#define KN02XA_MER_BYTERR_3 (0x8<<8) /* byte lane #3 */ |
#define KN02XA_MER_PAGERR (1<<16) /* 2k page boundary error */ |
#define KN02XA_MER_RES_0 (0xff<<0) /* unused */ |
#define KN02XA_MER_RES_12 (1<<12) /* unused */ |
#define KN02XA_MER_RES_17 (0x3ff<<17) /* unused */ |
#define KN02XA_MER_RES_28 (0xf<<28) /* unused */ |
#define KN02XA_MER_SIZE (1<<13) /* r/o mirror of MSR_SIZE */ |
#define KN02XA_MER_TRANSERR (1<<15) /* transfer length error */ |
#define KN02XA_MSR 0x0c800000 /* memory size register */ |
#define KN02XA_MSR_RES_0 (0x1fff<<0) /* unused */ |
#define KN02XA_MSR_RES_14 (0x7<<14) /* unused */ |
#define KN02XA_MSR_RES_27 (0x1f<<27) /* unused */ |
#define KN02XA_MSR_SIZE (1<<13) /* 16M/4M stride */ |
#define KN02XA_SLOT_BASE 0x1c000000 |