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ks0127.c
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1 /*
2  * Video Capture Driver (Video for Linux 1/2)
3  * for the Matrox Marvel G200,G400 and Rainbow Runner-G series
4  *
5  * This module is an interface to the KS0127 video decoder chip.
6  *
7  * Copyright (C) 1999 Ryan Drake <[email protected]>
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License
11  * as published by the Free Software Foundation; either version 2
12  * of the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22  *
23  *****************************************************************************
24  *
25  * Modified and extended by
26  * Mike Bernson <[email protected]>
27  * Gerard v.d. Horst
28  * Leon van Stuivenberg <[email protected]>
29  * Gernot Ziegler <[email protected]>
30  *
31  * Version History:
32  * V1.0 Ryan Drake Initial version by Ryan Drake
33  * V1.1 Gerard v.d. Horst Added some debugoutput, reset the video-standard
34  */
35 
36 #include <linux/init.h>
37 #include <linux/module.h>
38 #include <linux/delay.h>
39 #include <linux/errno.h>
40 #include <linux/kernel.h>
41 #include <linux/i2c.h>
42 #include <linux/videodev2.h>
43 #include <linux/slab.h>
44 #include <media/v4l2-device.h>
45 #include <media/v4l2-chip-ident.h>
46 #include "ks0127.h"
47 
48 MODULE_DESCRIPTION("KS0127 video decoder driver");
49 MODULE_AUTHOR("Ryan Drake");
50 MODULE_LICENSE("GPL");
51 
52 /* Addresses */
53 #define I2C_KS0127_ADDON 0xD8
54 #define I2C_KS0127_ONBOARD 0xDA
55 
56 
57 /* ks0127 control registers */
58 #define KS_STAT 0x00
59 #define KS_CMDA 0x01
60 #define KS_CMDB 0x02
61 #define KS_CMDC 0x03
62 #define KS_CMDD 0x04
63 #define KS_HAVB 0x05
64 #define KS_HAVE 0x06
65 #define KS_HS1B 0x07
66 #define KS_HS1E 0x08
67 #define KS_HS2B 0x09
68 #define KS_HS2E 0x0a
69 #define KS_AGC 0x0b
70 #define KS_HXTRA 0x0c
71 #define KS_CDEM 0x0d
72 #define KS_PORTAB 0x0e
73 #define KS_LUMA 0x0f
74 #define KS_CON 0x10
75 #define KS_BRT 0x11
76 #define KS_CHROMA 0x12
77 #define KS_CHROMB 0x13
78 #define KS_DEMOD 0x14
79 #define KS_SAT 0x15
80 #define KS_HUE 0x16
81 #define KS_VERTIA 0x17
82 #define KS_VERTIB 0x18
83 #define KS_VERTIC 0x19
84 #define KS_HSCLL 0x1a
85 #define KS_HSCLH 0x1b
86 #define KS_VSCLL 0x1c
87 #define KS_VSCLH 0x1d
88 #define KS_OFMTA 0x1e
89 #define KS_OFMTB 0x1f
90 #define KS_VBICTL 0x20
91 #define KS_CCDAT2 0x21
92 #define KS_CCDAT1 0x22
93 #define KS_VBIL30 0x23
94 #define KS_VBIL74 0x24
95 #define KS_VBIL118 0x25
96 #define KS_VBIL1512 0x26
97 #define KS_TTFRAM 0x27
98 #define KS_TESTA 0x28
99 #define KS_UVOFFH 0x29
100 #define KS_UVOFFL 0x2a
101 #define KS_UGAIN 0x2b
102 #define KS_VGAIN 0x2c
103 #define KS_VAVB 0x2d
104 #define KS_VAVE 0x2e
105 #define KS_CTRACK 0x2f
106 #define KS_POLCTL 0x30
107 #define KS_REFCOD 0x31
108 #define KS_INVALY 0x32
109 #define KS_INVALU 0x33
110 #define KS_INVALV 0x34
111 #define KS_UNUSEY 0x35
112 #define KS_UNUSEU 0x36
113 #define KS_UNUSEV 0x37
114 #define KS_USRSAV 0x38
115 #define KS_USREAV 0x39
116 #define KS_SHS1A 0x3a
117 #define KS_SHS1B 0x3b
118 #define KS_SHS1C 0x3c
119 #define KS_CMDE 0x3d
120 #define KS_VSDEL 0x3e
121 #define KS_CMDF 0x3f
122 #define KS_GAMMA0 0x40
123 #define KS_GAMMA1 0x41
124 #define KS_GAMMA2 0x42
125 #define KS_GAMMA3 0x43
126 #define KS_GAMMA4 0x44
127 #define KS_GAMMA5 0x45
128 #define KS_GAMMA6 0x46
129 #define KS_GAMMA7 0x47
130 #define KS_GAMMA8 0x48
131 #define KS_GAMMA9 0x49
132 #define KS_GAMMA10 0x4a
133 #define KS_GAMMA11 0x4b
134 #define KS_GAMMA12 0x4c
135 #define KS_GAMMA13 0x4d
136 #define KS_GAMMA14 0x4e
137 #define KS_GAMMA15 0x4f
138 #define KS_GAMMA16 0x50
139 #define KS_GAMMA17 0x51
140 #define KS_GAMMA18 0x52
141 #define KS_GAMMA19 0x53
142 #define KS_GAMMA20 0x54
143 #define KS_GAMMA21 0x55
144 #define KS_GAMMA22 0x56
145 #define KS_GAMMA23 0x57
146 #define KS_GAMMA24 0x58
147 #define KS_GAMMA25 0x59
148 #define KS_GAMMA26 0x5a
149 #define KS_GAMMA27 0x5b
150 #define KS_GAMMA28 0x5c
151 #define KS_GAMMA29 0x5d
152 #define KS_GAMMA30 0x5e
153 #define KS_GAMMA31 0x5f
154 #define KS_GAMMAD0 0x60
155 #define KS_GAMMAD1 0x61
156 #define KS_GAMMAD2 0x62
157 #define KS_GAMMAD3 0x63
158 #define KS_GAMMAD4 0x64
159 #define KS_GAMMAD5 0x65
160 #define KS_GAMMAD6 0x66
161 #define KS_GAMMAD7 0x67
162 #define KS_GAMMAD8 0x68
163 #define KS_GAMMAD9 0x69
164 #define KS_GAMMAD10 0x6a
165 #define KS_GAMMAD11 0x6b
166 #define KS_GAMMAD12 0x6c
167 #define KS_GAMMAD13 0x6d
168 #define KS_GAMMAD14 0x6e
169 #define KS_GAMMAD15 0x6f
170 #define KS_GAMMAD16 0x70
171 #define KS_GAMMAD17 0x71
172 #define KS_GAMMAD18 0x72
173 #define KS_GAMMAD19 0x73
174 #define KS_GAMMAD20 0x74
175 #define KS_GAMMAD21 0x75
176 #define KS_GAMMAD22 0x76
177 #define KS_GAMMAD23 0x77
178 #define KS_GAMMAD24 0x78
179 #define KS_GAMMAD25 0x79
180 #define KS_GAMMAD26 0x7a
181 #define KS_GAMMAD27 0x7b
182 #define KS_GAMMAD28 0x7c
183 #define KS_GAMMAD29 0x7d
184 #define KS_GAMMAD30 0x7e
185 #define KS_GAMMAD31 0x7f
186 
187 
188 /****************************************************************************
189 * mga_dev : represents one ks0127 chip.
190 ****************************************************************************/
191 
192 struct adjust {
193  int contrast;
194  int bright;
195  int hue;
196  int ugain;
197  int vgain;
198 };
199 
200 struct ks0127 {
201  struct v4l2_subdev sd;
202  v4l2_std_id norm;
203  int ident;
204  u8 regs[256];
205 };
206 
207 static inline struct ks0127 *to_ks0127(struct v4l2_subdev *sd)
208 {
209  return container_of(sd, struct ks0127, sd);
210 }
211 
212 
213 static int debug; /* insmod parameter */
214 
215 module_param(debug, int, 0);
216 MODULE_PARM_DESC(debug, "Debug output");
217 
218 static u8 reg_defaults[64];
219 
220 static void init_reg_defaults(void)
221 {
222  static int initialized;
223  u8 *table = reg_defaults;
224 
225  if (initialized)
226  return;
227  initialized = 1;
228 
229  table[KS_CMDA] = 0x2c; /* VSE=0, CCIR 601, autodetect standard */
230  table[KS_CMDB] = 0x12; /* VALIGN=0, AGC control and input */
231  table[KS_CMDC] = 0x00; /* Test options */
232  /* clock & input select, write 1 to PORTA */
233  table[KS_CMDD] = 0x01;
234  table[KS_HAVB] = 0x00; /* HAV Start Control */
235  table[KS_HAVE] = 0x00; /* HAV End Control */
236  table[KS_HS1B] = 0x10; /* HS1 Start Control */
237  table[KS_HS1E] = 0x00; /* HS1 End Control */
238  table[KS_HS2B] = 0x00; /* HS2 Start Control */
239  table[KS_HS2E] = 0x00; /* HS2 End Control */
240  table[KS_AGC] = 0x53; /* Manual setting for AGC */
241  table[KS_HXTRA] = 0x00; /* Extra Bits for HAV and HS1/2 */
242  table[KS_CDEM] = 0x00; /* Chroma Demodulation Control */
243  table[KS_PORTAB] = 0x0f; /* port B is input, port A output GPPORT */
244  table[KS_LUMA] = 0x01; /* Luma control */
245  table[KS_CON] = 0x00; /* Contrast Control */
246  table[KS_BRT] = 0x00; /* Brightness Control */
247  table[KS_CHROMA] = 0x2a; /* Chroma control A */
248  table[KS_CHROMB] = 0x90; /* Chroma control B */
249  table[KS_DEMOD] = 0x00; /* Chroma Demodulation Control & Status */
250  table[KS_SAT] = 0x00; /* Color Saturation Control*/
251  table[KS_HUE] = 0x00; /* Hue Control */
252  table[KS_VERTIA] = 0x00; /* Vertical Processing Control A */
253  /* Vertical Processing Control B, luma 1 line delayed */
254  table[KS_VERTIB] = 0x12;
255  table[KS_VERTIC] = 0x0b; /* Vertical Processing Control C */
256  table[KS_HSCLL] = 0x00; /* Horizontal Scaling Ratio Low */
257  table[KS_HSCLH] = 0x00; /* Horizontal Scaling Ratio High */
258  table[KS_VSCLL] = 0x00; /* Vertical Scaling Ratio Low */
259  table[KS_VSCLH] = 0x00; /* Vertical Scaling Ratio High */
260  /* 16 bit YCbCr 4:2:2 output; I can't make the bt866 like 8 bit /Sam */
261  table[KS_OFMTA] = 0x30;
262  table[KS_OFMTB] = 0x00; /* Output Control B */
263  /* VBI Decoder Control; 4bit fmt: avoid Y overflow */
264  table[KS_VBICTL] = 0x5d;
265  table[KS_CCDAT2] = 0x00; /* Read Only register */
266  table[KS_CCDAT1] = 0x00; /* Read Only register */
267  table[KS_VBIL30] = 0xa8; /* VBI data decoding options */
268  table[KS_VBIL74] = 0xaa; /* VBI data decoding options */
269  table[KS_VBIL118] = 0x2a; /* VBI data decoding options */
270  table[KS_VBIL1512] = 0x00; /* VBI data decoding options */
271  table[KS_TTFRAM] = 0x00; /* Teletext frame alignment pattern */
272  table[KS_TESTA] = 0x00; /* test register, shouldn't be written */
273  table[KS_UVOFFH] = 0x00; /* UV Offset Adjustment High */
274  table[KS_UVOFFL] = 0x00; /* UV Offset Adjustment Low */
275  table[KS_UGAIN] = 0x00; /* U Component Gain Adjustment */
276  table[KS_VGAIN] = 0x00; /* V Component Gain Adjustment */
277  table[KS_VAVB] = 0x07; /* VAV Begin */
278  table[KS_VAVE] = 0x00; /* VAV End */
279  table[KS_CTRACK] = 0x00; /* Chroma Tracking Control */
280  table[KS_POLCTL] = 0x41; /* Timing Signal Polarity Control */
281  table[KS_REFCOD] = 0x80; /* Reference Code Insertion Control */
282  table[KS_INVALY] = 0x10; /* Invalid Y Code */
283  table[KS_INVALU] = 0x80; /* Invalid U Code */
284  table[KS_INVALV] = 0x80; /* Invalid V Code */
285  table[KS_UNUSEY] = 0x10; /* Unused Y Code */
286  table[KS_UNUSEU] = 0x80; /* Unused U Code */
287  table[KS_UNUSEV] = 0x80; /* Unused V Code */
288  table[KS_USRSAV] = 0x00; /* reserved */
289  table[KS_USREAV] = 0x00; /* reserved */
290  table[KS_SHS1A] = 0x00; /* User Defined SHS1 A */
291  /* User Defined SHS1 B, ALT656=1 on 0127B */
292  table[KS_SHS1B] = 0x80;
293  table[KS_SHS1C] = 0x00; /* User Defined SHS1 C */
294  table[KS_CMDE] = 0x00; /* Command Register E */
295  table[KS_VSDEL] = 0x00; /* VS Delay Control */
296  /* Command Register F, update -immediately- */
297  /* (there might come no vsync)*/
298  table[KS_CMDF] = 0x02;
299 }
300 
301 
302 /* We need to manually read because of a bug in the KS0127 chip.
303  *
304  * An explanation from [email protected]:
305  *
306  * During I2C reads, the KS0127 only samples for a stop condition
307  * during the place where the acknowledge bit should be. Any standard
308  * I2C implementation (correctly) throws in another clock transition
309  * at the 9th bit, and the KS0127 will not recognize the stop condition
310  * and will continue to clock out data.
311  *
312  * So we have to do the read ourself. Big deal.
313  * workaround in i2c-algo-bit
314  */
315 
316 
317 static u8 ks0127_read(struct v4l2_subdev *sd, u8 reg)
318 {
319  struct i2c_client *client = v4l2_get_subdevdata(sd);
320  char val = 0;
321  struct i2c_msg msgs[] = {
322  {
323  .addr = client->addr,
324  .len = sizeof(reg),
325  .buf = &reg
326  },
327  {
328  .addr = client->addr,
329  .flags = I2C_M_RD | I2C_M_NO_RD_ACK,
330  .len = sizeof(val),
331  .buf = &val
332  }
333  };
334  int ret;
335 
336  ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
337  if (ret != ARRAY_SIZE(msgs))
338  v4l2_dbg(1, debug, sd, "read error\n");
339 
340  return val;
341 }
342 
343 
344 static void ks0127_write(struct v4l2_subdev *sd, u8 reg, u8 val)
345 {
346  struct i2c_client *client = v4l2_get_subdevdata(sd);
347  struct ks0127 *ks = to_ks0127(sd);
348  char msg[] = { reg, val };
349 
350  if (i2c_master_send(client, msg, sizeof(msg)) != sizeof(msg))
351  v4l2_dbg(1, debug, sd, "write error\n");
352 
353  ks->regs[reg] = val;
354 }
355 
356 
357 /* generic bit-twiddling */
358 static void ks0127_and_or(struct v4l2_subdev *sd, u8 reg, u8 and_v, u8 or_v)
359 {
360  struct ks0127 *ks = to_ks0127(sd);
361 
362  u8 val = ks->regs[reg];
363  val = (val & and_v) | or_v;
364  ks0127_write(sd, reg, val);
365 }
366 
367 
368 
369 /****************************************************************************
370 * ks0127 private api
371 ****************************************************************************/
372 static void ks0127_init(struct v4l2_subdev *sd)
373 {
374  struct ks0127 *ks = to_ks0127(sd);
375  u8 *table = reg_defaults;
376  int i;
377 
378  ks->ident = V4L2_IDENT_KS0127;
379 
380  v4l2_dbg(1, debug, sd, "reset\n");
381  msleep(1);
382 
383  /* initialize all registers to known values */
384  /* (except STAT, 0x21, 0x22, TEST and 0x38,0x39) */
385 
386  for (i = 1; i < 33; i++)
387  ks0127_write(sd, i, table[i]);
388 
389  for (i = 35; i < 40; i++)
390  ks0127_write(sd, i, table[i]);
391 
392  for (i = 41; i < 56; i++)
393  ks0127_write(sd, i, table[i]);
394 
395  for (i = 58; i < 64; i++)
396  ks0127_write(sd, i, table[i]);
397 
398 
399  if ((ks0127_read(sd, KS_STAT) & 0x80) == 0) {
400  ks->ident = V4L2_IDENT_KS0122S;
401  v4l2_dbg(1, debug, sd, "ks0122s found\n");
402  return;
403  }
404 
405  switch (ks0127_read(sd, KS_CMDE) & 0x0f) {
406  case 0:
407  v4l2_dbg(1, debug, sd, "ks0127 found\n");
408  break;
409 
410  case 9:
411  ks->ident = V4L2_IDENT_KS0127B;
412  v4l2_dbg(1, debug, sd, "ks0127B Revision A found\n");
413  break;
414 
415  default:
416  v4l2_dbg(1, debug, sd, "unknown revision\n");
417  break;
418  }
419 }
420 
421 static int ks0127_s_routing(struct v4l2_subdev *sd,
422  u32 input, u32 output, u32 config)
423 {
424  struct ks0127 *ks = to_ks0127(sd);
425 
426  switch (input) {
427  case KS_INPUT_COMPOSITE_1:
428  case KS_INPUT_COMPOSITE_2:
429  case KS_INPUT_COMPOSITE_3:
430  case KS_INPUT_COMPOSITE_4:
431  case KS_INPUT_COMPOSITE_5:
432  case KS_INPUT_COMPOSITE_6:
433  v4l2_dbg(1, debug, sd,
434  "s_routing %d: Composite\n", input);
435  /* autodetect 50/60 Hz */
436  ks0127_and_or(sd, KS_CMDA, 0xfc, 0x00);
437  /* VSE=0 */
438  ks0127_and_or(sd, KS_CMDA, ~0x40, 0x00);
439  /* set input line */
440  ks0127_and_or(sd, KS_CMDB, 0xb0, input);
441  /* non-freerunning mode */
442  ks0127_and_or(sd, KS_CMDC, 0x70, 0x0a);
443  /* analog input */
444  ks0127_and_or(sd, KS_CMDD, 0x03, 0x00);
445  /* enable chroma demodulation */
446  ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x00);
447  /* chroma trap, HYBWR=1 */
448  ks0127_and_or(sd, KS_LUMA, 0x00,
449  (reg_defaults[KS_LUMA])|0x0c);
450  /* scaler fullbw, luma comb off */
451  ks0127_and_or(sd, KS_VERTIA, 0x08, 0x81);
452  /* manual chroma comb .25 .5 .25 */
453  ks0127_and_or(sd, KS_VERTIC, 0x0f, 0x90);
454 
455  /* chroma path delay */
456  ks0127_and_or(sd, KS_CHROMB, 0x0f, 0x90);
457 
458  ks0127_write(sd, KS_UGAIN, reg_defaults[KS_UGAIN]);
459  ks0127_write(sd, KS_VGAIN, reg_defaults[KS_VGAIN]);
460  ks0127_write(sd, KS_UVOFFH, reg_defaults[KS_UVOFFH]);
461  ks0127_write(sd, KS_UVOFFL, reg_defaults[KS_UVOFFL]);
462  break;
463 
464  case KS_INPUT_SVIDEO_1:
465  case KS_INPUT_SVIDEO_2:
466  case KS_INPUT_SVIDEO_3:
467  v4l2_dbg(1, debug, sd,
468  "s_routing %d: S-Video\n", input);
469  /* autodetect 50/60 Hz */
470  ks0127_and_or(sd, KS_CMDA, 0xfc, 0x00);
471  /* VSE=0 */
472  ks0127_and_or(sd, KS_CMDA, ~0x40, 0x00);
473  /* set input line */
474  ks0127_and_or(sd, KS_CMDB, 0xb0, input);
475  /* non-freerunning mode */
476  ks0127_and_or(sd, KS_CMDC, 0x70, 0x0a);
477  /* analog input */
478  ks0127_and_or(sd, KS_CMDD, 0x03, 0x00);
479  /* enable chroma demodulation */
480  ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x00);
481  ks0127_and_or(sd, KS_LUMA, 0x00,
482  reg_defaults[KS_LUMA]);
483  /* disable luma comb */
484  ks0127_and_or(sd, KS_VERTIA, 0x08,
485  (reg_defaults[KS_VERTIA]&0xf0)|0x01);
486  ks0127_and_or(sd, KS_VERTIC, 0x0f,
487  reg_defaults[KS_VERTIC]&0xf0);
488 
489  ks0127_and_or(sd, KS_CHROMB, 0x0f,
490  reg_defaults[KS_CHROMB]&0xf0);
491 
492  ks0127_write(sd, KS_UGAIN, reg_defaults[KS_UGAIN]);
493  ks0127_write(sd, KS_VGAIN, reg_defaults[KS_VGAIN]);
494  ks0127_write(sd, KS_UVOFFH, reg_defaults[KS_UVOFFH]);
495  ks0127_write(sd, KS_UVOFFL, reg_defaults[KS_UVOFFL]);
496  break;
497 
498  case KS_INPUT_YUV656:
499  v4l2_dbg(1, debug, sd, "s_routing 15: YUV656\n");
500  if (ks->norm & V4L2_STD_525_60)
501  /* force 60 Hz */
502  ks0127_and_or(sd, KS_CMDA, 0xfc, 0x03);
503  else
504  /* force 50 Hz */
505  ks0127_and_or(sd, KS_CMDA, 0xfc, 0x02);
506 
507  ks0127_and_or(sd, KS_CMDA, 0xff, 0x40); /* VSE=1 */
508  /* set input line and VALIGN */
509  ks0127_and_or(sd, KS_CMDB, 0xb0, (input | 0x40));
510  /* freerunning mode, */
511  /* TSTGEN = 1 TSTGFR=11 TSTGPH=0 TSTGPK=0 VMEM=1*/
512  ks0127_and_or(sd, KS_CMDC, 0x70, 0x87);
513  /* digital input, SYNDIR = 0 INPSL=01 CLKDIR=0 EAV=0 */
514  ks0127_and_or(sd, KS_CMDD, 0x03, 0x08);
515  /* disable chroma demodulation */
516  ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x30);
517  /* HYPK =01 CTRAP = 0 HYBWR=0 PED=1 RGBH=1 UNIT=1 */
518  ks0127_and_or(sd, KS_LUMA, 0x00, 0x71);
519  ks0127_and_or(sd, KS_VERTIC, 0x0f,
520  reg_defaults[KS_VERTIC]&0xf0);
521 
522  /* scaler fullbw, luma comb off */
523  ks0127_and_or(sd, KS_VERTIA, 0x08, 0x81);
524 
525  ks0127_and_or(sd, KS_CHROMB, 0x0f,
526  reg_defaults[KS_CHROMB]&0xf0);
527 
528  ks0127_and_or(sd, KS_CON, 0x00, 0x00);
529  ks0127_and_or(sd, KS_BRT, 0x00, 32); /* spec: 34 */
530  /* spec: 229 (e5) */
531  ks0127_and_or(sd, KS_SAT, 0x00, 0xe8);
532  ks0127_and_or(sd, KS_HUE, 0x00, 0);
533 
534  ks0127_and_or(sd, KS_UGAIN, 0x00, 238);
535  ks0127_and_or(sd, KS_VGAIN, 0x00, 0x00);
536 
537  /*UOFF:0x30, VOFF:0x30, TSTCGN=1 */
538  ks0127_and_or(sd, KS_UVOFFH, 0x00, 0x4f);
539  ks0127_and_or(sd, KS_UVOFFL, 0x00, 0x00);
540  break;
541 
542  default:
543  v4l2_dbg(1, debug, sd,
544  "s_routing: Unknown input %d\n", input);
545  break;
546  }
547 
548  /* hack: CDMLPF sometimes spontaneously switches on; */
549  /* force back off */
550  ks0127_write(sd, KS_DEMOD, reg_defaults[KS_DEMOD]);
551  return 0;
552 }
553 
554 static int ks0127_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
555 {
556  struct ks0127 *ks = to_ks0127(sd);
557 
558  /* Set to automatic SECAM/Fsc mode */
559  ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x00);
560 
561  ks->norm = std;
562  if (std & V4L2_STD_NTSC) {
563  v4l2_dbg(1, debug, sd,
564  "s_std: NTSC_M\n");
565  ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x20);
566  } else if (std & V4L2_STD_PAL_N) {
567  v4l2_dbg(1, debug, sd,
568  "s_std: NTSC_N (fixme)\n");
569  ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x40);
570  } else if (std & V4L2_STD_PAL) {
571  v4l2_dbg(1, debug, sd,
572  "s_std: PAL_N\n");
573  ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x20);
574  } else if (std & V4L2_STD_PAL_M) {
575  v4l2_dbg(1, debug, sd,
576  "s_std: PAL_M (fixme)\n");
577  ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x40);
578  } else if (std & V4L2_STD_SECAM) {
579  v4l2_dbg(1, debug, sd,
580  "s_std: SECAM\n");
581 
582  /* set to secam autodetection */
583  ks0127_and_or(sd, KS_CHROMA, 0xdf, 0x20);
584  ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x00);
585  schedule_timeout_interruptible(HZ/10+1);
586 
587  /* did it autodetect? */
588  if (!(ks0127_read(sd, KS_DEMOD) & 0x40))
589  /* force to secam mode */
590  ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x0f);
591  } else {
592  v4l2_dbg(1, debug, sd, "s_std: Unknown norm %llx\n",
593  (unsigned long long)std);
594  }
595  return 0;
596 }
597 
598 static int ks0127_s_stream(struct v4l2_subdev *sd, int enable)
599 {
600  v4l2_dbg(1, debug, sd, "s_stream(%d)\n", enable);
601  if (enable) {
602  /* All output pins on */
603  ks0127_and_or(sd, KS_OFMTA, 0xcf, 0x30);
604  /* Obey the OEN pin */
605  ks0127_and_or(sd, KS_CDEM, 0x7f, 0x00);
606  } else {
607  /* Video output pins off */
608  ks0127_and_or(sd, KS_OFMTA, 0xcf, 0x00);
609  /* Ignore the OEN pin */
610  ks0127_and_or(sd, KS_CDEM, 0x7f, 0x80);
611  }
612  return 0;
613 }
614 
615 static int ks0127_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd)
616 {
617  int stat = V4L2_IN_ST_NO_SIGNAL;
618  u8 status;
619  v4l2_std_id std = V4L2_STD_ALL;
620 
621  status = ks0127_read(sd, KS_STAT);
622  if (!(status & 0x20)) /* NOVID not set */
623  stat = 0;
624  if (!(status & 0x01)) /* CLOCK set */
625  stat |= V4L2_IN_ST_NO_COLOR;
626  if ((status & 0x08)) /* PALDET set */
627  std = V4L2_STD_PAL;
628  else
629  std = V4L2_STD_NTSC;
630  if (pstd)
631  *pstd = std;
632  if (pstatus)
633  *pstatus = stat;
634  return 0;
635 }
636 
637 static int ks0127_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
638 {
639  v4l2_dbg(1, debug, sd, "querystd\n");
640  return ks0127_status(sd, NULL, std);
641 }
642 
643 static int ks0127_g_input_status(struct v4l2_subdev *sd, u32 *status)
644 {
645  v4l2_dbg(1, debug, sd, "g_input_status\n");
646  return ks0127_status(sd, status, NULL);
647 }
648 
649 static int ks0127_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
650 {
651  struct i2c_client *client = v4l2_get_subdevdata(sd);
652  struct ks0127 *ks = to_ks0127(sd);
653 
654  return v4l2_chip_ident_i2c_client(client, chip, ks->ident, 0);
655 }
656 
657 /* ----------------------------------------------------------------------- */
658 
659 static const struct v4l2_subdev_core_ops ks0127_core_ops = {
660  .g_chip_ident = ks0127_g_chip_ident,
661  .s_std = ks0127_s_std,
662 };
663 
664 static const struct v4l2_subdev_video_ops ks0127_video_ops = {
665  .s_routing = ks0127_s_routing,
666  .s_stream = ks0127_s_stream,
667  .querystd = ks0127_querystd,
668  .g_input_status = ks0127_g_input_status,
669 };
670 
671 static const struct v4l2_subdev_ops ks0127_ops = {
672  .core = &ks0127_core_ops,
673  .video = &ks0127_video_ops,
674 };
675 
676 /* ----------------------------------------------------------------------- */
677 
678 
679 static int ks0127_probe(struct i2c_client *client, const struct i2c_device_id *id)
680 {
681  struct ks0127 *ks;
682  struct v4l2_subdev *sd;
683 
684  v4l_info(client, "%s chip found @ 0x%x (%s)\n",
685  client->addr == (I2C_KS0127_ADDON >> 1) ? "addon" : "on-board",
686  client->addr << 1, client->adapter->name);
687 
688  ks = kzalloc(sizeof(*ks), GFP_KERNEL);
689  if (ks == NULL)
690  return -ENOMEM;
691  sd = &ks->sd;
692  v4l2_i2c_subdev_init(sd, client, &ks0127_ops);
693 
694  /* power up */
695  init_reg_defaults();
696  ks0127_write(sd, KS_CMDA, 0x2c);
697  mdelay(10);
698 
699  /* reset the device */
700  ks0127_init(sd);
701  return 0;
702 }
703 
704 static int ks0127_remove(struct i2c_client *client)
705 {
706  struct v4l2_subdev *sd = i2c_get_clientdata(client);
707 
708  v4l2_device_unregister_subdev(sd);
709  ks0127_write(sd, KS_OFMTA, 0x20); /* tristate */
710  ks0127_write(sd, KS_CMDA, 0x2c | 0x80); /* power down */
711  kfree(to_ks0127(sd));
712  return 0;
713 }
714 
715 static const struct i2c_device_id ks0127_id[] = {
716  { "ks0127", 0 },
717  { "ks0127b", 0 },
718  { "ks0122s", 0 },
719  { }
720 };
721 MODULE_DEVICE_TABLE(i2c, ks0127_id);
722 
723 static struct i2c_driver ks0127_driver = {
724  .driver = {
725  .owner = THIS_MODULE,
726  .name = "ks0127",
727  },
728  .probe = ks0127_probe,
729  .remove = ks0127_remove,
730  .id_table = ks0127_id,
731 };
732 
733 module_i2c_driver(ks0127_driver);
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