26 #include <asm/div64.h>
34 #define dprintk(args...) \
37 printk(KERN_DEBUG "lgs8gxx: " args); \
41 static int fake_signal_str = 1;
43 #define LGS8GXX_FIRMWARE "lgs8g75.fw"
50 "Signal strength calculation is slow.(default:on).");
65 dprintk(
"%s: reg=0x%02X, data=0x%02X\n", __func__, reg, data);
70 dprintk(
"%s: error reg=0x%x, data=0x%x, ret=%i\n",
71 __func__, reg, data, ret);
73 return (ret != 1) ? -1 : 0;
84 { .
flags = 0, .buf = b0, .len = 1 },
85 { .flags =
I2C_M_RD, .buf = b1, .len = 1 },
88 dev_addr = priv->
config->demod_address;
91 msg[1].
addr = msg[0].
addr = dev_addr;
95 dprintk(
"%s: error reg=0x%x, ret=%i\n", __func__, reg, ret);
101 dprintk(
"%s: reg=0x%02X, data=0x%02X\n", __func__, reg, b1[0]);
107 lgs8gxx_write_reg(priv, 0x02, 0x00);
109 lgs8gxx_write_reg(priv, 0x02, 0x01);
121 for (i = 0; i < tries; i++) {
122 lgs8gxx_read_reg(priv, reg, &t);
124 if ((t & mask) == val)
140 ((config->
ext_adc) ? 0x80 : 0x00) |
142 ((config->
if_freq == 0) ? 0x08 : 0x00) |
148 lgs8gxx_write_reg(priv, 0xBA, 0x40);
151 lgs8gxx_write_reg(priv, 0x07, if_conf);
162 if_clk = priv->
config->if_clk_freq;
169 v32 = val & 0xFFFFFFFF;
170 dprintk(
"Set IF Freq to %dkHz\n", freq);
173 dprintk(
"Set IF Freq to baseband\n");
175 dprintk(
"AFC_INIT_FREQ = 0x%08X\n", v32);
178 lgs8gxx_write_reg(priv, 0x08, 0xFF & (v32));
179 lgs8gxx_write_reg(priv, 0x09, 0xFF & (v32 >> 8));
180 lgs8gxx_write_reg(priv, 0x0A, 0xFF & (v32 >> 16));
181 lgs8gxx_write_reg(priv, 0x0B, 0xFF & (v32 >> 24));
183 lgs8gxx_write_reg(priv, 0x09, 0xFF & (v32));
184 lgs8gxx_write_reg(priv, 0x0A, 0xFF & (v32 >> 8));
185 lgs8gxx_write_reg(priv, 0x0B, 0xFF & (v32 >> 16));
186 lgs8gxx_write_reg(priv, 0x0C, 0xFF & (v32 >> 24));
204 for (i = 0; i < 4; i++) {
205 lgs8gxx_read_reg(priv, reg_addr, &t);
212 val *= priv->
config->if_clk_freq;
224 lgs8gxx_write_reg(priv, 0xC6, 0x01);
227 lgs8gxx_read_reg(priv, 0x0C, &t);
229 lgs8gxx_write_reg(priv, 0x0C, t | 0x80);
230 lgs8gxx_write_reg(priv, 0x39, 0x00);
231 lgs8gxx_write_reg(priv, 0x3D, 0x04);
237 lgs8gxx_read_reg(priv, 0x7E, &t);
238 lgs8gxx_write_reg(priv, 0x7E, t | 0x01);
241 lgs8gxx_read_reg(priv, 0xC5, &t);
242 lgs8gxx_write_reg(priv, 0xC5, t & 0xE0);
247 lgs8gxx_write_reg(priv, 0xC1, 0x03);
249 lgs8gxx_read_reg(priv, 0x7C, &t);
250 t = (t & 0x8C) | 0x03;
251 lgs8gxx_write_reg(priv, 0x7C, t);
254 lgs8gxx_read_reg(priv, 0xC3, &t);
255 t = (t & 0xEF) | 0x10;
256 lgs8gxx_write_reg(priv, 0xC3, t);
260 lgs8gxx_write_reg(priv, 0xD9, 0x40);
265 static int lgs8gxx_set_mode_manual(
struct lgs8gxx_state *priv)
271 lgs8gxx_read_reg(priv, 0x0C, &t);
273 lgs8gxx_write_reg(priv, 0x0C, t);
275 lgs8gxx_read_reg(priv, 0x0C, &t);
276 lgs8gxx_read_reg(priv, 0x19, &t2);
278 if (((t&0x03) == 0x01) && (t2&0x01)) {
279 lgs8gxx_write_reg(priv, 0x6E, 0x05);
280 lgs8gxx_write_reg(priv, 0x39, 0x02);
281 lgs8gxx_write_reg(priv, 0x39, 0x03);
282 lgs8gxx_write_reg(priv, 0x3D, 0x05);
283 lgs8gxx_write_reg(priv, 0x3E, 0x28);
284 lgs8gxx_write_reg(priv, 0x53, 0x80);
286 lgs8gxx_write_reg(priv, 0x6E, 0x3F);
287 lgs8gxx_write_reg(priv, 0x39, 0x00);
288 lgs8gxx_write_reg(priv, 0x3D, 0x04);
291 lgs8gxx_soft_reset(priv);
296 lgs8gxx_write_reg(priv, 0x7E, 0);
298 lgs8gxx_write_reg(priv, 0xC1, 0);
300 lgs8gxx_read_reg(priv, 0xC5, &t);
301 t = (t & 0xE0) | 0x06;
302 lgs8gxx_write_reg(priv, 0xC5, t);
304 lgs8gxx_soft_reset(priv);
315 ret = lgs8gxx_read_reg(priv, 0x13, &t);
317 ret = lgs8gxx_read_reg(priv, 0x4B, &t);
322 *locked = ((t & 0x80) == 0x80) ? 1 : 0;
324 *locked = ((t & 0xC0) == 0xC0) ? 1 : 0;
329 static int lgs8gxx_wait_ca_lock(
struct lgs8gxx_state *priv,
u8 *locked)
344 ret = wait_reg_mask(priv, reg, mask, val, 50, 40);
345 *locked = (ret == 0) ? 1 : 0;
350 static int lgs8gxx_is_autodetect_finished(
struct lgs8gxx_state *priv,
366 ret = wait_reg_mask(priv, reg, mask, val, 10, 20);
367 *finished = (ret == 0) ? 1 : 0;
386 lgs8gxx_read_reg(priv, 0x0C, &t1);
387 lgs8gxx_read_reg(priv, 0x18, &t2);
391 t2 |= cpn ? 0x01 : 0x00;
392 lgs8gxx_write_reg(priv, 0x0C, t1);
393 lgs8gxx_write_reg(priv, 0x18, t2);
395 lgs8gxx_write_reg(priv, 0x04, gi);
397 lgs8gxx_soft_reset(priv);
398 err = lgs8gxx_wait_ca_lock(priv, locked);
399 if (err || !(*locked))
401 err = lgs8gxx_is_autodetect_finished(priv, &ad_fini);
405 dprintk(
"auto detect finished\n");
413 u8 *detected_param,
u8 *gi)
417 u8 locked = 0, tmp_gi;
421 lgs8gxx_set_mode_auto(priv);
423 lgs8gxx_write_reg(priv, 0x67, 0xAA);
424 lgs8gxx_write_reg(priv, 0x6E, 0x3F);
427 lgs8gxx_write_reg(priv, 0x03, 00);
430 for (i = 0; i < 2; i++) {
431 for (j = 0; j < 2; j++) {
433 err = lgs8gxx_autolock_gi(priv,
GI_945, j, &locked);
439 for (j = 0; j < 2; j++) {
441 err = lgs8gxx_autolock_gi(priv,
GI_420, j, &locked);
448 err = lgs8gxx_autolock_gi(priv,
GI_595, 1, &locked);
456 if ((err == 0) && (locked == 1)) {
460 lgs8gxx_read_reg(priv, 0xA2, &t);
463 lgs8gxx_read_reg(priv, 0x1F, &t);
464 *detected_param = t & 0x3F;
469 else if (tmp_gi ==
GI_595)
471 else if (tmp_gi ==
GI_420)
486 u8 detected_param = 0;
488 err = lgs8gxx_auto_detect(priv, &detected_param, &gi);
491 dprintk(
"lgs8gxx_auto_detect failed\n");
493 dprintk(
"detected param = 0x%02X\n", detected_param);
497 u8 inter_leave_len = detected_param &
TIM_MASK ;
499 inter_leave_len = (inter_leave_len ==
TIM_MIDDLE) ? 0x60 : 0x40;
501 detected_param |= inter_leave_len;
505 lgs8gxx_read_reg(priv, 0x19, &t);
507 t |= detected_param << 1;
508 lgs8gxx_write_reg(priv, 0x19, t);
510 lgs8gxx_write_reg(priv, 0x7D, detected_param);
512 lgs8gxx_write_reg(priv, 0xC0, detected_param);
517 lgs8gxx_set_mode_manual(priv);
538 ret = lgs8gxx_read_reg(priv, reg_addr, &t);
547 ret = lgs8gxx_write_reg(priv, reg_addr, t);
563 r26 |= (sel & 0x01) << 7;
564 r27 |= (sel & 0x02) >> 1;
565 lgs8gxx_write_reg(priv, 0x26, r26);
566 lgs8gxx_write_reg(priv, 0x27,
r27);
578 lgs8gxx_write_reg(priv, 0xc1, 0x3);
580 lgs8gxx_read_reg(priv, 0x7c, &t);
581 lgs8gxx_write_reg(priv, 0x7c, (t&0x8c) | 0x3);
584 lgs8gxx_read_reg(priv, 0xc3, &t);
585 lgs8gxx_write_reg(priv, 0xc3, t&0x10);
601 lgs8gxx_write_reg(priv, 0xC6, 0x40);
603 lgs8gxx_write_reg(priv, 0x3D, 0x04);
604 lgs8gxx_write_reg(priv, 0x39, 0x00);
606 lgs8gxx_write_reg(priv, 0x3A, 0x00);
607 lgs8gxx_write_reg(priv, 0x38, 0x00);
608 lgs8gxx_write_reg(priv, 0x3B, 0x00);
609 lgs8gxx_write_reg(priv, 0x38, 0x00);
611 for (i = 0; i < fw->
size; i++) {
612 lgs8gxx_write_reg(priv, 0x38, 0x00);
613 lgs8gxx_write_reg(priv, 0x3A, (
u8)(i&0xff));
614 lgs8gxx_write_reg(priv, 0x3B, (
u8)(i>>8));
615 lgs8gxx_write_reg(priv, 0x3C, fw->
data[i]);
618 lgs8gxx_write_reg(priv, 0x38, 0x00);
633 lgs8gxx_read_reg(priv, 0, &data);
634 dprintk(
"reg 0 = 0x%02X\n", data);
637 lgs8g75_set_adc_vpp(priv, config->
adc_vpp);
640 err = lgs8gxx_set_mpeg_mode(priv, config->
serial_ts,
648 lgs8gxx_set_if_freq(priv, priv->
config->if_freq);
649 lgs8gxx_set_ad_mode(priv);
663 static int lgs8gxx_write(
struct dvb_frontend *fe,
const u8 buf[],
int len)
670 return lgs8gxx_write_reg(priv, buf[0], buf[1]);
681 if (fe->
ops.tuner_ops.set_params) {
682 fe->
ops.tuner_ops.set_params(fe);
683 if (fe->
ops.i2c_gate_ctrl)
684 fe->
ops.i2c_gate_ctrl(fe, 0);
688 lgs8gxx_auto_lock(priv);
744 lgs8gxx_get_afc_phase(priv);
745 lgs8gxx_is_locked(priv, &locked);
753 ret = lgs8gxx_read_reg(priv, 0x4B, &t);
757 dprintk(
"Reg 0x4B: 0x%02X\n", t);
761 if ((t & 0x40) == 0x40)
763 if ((t & 0x80) == 0x80)
767 if ((t & 0x80) == 0x80)
773 dprintk(
"%s: fe_status=0x%x\n", __func__, *fe_status);
783 lgs8gxx_read_reg(priv, 0x3F, &agc_lvl[0]);
784 lgs8gxx_read_reg(priv, 0x3E, &agc_lvl[1]);
790 dprintk(
"agc_lvl: 0x%04X\n", v);
807 *signal = cat * 65535 / 5;
812 static int lgs8913_read_signal_strength(
struct lgs8gxx_state *priv,
u16 *signal)
815 s16 max_strength = 0;
821 ret = lgs8gxx_read_reg(priv, 0x4B, &t);
825 if (fake_signal_str) {
826 if ((t & 0xC0) == 0xC0) {
827 dprintk(
"Fake signal strength\n");
835 for (i = 0; i < gi; i++) {
838 lgs8gxx_write_reg(priv, 0x84, 0x03 & (i >> 8));
839 lgs8gxx_write_reg(priv, 0x83, i & 0xFF);
841 lgs8gxx_read_reg(priv, 0x94, &str);
842 if (max_strength < str)
846 *signal = max_strength;
847 dprintk(
"%s: signal=0x%02X\n", __func__, *signal);
849 lgs8gxx_read_reg(priv, 0x95, &t);
850 dprintk(
"%s: AVG Noise=0x%02X\n", __func__, t);
855 static int lgs8g75_read_signal_strength(
struct lgs8gxx_state *priv,
u16 *signal)
862 lgs8gxx_read_reg(priv, 0xB1, &t);
865 lgs8gxx_read_reg(priv, 0xB0, &t);
869 dprintk(
"%s: signal=0x%02X\n", __func__, *signal);
874 static int lgs8gxx_read_signal_strength(
struct dvb_frontend *fe,
u16 *signal)
879 return lgs8913_read_signal_strength(priv, signal);
881 return lgs8g75_read_signal_strength(priv, signal);
883 return lgs8gxx_read_signal_agc(priv, signal);
893 lgs8gxx_read_reg(priv, 0x34, &t);
895 lgs8gxx_read_reg(priv, 0x95, &t);
896 dprintk(
"AVG Noise=0x%02X\n", t);
904 static int lgs8gxx_read_ucblocks(
struct dvb_frontend *fe,
u32 *ucblocks)
907 dprintk(
"%s: ucblocks=0x%x\n", __func__, *ucblocks);
916 lgs8gxx_read_reg(priv, 0x30, &orig);
919 lgs8gxx_write_reg(priv, 0x30, t);
921 lgs8gxx_write_reg(priv, 0x30, t);
923 lgs8gxx_write_reg(priv, 0x30, t);
925 lgs8gxx_write_reg(priv, 0xC6, 0x01);
926 lgs8gxx_write_reg(priv, 0xC6, 0x41);
927 lgs8gxx_write_reg(priv, 0xC6, 0x01);
936 lgs8gxx_read_reg(priv, 0x30, &t);
938 lgs8gxx_write_reg(priv, 0x30, t);
940 lgs8gxx_write_reg(priv, 0xC6, 0x81);
947 u8 reg_err, reg_total,
t;
948 u32 total_cnt = 0, err_cnt = 0;
953 packet_counter_start(priv);
955 packet_counter_stop(priv);
958 reg_total = 0x28; reg_err = 0x2C;
960 reg_total = 0xD0; reg_err = 0xD4;
963 for (i = 0; i < 4; i++) {
965 lgs8gxx_read_reg(priv, reg_total+3-i, &t);
968 for (i = 0; i < 4; i++) {
970 lgs8gxx_read_reg(priv, reg_err+3-i, &t);
973 dprintk(
"error=%d total=%d\n", err_cnt, total_cnt);
978 *ber = err_cnt * 100 / total_cnt;
980 dprintk(
"%s: ber=0x%x\n", __func__, *ber);
988 if (priv->
config->tuner_address == 0)
991 u8 v = 0x80 | priv->
config->tuner_address;
992 return lgs8gxx_write_reg(priv, 0x01, v);
994 return lgs8gxx_write_reg(priv, 0x01, 0);
1000 .name =
"Legend Silicon LGS8913/LGS8GXX DMB-TH",
1001 .frequency_min = 474000000,
1002 .frequency_max = 858000000,
1003 .frequency_stepsize = 10000,
1011 .release = lgs8gxx_release,
1013 .init = lgs8gxx_init,
1014 .write = lgs8gxx_write,
1015 .i2c_gate_ctrl = lgs8gxx_i2c_gate_ctrl,
1017 .set_frontend = lgs8gxx_set_fe,
1018 .get_frontend = lgs8gxx_get_fe,
1019 .get_tune_settings = lgs8gxx_get_tune_settings,
1021 .read_status = lgs8gxx_read_status,
1022 .read_ber = lgs8gxx_read_ber,
1023 .read_signal_strength = lgs8gxx_read_signal_strength,
1024 .read_snr = lgs8gxx_read_snr,
1025 .read_ucblocks = lgs8gxx_read_ucblocks,
1047 if (lgs8gxx_read_reg(priv, 0, &data) != 0) {
1048 dprintk(
"%s lgs8gxx not found at i2c addr 0x%02X\n",
1049 __func__, priv->
config->demod_address);
1053 lgs8gxx_read_reg(priv, 1, &data);
1060 lgs8g75_init_data(priv);
1065 dprintk(
"%s() error_out\n", __func__);