#include <linux/slab.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/completion.h>
#include <linux/interrupt.h>
#include <linux/of.h>
#include <linux/of_mtd.h>
#include <linux/of_gpio.h>
#include <linux/mtd/lpc32xx_mlc.h>
#include <linux/io.h>
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/mtd/nand_ecc.h>

Data Structures
struct	lpc32xx_nand_cfg_mlc

struct	lpc32xx_nand_host

Macros
#define	DRV_NAME "lpc32xx_mlc"

#define	MLC_BUFF(x) (x + 0x00000)

#define	MLC_DATA(x) (x + 0x08000)

#define	MLC_CMD(x) (x + 0x10000)

#define	MLC_ADDR(x) (x + 0x10004)

#define	MLC_ECC_ENC_REG(x) (x + 0x10008)

#define	MLC_ECC_DEC_REG(x) (x + 0x1000C)

#define	MLC_ECC_AUTO_ENC_REG(x) (x + 0x10010)

#define	MLC_ECC_AUTO_DEC_REG(x) (x + 0x10014)

#define	MLC_RPR(x) (x + 0x10018)

#define	MLC_WPR(x) (x + 0x1001C)

#define	MLC_RUBP(x) (x + 0x10020)

#define	MLC_ROBP(x) (x + 0x10024)

#define	MLC_SW_WP_ADD_LOW(x) (x + 0x10028)

#define	MLC_SW_WP_ADD_HIG(x) (x + 0x1002C)

#define	MLC_ICR(x) (x + 0x10030)

#define	MLC_TIME_REG(x) (x + 0x10034)

#define	MLC_IRQ_MR(x) (x + 0x10038)

#define	MLC_IRQ_SR(x) (x + 0x1003C)

#define	MLC_LOCK_PR(x) (x + 0x10044)

#define	MLC_ISR(x) (x + 0x10048)

#define	MLC_CEH(x) (x + 0x1004C)

#define	MLCCMD_RESET 0xFF

#define	MLCICR_WPROT (1 << 3)

#define	MLCICR_LARGEBLOCK (1 << 2)

#define	MLCICR_LONGADDR (1 << 1)

#define	MLCICR_16BIT (1 << 0) /* unsupported by LPC32x0! */

#define	MLCTIMEREG_TCEA_DELAY(n) (((n) & 0x03) << 24)

#define	MLCTIMEREG_BUSY_DELAY(n) (((n) & 0x1F) << 19)

#define	MLCTIMEREG_NAND_TA(n) (((n) & 0x07) << 16)

#define	MLCTIMEREG_RD_HIGH(n) (((n) & 0x0F) << 12)

#define	MLCTIMEREG_RD_LOW(n) (((n) & 0x0F) << 8)

#define	MLCTIMEREG_WR_HIGH(n) (((n) & 0x0F) << 4)

#define	MLCTIMEREG_WR_LOW(n) (((n) & 0x0F) << 0)

#define	MLCIRQ_NAND_READY (1 << 5)

#define	MLCIRQ_CONTROLLER_READY (1 << 4)

#define	MLCIRQ_DECODE_FAILURE (1 << 3)

#define	MLCIRQ_DECODE_ERROR (1 << 2)

#define	MLCIRQ_ECC_READY (1 << 1)

#define	MLCIRQ_WRPROT_FAULT (1 << 0)

#define	MLCLOCKPR_MAGIC 0xA25E

#define	MLCISR_DECODER_FAILURE (1 << 6)

#define	MLCISR_ERRORS ((1 << 4) \| (1 << 5))

#define	MLCISR_ERRORS_DETECTED (1 << 3)

#define	MLCISR_ECC_READY (1 << 2)

#define	MLCISR_CONTROLLER_READY (1 << 1)

#define	MLCISR_NAND_READY (1 << 0)

#define	MLCCEH_NORMAL (1 << 0)

#define	lpc32xx_nand_resume NULL

#define	lpc32xx_nand_suspend NULL

Functions
	MODULE_DEVICE_TABLE (of, lpc32xx_nand_match)

	module_platform_driver (lpc32xx_nand_driver)

	MODULE_LICENSE ("GPL")

	MODULE_AUTHOR ("Roland Stigge <[email protected]>")

	MODULE_DESCRIPTION ("NAND driver for the NXP LPC32XX MLC controller")

Macro Definition Documentation

#define DRV_NAME "lpc32xx_mlc"

Definition at line 47 of file lpc32xx_mlc.c.

#define lpc32xx_nand_resume NULL

Definition at line 898 of file lpc32xx_mlc.c.

#define lpc32xx_nand_suspend NULL

Definition at line 899 of file lpc32xx_mlc.c.

#define MLC_ADDR ( x ) (x + 0x10004)

Definition at line 56 of file lpc32xx_mlc.c.

#define MLC_BUFF ( x ) (x + 0x00000)

Definition at line 53 of file lpc32xx_mlc.c.

#define MLC_CEH ( x ) (x + 0x1004C)

Definition at line 73 of file lpc32xx_mlc.c.

#define MLC_CMD ( x ) (x + 0x10000)

Definition at line 55 of file lpc32xx_mlc.c.

#define MLC_DATA ( x ) (x + 0x08000)

Definition at line 54 of file lpc32xx_mlc.c.

#define MLC_ECC_AUTO_DEC_REG ( x ) (x + 0x10014)

Definition at line 60 of file lpc32xx_mlc.c.

#define MLC_ECC_AUTO_ENC_REG ( x ) (x + 0x10010)

Definition at line 59 of file lpc32xx_mlc.c.

#define MLC_ECC_DEC_REG ( x ) (x + 0x1000C)

Definition at line 58 of file lpc32xx_mlc.c.

#define MLC_ECC_ENC_REG ( x ) (x + 0x10008)

Definition at line 57 of file lpc32xx_mlc.c.

#define MLC_ICR ( x ) (x + 0x10030)

Definition at line 67 of file lpc32xx_mlc.c.

#define MLC_IRQ_MR ( x ) (x + 0x10038)

Definition at line 69 of file lpc32xx_mlc.c.

#define MLC_IRQ_SR ( x ) (x + 0x1003C)

Definition at line 70 of file lpc32xx_mlc.c.

#define MLC_ISR ( x ) (x + 0x10048)

Definition at line 72 of file lpc32xx_mlc.c.

#define MLC_LOCK_PR ( x ) (x + 0x10044)

Definition at line 71 of file lpc32xx_mlc.c.

#define MLC_ROBP ( x ) (x + 0x10024)

Definition at line 64 of file lpc32xx_mlc.c.

#define MLC_RPR ( x ) (x + 0x10018)

Definition at line 61 of file lpc32xx_mlc.c.

#define MLC_RUBP ( x ) (x + 0x10020)

Definition at line 63 of file lpc32xx_mlc.c.

#define MLC_SW_WP_ADD_HIG ( x ) (x + 0x1002C)

Definition at line 66 of file lpc32xx_mlc.c.

#define MLC_SW_WP_ADD_LOW ( x ) (x + 0x10028)

Definition at line 65 of file lpc32xx_mlc.c.

#define MLC_TIME_REG ( x ) (x + 0x10034)

Definition at line 68 of file lpc32xx_mlc.c.

#define MLC_WPR ( x ) (x + 0x1001C)

Definition at line 62 of file lpc32xx_mlc.c.

#define MLCCEH_NORMAL (1 << 0)

Definition at line 127 of file lpc32xx_mlc.c.

#define MLCCMD_RESET 0xFF

Definition at line 78 of file lpc32xx_mlc.c.

#define MLCICR_16BIT (1 << 0) /* unsupported by LPC32x0! */

Definition at line 86 of file lpc32xx_mlc.c.

#define MLCICR_LARGEBLOCK (1 << 2)

Definition at line 84 of file lpc32xx_mlc.c.

#define MLCICR_LONGADDR (1 << 1)

Definition at line 85 of file lpc32xx_mlc.c.

#define MLCICR_WPROT (1 << 3)

Definition at line 83 of file lpc32xx_mlc.c.

#define MLCIRQ_CONTROLLER_READY (1 << 4)

Definition at line 103 of file lpc32xx_mlc.c.

#define MLCIRQ_DECODE_ERROR (1 << 2)

Definition at line 105 of file lpc32xx_mlc.c.

#define MLCIRQ_DECODE_FAILURE (1 << 3)

Definition at line 104 of file lpc32xx_mlc.c.

#define MLCIRQ_ECC_READY (1 << 1)

Definition at line 106 of file lpc32xx_mlc.c.

#define MLCIRQ_NAND_READY (1 << 5)

Definition at line 102 of file lpc32xx_mlc.c.

#define MLCIRQ_WRPROT_FAULT (1 << 0)

Definition at line 107 of file lpc32xx_mlc.c.

#define MLCISR_CONTROLLER_READY (1 << 1)

Definition at line 121 of file lpc32xx_mlc.c.

#define MLCISR_DECODER_FAILURE (1 << 6)

Definition at line 117 of file lpc32xx_mlc.c.

#define MLCISR_ECC_READY (1 << 2)

Definition at line 120 of file lpc32xx_mlc.c.

#define MLCISR_ERRORS ((1 << 4) | (1 << 5))

Definition at line 118 of file lpc32xx_mlc.c.

#define MLCISR_ERRORS_DETECTED (1 << 3)

Definition at line 119 of file lpc32xx_mlc.c.

#define MLCISR_NAND_READY (1 << 0)

Definition at line 122 of file lpc32xx_mlc.c.

#define MLCLOCKPR_MAGIC 0xA25E

Definition at line 112 of file lpc32xx_mlc.c.

#define MLCTIMEREG_BUSY_DELAY ( n ) (((n) & 0x1F) << 19)

Definition at line 92 of file lpc32xx_mlc.c.

#define MLCTIMEREG_NAND_TA ( n ) (((n) & 0x07) << 16)

Definition at line 93 of file lpc32xx_mlc.c.

#define MLCTIMEREG_RD_HIGH ( n ) (((n) & 0x0F) << 12)

Definition at line 94 of file lpc32xx_mlc.c.

#define MLCTIMEREG_RD_LOW ( n ) (((n) & 0x0F) << 8)

Definition at line 95 of file lpc32xx_mlc.c.

#define MLCTIMEREG_TCEA_DELAY ( n ) (((n) & 0x03) << 24)

Definition at line 91 of file lpc32xx_mlc.c.

#define MLCTIMEREG_WR_HIGH ( n ) (((n) & 0x0F) << 4)

Definition at line 96 of file lpc32xx_mlc.c.

#define MLCTIMEREG_WR_LOW ( n ) (((n) & 0x0F) << 0)

Definition at line 97 of file lpc32xx_mlc.c.

Function Documentation

MODULE_AUTHOR ( "Roland Stigge <[email protected]>" )

MODULE_DESCRIPTION ( "NAND driver for the NXP LPC32XX MLC controller" )

MODULE_DEVICE_TABLE	(	of	,
		lpc32xx_nand_match
	)

MODULE_LICENSE ( "GPL" )

module_platform_driver ( lpc32xx_nand_driver )

Data Structures

Macros

Functions

Macro Definition Documentation

Function Documentation