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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Macros | |
| #define | PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) |
| #define | __reg8 (volatile unsigned char *) |
| #define | __reg16 (volatile unsigned short *) |
| #define | __reg32 (volatile unsigned int *) |
| #define | PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) |
| #define | PLD_CFSTS __reg16(PLD_BASE + 0x0002) |
| #define | PLD_CFIMASK __reg16(PLD_BASE + 0x0004) |
| #define | PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) |
| #define | PLD_CFVENCR __reg16(PLD_BASE + 0x0008) |
| #define | PLD_CFCR0 __reg16(PLD_BASE + 0x000a) |
| #define | PLD_CFCR1 __reg16(PLD_BASE + 0x000c) |
| #define | PLD_IDERSTCR __reg16(PLD_BASE + 0x0010) |
| #define | PLD_MMCCR __reg16(PLD_BASE + 0x4000) |
| #define | PLD_MMCMOD __reg16(PLD_BASE + 0x4002) |
| #define | PLD_MMCSTS __reg16(PLD_BASE + 0x4006) |
| #define | PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) |
| #define | PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) |
| #define | PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) |
| #define | PLD_MMCDET __reg16(PLD_BASE + 0x4010) |
| #define | PLD_MMCWP __reg16(PLD_BASE + 0x4012) |
| #define | PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) |
| #define | PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) |
| #define | PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) |
| #define | PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) |
| #define | PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */ |
| #define | PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */ |
| #define | PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */ |
| #define | PLD_IRQ_CFIREQ (M32700UT_PLD_IRQ_BASE + 3) /* CF IREQ */ |
| #define | PLD_IRQ_CFC_INSERT (M32700UT_PLD_IRQ_BASE + 4) /* CF Insert */ |
| #define | PLD_IRQ_CFC_EJECT (M32700UT_PLD_IRQ_BASE + 5) /* CF Eject */ |
| #define | PLD_IRQ_EXINT (M32700UT_PLD_IRQ_BASE + 6) /* EXINT */ |
| #define | PLD_IRQ_INT7 (M32700UT_PLD_IRQ_BASE + 7) /* reserved */ |
| #define | PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */ |
| #define | PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */ |
| #define | PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */ |
| #define | PLD_IRQ_MMCCARD (M32700UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */ |
| #define | PLD_IRQ_INT12 (M32700UT_PLD_IRQ_BASE + 12) /* reserved */ |
| #define | PLD_IRQ_SC_ERROR (M32700UT_PLD_IRQ_BASE + 13) /* SC error */ |
| #define | PLD_IRQ_SC_RCV (M32700UT_PLD_IRQ_BASE + 14) /* SC receive */ |
| #define | PLD_IRQ_SC_SND (M32700UT_PLD_IRQ_BASE + 15) /* SC send */ |
| #define | PLD_IRQ_SIO0_RCV (M32700UT_PLD_IRQ_BASE + 16) /* SIO receive */ |
| #define | PLD_IRQ_SIO0_SND (M32700UT_PLD_IRQ_BASE + 17) /* SIO send */ |
| #define | PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */ |
| #define | PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */ |
| #define | PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */ |
| #define | PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */ |
| #define | PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */ |
| #define | PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */ |
| #define | PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */ |
| #define | PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */ |
| #define | PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */ |
| #define | PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */ |
| #define | PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */ |
| #define | PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */ |
| #define | PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */ |
| #define | PLD_IRQ_INT31 (M32700UT_PLD_IRQ_BASE + 31) /* reserved */ |
| #define | PLD_ICUISTS __reg16(PLD_BASE + 0x8002) |
| #define | PLD_ICUISTS_VECB_MASK (0xf000) |
| #define | PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK) |
| #define | PLD_ICUISTS_ISN_MASK (0x07c0) |
| #define | PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK) |
| #define | PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004) |
| #define | PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006) |
| #define | PLD_ICUCR1 __reg16(PLD_BASE + 0x8100) |
| #define | PLD_ICUCR2 __reg16(PLD_BASE + 0x8102) |
| #define | PLD_ICUCR3 __reg16(PLD_BASE + 0x8104) |
| #define | PLD_ICUCR4 __reg16(PLD_BASE + 0x8106) |
| #define | PLD_ICUCR5 __reg16(PLD_BASE + 0x8108) |
| #define | PLD_ICUCR6 __reg16(PLD_BASE + 0x810a) |
| #define | PLD_ICUCR7 __reg16(PLD_BASE + 0x810c) |
| #define | PLD_ICUCR8 __reg16(PLD_BASE + 0x810e) |
| #define | PLD_ICUCR9 __reg16(PLD_BASE + 0x8110) |
| #define | PLD_ICUCR10 __reg16(PLD_BASE + 0x8112) |
| #define | PLD_ICUCR11 __reg16(PLD_BASE + 0x8114) |
| #define | PLD_ICUCR12 __reg16(PLD_BASE + 0x8116) |
| #define | PLD_ICUCR13 __reg16(PLD_BASE + 0x8118) |
| #define | PLD_ICUCR14 __reg16(PLD_BASE + 0x811a) |
| #define | PLD_ICUCR15 __reg16(PLD_BASE + 0x811c) |
| #define | PLD_ICUCR16 __reg16(PLD_BASE + 0x811e) |
| #define | PLD_ICUCR17 __reg16(PLD_BASE + 0x8120) |
| #define | PLD_ICUCR_IEN (0x1000) |
| #define | PLD_ICUCR_IREQ (0x0100) |
| #define | PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */ |
| #define | PLD_ICUCR_ISMOD01 (0x0010) /* Low level */ |
| #define | PLD_ICUCR_ISMOD02 (0x0020) /* High edge */ |
| #define | PLD_ICUCR_ISMOD03 (0x0030) /* High level */ |
| #define | PLD_ICUCR_ILEVEL0 (0x0000) |
| #define | PLD_ICUCR_ILEVEL1 (0x0001) |
| #define | PLD_ICUCR_ILEVEL2 (0x0002) |
| #define | PLD_ICUCR_ILEVEL3 (0x0003) |
| #define | PLD_ICUCR_ILEVEL4 (0x0004) |
| #define | PLD_ICUCR_ILEVEL5 (0x0005) |
| #define | PLD_ICUCR_ILEVEL6 (0x0006) |
| #define | PLD_ICUCR_ILEVEL7 (0x0007) |
| #define | PLD_CPCR __reg16(PLD_BASE + 0x14000) |
| #define | PLD_CPCR_CF 0x0001 |
| #define | PLD_CPCR_MMC 0x0002 |
| #define | PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) |
| #define | PLD_IOLED_1_ON 0x001 |
| #define | PLD_IOLED_1_OFF 0x000 |
| #define | PLD_IOLED_2_ON 0x002 |
| #define | PLD_IOLED_2_OFF 0x000 |
| #define | PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) |
| #define | PLD_IOSWSTS_IOSW2 0x0200 |
| #define | PLD_IOSWSTS_IOSW1 0x0100 |
| #define | PLD_IOSWSTS_IOWP0 0x0001 |
| #define | PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) |
| #define | PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) |
| #define | PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) |
| #define | PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) |
| #define | PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) |
| #define | PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) |
| #define | PLD_RTCCR __reg16(PLD_BASE + 0x1c000) |
| #define | PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) |
| #define | PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) |
| #define | PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) |
| #define | PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) |
| #define | PLD_ESIO0CR __reg16(PLD_BASE + 0x20000) |
| #define | PLD_ESIO0CR_TXEN 0x0001 |
| #define | PLD_ESIO0CR_RXEN 0x0002 |
| #define | PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002) |
| #define | PLD_ESIO0MOD0_CTSS 0x0040 |
| #define | PLD_ESIO0MOD0_RTSS 0x0080 |
| #define | PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004) |
| #define | PLD_ESIO0MOD1_LMFS 0x0010 |
| #define | PLD_ESIO0STS __reg16(PLD_BASE + 0x20006) |
| #define | PLD_ESIO0STS_TEMP 0x0001 |
| #define | PLD_ESIO0STS_TXCP 0x0002 |
| #define | PLD_ESIO0STS_RXCP 0x0004 |
| #define | PLD_ESIO0STS_TXSC 0x0100 |
| #define | PLD_ESIO0STS_RXSC 0x0200 |
| #define | PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) |
| #define | PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008) |
| #define | PLD_ESIO0INTCR_TXIEN 0x0002 |
| #define | PLD_ESIO0INTCR_RXCEN 0x0004 |
| #define | PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a) |
| #define | PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c) |
| #define | PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e) |
| #define | PLD_SCCR __reg16(PLD_BASE + 0x38000) |
| #define | PLD_SCMOD __reg16(PLD_BASE + 0x38004) |
| #define | PLD_SCSTS __reg16(PLD_BASE + 0x38006) |
| #define | PLD_SCINTCR __reg16(PLD_BASE + 0x38008) |
| #define | PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) |
| #define | PLD_SCTXB __reg16(PLD_BASE + 0x3800c) |
| #define | PLD_SCRXB __reg16(PLD_BASE + 0x3800e) |
| #define __reg16 (volatile unsigned short *) |
Definition at line 28 of file m32700ut_pld.h.
| #define __reg32 (volatile unsigned int *) |
Definition at line 29 of file m32700ut_pld.h.
| #define __reg8 (volatile unsigned char *) |
Definition at line 27 of file m32700ut_pld.h.
| #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) |
Definition at line 26 of file m32700ut_pld.h.
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Definition at line 186 of file m32700ut_pld.h.
| #define PLD_CPCR_CF 0x0001 |
Definition at line 187 of file m32700ut_pld.h.
| #define PLD_CPCR_MMC 0x0002 |
Definition at line 188 of file m32700ut_pld.h.
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| #define PLD_ESIO0CR_RXEN 0x0002 |
Definition at line 230 of file m32700ut_pld.h.
| #define PLD_ESIO0CR_TXEN 0x0001 |
Definition at line 229 of file m32700ut_pld.h.
Definition at line 243 of file m32700ut_pld.h.
| #define PLD_ESIO0INTCR_RXCEN 0x0004 |
Definition at line 245 of file m32700ut_pld.h.
| #define PLD_ESIO0INTCR_TXIEN 0x0002 |
Definition at line 244 of file m32700ut_pld.h.
Definition at line 231 of file m32700ut_pld.h.
| #define PLD_ESIO0MOD0_CTSS 0x0040 |
Definition at line 232 of file m32700ut_pld.h.
| #define PLD_ESIO0MOD0_RTSS 0x0080 |
Definition at line 233 of file m32700ut_pld.h.
Definition at line 234 of file m32700ut_pld.h.
| #define PLD_ESIO0MOD1_LMFS 0x0010 |
Definition at line 235 of file m32700ut_pld.h.
Definition at line 248 of file m32700ut_pld.h.
Definition at line 236 of file m32700ut_pld.h.
| #define PLD_ESIO0STS_RXCP 0x0004 |
Definition at line 239 of file m32700ut_pld.h.
| #define PLD_ESIO0STS_RXSC 0x0200 |
Definition at line 241 of file m32700ut_pld.h.
| #define PLD_ESIO0STS_TEMP 0x0001 |
Definition at line 237 of file m32700ut_pld.h.
| #define PLD_ESIO0STS_TXCP 0x0002 |
Definition at line 238 of file m32700ut_pld.h.
| #define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) |
Definition at line 242 of file m32700ut_pld.h.
| #define PLD_ESIO0STS_TXSC 0x0100 |
Definition at line 240 of file m32700ut_pld.h.
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| #define PLD_ICUCR_IEN (0x1000) |
Definition at line 170 of file m32700ut_pld.h.
| #define PLD_ICUCR_ILEVEL0 (0x0000) |
Definition at line 176 of file m32700ut_pld.h.
| #define PLD_ICUCR_ILEVEL1 (0x0001) |
Definition at line 177 of file m32700ut_pld.h.
| #define PLD_ICUCR_ILEVEL2 (0x0002) |
Definition at line 178 of file m32700ut_pld.h.
| #define PLD_ICUCR_ILEVEL3 (0x0003) |
Definition at line 179 of file m32700ut_pld.h.
| #define PLD_ICUCR_ILEVEL4 (0x0004) |
Definition at line 180 of file m32700ut_pld.h.
| #define PLD_ICUCR_ILEVEL5 (0x0005) |
Definition at line 181 of file m32700ut_pld.h.
| #define PLD_ICUCR_ILEVEL6 (0x0006) |
Definition at line 182 of file m32700ut_pld.h.
| #define PLD_ICUCR_ILEVEL7 (0x0007) |
Definition at line 183 of file m32700ut_pld.h.
| #define PLD_ICUCR_IREQ (0x0100) |
Definition at line 171 of file m32700ut_pld.h.
| #define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */ |
Definition at line 172 of file m32700ut_pld.h.
| #define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */ |
Definition at line 173 of file m32700ut_pld.h.
| #define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */ |
Definition at line 174 of file m32700ut_pld.h.
| #define PLD_ICUCR_ISMOD03 (0x0030) /* High level */ |
Definition at line 175 of file m32700ut_pld.h.
Definition at line 151 of file m32700ut_pld.h.
Definition at line 152 of file m32700ut_pld.h.
Definition at line 146 of file m32700ut_pld.h.
| #define PLD_ICUISTS_ISN | ( | x | ) | ((x) & PLD_ICUISTS_ISN_MASK) |
Definition at line 150 of file m32700ut_pld.h.
| #define PLD_ICUISTS_ISN_MASK (0x07c0) |
Definition at line 149 of file m32700ut_pld.h.
| #define PLD_ICUISTS_VECB | ( | x | ) | ((x) & PLD_ICUISTS_VECB_MASK) |
Definition at line 148 of file m32700ut_pld.h.
| #define PLD_ICUISTS_VECB_MASK (0xf000) |
Definition at line 147 of file m32700ut_pld.h.
Definition at line 45 of file m32700ut_pld.h.
| #define PLD_IOLED_1_OFF 0x000 |
Definition at line 197 of file m32700ut_pld.h.
| #define PLD_IOLED_1_ON 0x001 |
Definition at line 196 of file m32700ut_pld.h.
| #define PLD_IOLED_2_OFF 0x000 |
Definition at line 199 of file m32700ut_pld.h.
| #define PLD_IOLED_2_ON 0x002 |
Definition at line 198 of file m32700ut_pld.h.
Definition at line 195 of file m32700ut_pld.h.
Definition at line 207 of file m32700ut_pld.h.
| #define PLD_IOSWSTS_IOSW1 0x0100 |
Definition at line 209 of file m32700ut_pld.h.
| #define PLD_IOSWSTS_IOSW2 0x0200 |
Definition at line 208 of file m32700ut_pld.h.
| #define PLD_IOSWSTS_IOWP0 0x0001 |
Definition at line 210 of file m32700ut_pld.h.
| #define PLD_IRQ_CFC_EJECT (M32700UT_PLD_IRQ_BASE + 5) /* CF Eject */ |
Definition at line 82 of file m32700ut_pld.h.
| #define PLD_IRQ_CFC_INSERT (M32700UT_PLD_IRQ_BASE + 4) /* CF Insert */ |
Definition at line 81 of file m32700ut_pld.h.
| #define PLD_IRQ_CFIREQ (M32700UT_PLD_IRQ_BASE + 3) /* CF IREQ */ |
Definition at line 80 of file m32700ut_pld.h.
| #define PLD_IRQ_EXINT (M32700UT_PLD_IRQ_BASE + 6) /* EXINT */ |
Definition at line 83 of file m32700ut_pld.h.
| #define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */ |
Definition at line 77 of file m32700ut_pld.h.
| #define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */ |
Definition at line 78 of file m32700ut_pld.h.
| #define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */ |
Definition at line 87 of file m32700ut_pld.h.
| #define PLD_IRQ_INT12 (M32700UT_PLD_IRQ_BASE + 12) /* reserved */ |
Definition at line 89 of file m32700ut_pld.h.
| #define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */ |
Definition at line 95 of file m32700ut_pld.h.
| #define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */ |
Definition at line 96 of file m32700ut_pld.h.
| #define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */ |
Definition at line 79 of file m32700ut_pld.h.
| #define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */ |
Definition at line 97 of file m32700ut_pld.h.
| #define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */ |
Definition at line 98 of file m32700ut_pld.h.
| #define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */ |
Definition at line 99 of file m32700ut_pld.h.
| #define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */ |
Definition at line 100 of file m32700ut_pld.h.
| #define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */ |
Definition at line 101 of file m32700ut_pld.h.
| #define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */ |
Definition at line 102 of file m32700ut_pld.h.
| #define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */ |
Definition at line 103 of file m32700ut_pld.h.
| #define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */ |
Definition at line 104 of file m32700ut_pld.h.
| #define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */ |
Definition at line 105 of file m32700ut_pld.h.
| #define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */ |
Definition at line 106 of file m32700ut_pld.h.
| #define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */ |
Definition at line 107 of file m32700ut_pld.h.
| #define PLD_IRQ_INT31 (M32700UT_PLD_IRQ_BASE + 31) /* reserved */ |
Definition at line 108 of file m32700ut_pld.h.
| #define PLD_IRQ_INT7 (M32700UT_PLD_IRQ_BASE + 7) /* reserved */ |
Definition at line 84 of file m32700ut_pld.h.
| #define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */ |
Definition at line 85 of file m32700ut_pld.h.
| #define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */ |
Definition at line 86 of file m32700ut_pld.h.
| #define PLD_IRQ_MMCCARD (M32700UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */ |
Definition at line 88 of file m32700ut_pld.h.
Definition at line 90 of file m32700ut_pld.h.
| #define PLD_IRQ_SC_RCV (M32700UT_PLD_IRQ_BASE + 14) /* SC receive */ |
Definition at line 91 of file m32700ut_pld.h.
Definition at line 92 of file m32700ut_pld.h.
| #define PLD_IRQ_SIO0_RCV (M32700UT_PLD_IRQ_BASE + 16) /* SIO receive */ |
Definition at line 93 of file m32700ut_pld.h.
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1.8.2