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Data Structures | Macros | Typedefs | Enumerations
iop_sw_cpu_defs.h File Reference

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Data Structures

struct  reg_iop_sw_cpu_rw_mc_ctrl
 
struct  reg_iop_sw_cpu_rw_mc_data
 
struct  reg_iop_sw_cpu_r_mc_stat
 
struct  reg_iop_sw_cpu_rw_bus_clr_mask
 
struct  reg_iop_sw_cpu_rw_bus_set_mask
 
struct  reg_iop_sw_cpu_rw_bus_oe_clr_mask
 
struct  reg_iop_sw_cpu_rw_bus_oe_set_mask
 
struct  reg_iop_sw_cpu_rw_gio_clr_mask
 
struct  reg_iop_sw_cpu_rw_gio_set_mask
 
struct  reg_iop_sw_cpu_rw_gio_oe_clr_mask
 
struct  reg_iop_sw_cpu_rw_gio_oe_set_mask
 
struct  reg_iop_sw_cpu_rw_intr0_mask
 
struct  reg_iop_sw_cpu_rw_ack_intr0
 
struct  reg_iop_sw_cpu_r_intr0
 
struct  reg_iop_sw_cpu_r_masked_intr0
 
struct  reg_iop_sw_cpu_rw_intr1_mask
 
struct  reg_iop_sw_cpu_rw_ack_intr1
 
struct  reg_iop_sw_cpu_r_intr1
 
struct  reg_iop_sw_cpu_r_masked_intr1
 

Macros

#define REG_RD(scope, inst, reg)
 
#define REG_WR(scope, inst, reg, val)
 
#define REG_RD_VECT(scope, inst, reg, index)
 
#define REG_WR_VECT(scope, inst, reg, index, val)
 
#define REG_RD_INT(scope, inst, reg)   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
 
#define REG_WR_INT(scope, inst, reg, val)   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
 
#define REG_RD_INT_VECT(scope, inst, reg, index)
 
#define REG_WR_INT_VECT(scope, inst, reg, index, val)
 
#define REG_TYPE_CONV(type, orgtype, val)   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
 
#define reg_page_size   8192
 
#define REG_ADDR(scope, inst, reg)   ( (inst) + REG_RD_ADDR_##scope##_##reg )
 
#define REG_ADDR_VECT(scope, inst, reg, index)
 
#define REG_RD_ADDR_iop_sw_cpu_r_mpu_trace   0
 
#define REG_RD_ADDR_iop_sw_cpu_r_spu_trace   4
 
#define REG_RD_ADDR_iop_sw_cpu_r_spu_fsm_trace   8
 
#define REG_RD_ADDR_iop_sw_cpu_rw_mc_ctrl   12
 
#define REG_WR_ADDR_iop_sw_cpu_rw_mc_ctrl   12
 
#define REG_RD_ADDR_iop_sw_cpu_rw_mc_data   16
 
#define REG_WR_ADDR_iop_sw_cpu_rw_mc_data   16
 
#define REG_RD_ADDR_iop_sw_cpu_rw_mc_addr   20
 
#define REG_WR_ADDR_iop_sw_cpu_rw_mc_addr   20
 
#define REG_RD_ADDR_iop_sw_cpu_rs_mc_data   24
 
#define REG_RD_ADDR_iop_sw_cpu_r_mc_data   28
 
#define REG_RD_ADDR_iop_sw_cpu_r_mc_stat   32
 
#define REG_RD_ADDR_iop_sw_cpu_rw_bus_clr_mask   36
 
#define REG_WR_ADDR_iop_sw_cpu_rw_bus_clr_mask   36
 
#define REG_RD_ADDR_iop_sw_cpu_rw_bus_set_mask   40
 
#define REG_WR_ADDR_iop_sw_cpu_rw_bus_set_mask   40
 
#define REG_RD_ADDR_iop_sw_cpu_rw_bus_oe_clr_mask   44
 
#define REG_WR_ADDR_iop_sw_cpu_rw_bus_oe_clr_mask   44
 
#define REG_RD_ADDR_iop_sw_cpu_rw_bus_oe_set_mask   48
 
#define REG_WR_ADDR_iop_sw_cpu_rw_bus_oe_set_mask   48
 
#define REG_RD_ADDR_iop_sw_cpu_r_bus_in   52
 
#define REG_RD_ADDR_iop_sw_cpu_rw_gio_clr_mask   56
 
#define REG_WR_ADDR_iop_sw_cpu_rw_gio_clr_mask   56
 
#define REG_RD_ADDR_iop_sw_cpu_rw_gio_set_mask   60
 
#define REG_WR_ADDR_iop_sw_cpu_rw_gio_set_mask   60
 
#define REG_RD_ADDR_iop_sw_cpu_rw_gio_oe_clr_mask   64
 
#define REG_WR_ADDR_iop_sw_cpu_rw_gio_oe_clr_mask   64
 
#define REG_RD_ADDR_iop_sw_cpu_rw_gio_oe_set_mask   68
 
#define REG_WR_ADDR_iop_sw_cpu_rw_gio_oe_set_mask   68
 
#define REG_RD_ADDR_iop_sw_cpu_r_gio_in   72
 
#define REG_RD_ADDR_iop_sw_cpu_rw_intr0_mask   76
 
#define REG_WR_ADDR_iop_sw_cpu_rw_intr0_mask   76
 
#define REG_RD_ADDR_iop_sw_cpu_rw_ack_intr0   80
 
#define REG_WR_ADDR_iop_sw_cpu_rw_ack_intr0   80
 
#define REG_RD_ADDR_iop_sw_cpu_r_intr0   84
 
#define REG_RD_ADDR_iop_sw_cpu_r_masked_intr0   88
 
#define REG_RD_ADDR_iop_sw_cpu_rw_intr1_mask   92
 
#define REG_WR_ADDR_iop_sw_cpu_rw_intr1_mask   92
 
#define REG_RD_ADDR_iop_sw_cpu_rw_ack_intr1   96
 
#define REG_WR_ADDR_iop_sw_cpu_rw_ack_intr1   96
 
#define REG_RD_ADDR_iop_sw_cpu_r_intr1   100
 
#define REG_RD_ADDR_iop_sw_cpu_r_masked_intr1   104
 

Typedefs

typedef unsigned int reg_iop_sw_cpu_r_mpu_trace
 
typedef unsigned int reg_iop_sw_cpu_r_spu_trace
 
typedef unsigned int reg_iop_sw_cpu_r_spu_fsm_trace
 
typedef unsigned int reg_iop_sw_cpu_rw_mc_addr
 
typedef unsigned int reg_iop_sw_cpu_rs_mc_data
 
typedef unsigned int reg_iop_sw_cpu_r_mc_data
 
typedef unsigned int reg_iop_sw_cpu_r_bus_in
 
typedef unsigned int reg_iop_sw_cpu_r_gio_in
 

Enumerations

enum  {
  regk_iop_sw_cpu_copy = 0x00000000, regk_iop_sw_cpu_no = 0x00000000, regk_iop_sw_cpu_rd = 0x00000002, regk_iop_sw_cpu_reg_copy = 0x00000001,
  regk_iop_sw_cpu_rw_bus_clr_mask_default = 0x00000000, regk_iop_sw_cpu_rw_bus_oe_clr_mask_default = 0x00000000, regk_iop_sw_cpu_rw_bus_oe_set_mask_default = 0x00000000, regk_iop_sw_cpu_rw_bus_set_mask_default = 0x00000000,
  regk_iop_sw_cpu_rw_gio_clr_mask_default = 0x00000000, regk_iop_sw_cpu_rw_gio_oe_clr_mask_default = 0x00000000, regk_iop_sw_cpu_rw_gio_oe_set_mask_default = 0x00000000, regk_iop_sw_cpu_rw_gio_set_mask_default = 0x00000000,
  regk_iop_sw_cpu_rw_intr0_mask_default = 0x00000000, regk_iop_sw_cpu_rw_intr1_mask_default = 0x00000000, regk_iop_sw_cpu_wr = 0x00000003, regk_iop_sw_cpu_yes = 0x00000001
}
 

Macro Definition Documentation

#define REG_ADDR (   scope,
  inst,
  reg 
)    ( (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 72 of file iop_sw_cpu_defs.h.

#define REG_ADDR_VECT (   scope,
  inst,
  reg,
  index 
)
Value:
( (inst) + REG_RD_ADDR_##scope##_##reg + \
(index) * STRIDE_##scope##_##reg )

Definition at line 77 of file iop_sw_cpu_defs.h.

#define reg_page_size   8192

Definition at line 68 of file iop_sw_cpu_defs.h.

#define REG_RD (   scope,
  inst,
  reg 
)
Value:
REG_READ( reg_##scope##_##reg, \
(inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 15 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_bus_in   52

Definition at line 183 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_gio_in   72

Definition at line 215 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_intr0   84

Definition at line 328 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_intr1   100

Definition at line 463 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_masked_intr0   88

Definition at line 365 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_masked_intr1   104

Definition at line 500 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_mc_data   28

Definition at line 125 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_mc_stat   32

Definition at line 137 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_mpu_trace   0

Definition at line 86 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_spu_fsm_trace   8

Definition at line 94 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_r_spu_trace   4

Definition at line 90 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rs_mc_data   24

Definition at line 121 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_ack_intr0   80

Definition at line 290 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_ack_intr1   96

Definition at line 425 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_bus_clr_mask   36

Definition at line 146 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_bus_oe_clr_mask   44

Definition at line 167 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_bus_oe_set_mask   48

Definition at line 178 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_bus_set_mask   40

Definition at line 156 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_gio_clr_mask   56

Definition at line 189 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_gio_oe_clr_mask   64

Definition at line 203 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_gio_oe_set_mask   68

Definition at line 210 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_gio_set_mask   60

Definition at line 196 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_intr0_mask   76

Definition at line 252 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_intr1_mask   92

Definition at line 402 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_mc_addr   20

Definition at line 116 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_mc_ctrl   12

Definition at line 104 of file iop_sw_cpu_defs.h.

#define REG_RD_ADDR_iop_sw_cpu_rw_mc_data   16

Definition at line 111 of file iop_sw_cpu_defs.h.

#define REG_RD_INT (   scope,
  inst,
  reg 
)    REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 41 of file iop_sw_cpu_defs.h.

#define REG_RD_INT_VECT (   scope,
  inst,
  reg,
  index 
)
Value:
REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
(index) * STRIDE_##scope##_##reg )

Definition at line 51 of file iop_sw_cpu_defs.h.

#define REG_RD_VECT (   scope,
  inst,
  reg,
  index 
)
Value:
REG_READ( reg_##scope##_##reg, \
(inst) + REG_RD_ADDR_##scope##_##reg + \
(index) * STRIDE_##scope##_##reg )

Definition at line 27 of file iop_sw_cpu_defs.h.

#define REG_TYPE_CONV (   type,
  orgtype,
  val 
)    ( { union { orgtype o; type n; } r; r.o = val; r.n; } )

Definition at line 63 of file iop_sw_cpu_defs.h.

#define REG_WR (   scope,
  inst,
  reg,
  val 
)
Value:
REG_WRITE( reg_##scope##_##reg, \
(inst) + REG_WR_ADDR_##scope##_##reg, (val) )

Definition at line 21 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_ack_intr0   80

Definition at line 291 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_ack_intr1   96

Definition at line 426 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_bus_clr_mask   36

Definition at line 147 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_bus_oe_clr_mask   44

Definition at line 168 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_bus_oe_set_mask   48

Definition at line 179 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_bus_set_mask   40

Definition at line 157 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_gio_clr_mask   56

Definition at line 190 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_gio_oe_clr_mask   64

Definition at line 204 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_gio_oe_set_mask   68

Definition at line 211 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_gio_set_mask   60

Definition at line 197 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_intr0_mask   76

Definition at line 253 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_intr1_mask   92

Definition at line 403 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_mc_addr   20

Definition at line 117 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_mc_ctrl   12

Definition at line 105 of file iop_sw_cpu_defs.h.

#define REG_WR_ADDR_iop_sw_cpu_rw_mc_data   16

Definition at line 112 of file iop_sw_cpu_defs.h.

#define REG_WR_INT (   scope,
  inst,
  reg,
  val 
)    REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )

Definition at line 46 of file iop_sw_cpu_defs.h.

#define REG_WR_INT_VECT (   scope,
  inst,
  reg,
  index,
  val 
)
Value:
REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
(index) * STRIDE_##scope##_##reg, (val) )

Definition at line 57 of file iop_sw_cpu_defs.h.

#define REG_WR_VECT (   scope,
  inst,
  reg,
  index,
  val 
)
Value:
REG_WRITE( reg_##scope##_##reg, \
(inst) + REG_WR_ADDR_##scope##_##reg + \
(index) * STRIDE_##scope##_##reg, (val) )

Definition at line 34 of file iop_sw_cpu_defs.h.

Typedef Documentation

typedef unsigned int reg_iop_sw_cpu_r_bus_in

Definition at line 182 of file iop_sw_cpu_defs.h.

typedef unsigned int reg_iop_sw_cpu_r_gio_in

Definition at line 214 of file iop_sw_cpu_defs.h.

typedef unsigned int reg_iop_sw_cpu_r_mc_data

Definition at line 124 of file iop_sw_cpu_defs.h.

typedef unsigned int reg_iop_sw_cpu_r_mpu_trace

Definition at line 85 of file iop_sw_cpu_defs.h.

typedef unsigned int reg_iop_sw_cpu_r_spu_fsm_trace

Definition at line 93 of file iop_sw_cpu_defs.h.

typedef unsigned int reg_iop_sw_cpu_r_spu_trace

Definition at line 89 of file iop_sw_cpu_defs.h.

typedef unsigned int reg_iop_sw_cpu_rs_mc_data

Definition at line 120 of file iop_sw_cpu_defs.h.

typedef unsigned int reg_iop_sw_cpu_rw_mc_addr

Definition at line 115 of file iop_sw_cpu_defs.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
regk_iop_sw_cpu_copy 
regk_iop_sw_cpu_no 
regk_iop_sw_cpu_rd 
regk_iop_sw_cpu_reg_copy 
regk_iop_sw_cpu_rw_bus_clr_mask_default 
regk_iop_sw_cpu_rw_bus_oe_clr_mask_default 
regk_iop_sw_cpu_rw_bus_oe_set_mask_default 
regk_iop_sw_cpu_rw_bus_set_mask_default 
regk_iop_sw_cpu_rw_gio_clr_mask_default 
regk_iop_sw_cpu_rw_gio_oe_clr_mask_default 
regk_iop_sw_cpu_rw_gio_oe_set_mask_default 
regk_iop_sw_cpu_rw_gio_set_mask_default 
regk_iop_sw_cpu_rw_intr0_mask_default 
regk_iop_sw_cpu_rw_intr1_mask_default 
regk_iop_sw_cpu_wr 
regk_iop_sw_cpu_yes 

Definition at line 504 of file iop_sw_cpu_defs.h.

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