Linux Kernel
3.7.1
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#include <mach/kirkwood.h>
Go to the source code of this file.
Macros | |
#define | CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0100) |
#define | CPU_CONFIG_ERROR_PROP 0x00000004 |
#define | CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) |
#define | CPU_RESET 0x00000002 |
#define | RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) |
#define | WDT_RESET_OUT_EN 0x00000002 |
#define | SOFT_RESET_OUT_EN 0x00000004 |
#define | SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) |
#define | SOFT_RESET 0x00000001 |
#define | BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110) |
#define | WDT_INT_REQ 0x0008 |
#define | BRIDGE_INT_TIMER1_CLR (~0x0004) |
#define | IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) |
#define | IRQ_CAUSE_LOW_OFF 0x0000 |
#define | IRQ_MASK_LOW_OFF 0x0004 |
#define | IRQ_CAUSE_HIGH_OFF 0x0010 |
#define | IRQ_MASK_HIGH_OFF 0x0014 |
#define | TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) |
#define | TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300) |
#define | L2_CONFIG_REG (BRIDGE_VIRT_BASE + 0x0128) |
#define | L2_WRITETHROUGH 0x00000010 |
#define | CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE + 0x11c) |
#define | CGC_BIT_GE0 (0) |
#define | CGC_BIT_PEX0 (2) |
#define | CGC_BIT_USB0 (3) |
#define | CGC_BIT_SDIO (4) |
#define | CGC_BIT_TSU (5) |
#define | CGC_BIT_DUNIT (6) |
#define | CGC_BIT_RUNIT (7) |
#define | CGC_BIT_XOR0 (8) |
#define | CGC_BIT_AUDIO (9) |
#define | CGC_BIT_SATA0 (14) |
#define | CGC_BIT_SATA1 (15) |
#define | CGC_BIT_XOR1 (16) |
#define | CGC_BIT_CRYPTO (17) |
#define | CGC_BIT_PEX1 (18) |
#define | CGC_BIT_GE1 (19) |
#define | CGC_BIT_TDM (20) |
#define | CGC_GE0 (1 << 0) |
#define | CGC_PEX0 (1 << 2) |
#define | CGC_USB0 (1 << 3) |
#define | CGC_SDIO (1 << 4) |
#define | CGC_TSU (1 << 5) |
#define | CGC_DUNIT (1 << 6) |
#define | CGC_RUNIT (1 << 7) |
#define | CGC_XOR0 (1 << 8) |
#define | CGC_AUDIO (1 << 9) |
#define | CGC_SATA0 (1 << 14) |
#define | CGC_SATA1 (1 << 15) |
#define | CGC_XOR1 (1 << 16) |
#define | CGC_CRYPTO (1 << 17) |
#define | CGC_PEX1 (1 << 18) |
#define | CGC_GE1 (1 << 19) |
#define | CGC_TDM (1 << 20) |
#define | CGC_RESERVED (0x6 << 21) |
#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110) |
Definition at line 29 of file bridge-regs.h.
#define BRIDGE_INT_TIMER1_CLR (~0x0004) |
Definition at line 32 of file bridge-regs.h.
#define CGC_AUDIO (1 << 9) |
Definition at line 71 of file bridge-regs.h.
#define CGC_BIT_AUDIO (9) |
Definition at line 55 of file bridge-regs.h.
#define CGC_BIT_CRYPTO (17) |
Definition at line 59 of file bridge-regs.h.
#define CGC_BIT_DUNIT (6) |
Definition at line 52 of file bridge-regs.h.
#define CGC_BIT_GE0 (0) |
Definition at line 47 of file bridge-regs.h.
#define CGC_BIT_GE1 (19) |
Definition at line 61 of file bridge-regs.h.
#define CGC_BIT_PEX0 (2) |
Definition at line 48 of file bridge-regs.h.
#define CGC_BIT_PEX1 (18) |
Definition at line 60 of file bridge-regs.h.
#define CGC_BIT_RUNIT (7) |
Definition at line 53 of file bridge-regs.h.
#define CGC_BIT_SATA0 (14) |
Definition at line 56 of file bridge-regs.h.
#define CGC_BIT_SATA1 (15) |
Definition at line 57 of file bridge-regs.h.
#define CGC_BIT_SDIO (4) |
Definition at line 50 of file bridge-regs.h.
#define CGC_BIT_TDM (20) |
Definition at line 62 of file bridge-regs.h.
#define CGC_BIT_TSU (5) |
Definition at line 51 of file bridge-regs.h.
#define CGC_BIT_USB0 (3) |
Definition at line 49 of file bridge-regs.h.
#define CGC_BIT_XOR0 (8) |
Definition at line 54 of file bridge-regs.h.
#define CGC_BIT_XOR1 (16) |
Definition at line 58 of file bridge-regs.h.
#define CGC_CRYPTO (1 << 17) |
Definition at line 75 of file bridge-regs.h.
#define CGC_DUNIT (1 << 6) |
Definition at line 68 of file bridge-regs.h.
#define CGC_GE0 (1 << 0) |
Definition at line 63 of file bridge-regs.h.
#define CGC_GE1 (1 << 19) |
Definition at line 77 of file bridge-regs.h.
#define CGC_PEX0 (1 << 2) |
Definition at line 64 of file bridge-regs.h.
#define CGC_PEX1 (1 << 18) |
Definition at line 76 of file bridge-regs.h.
#define CGC_RESERVED (0x6 << 21) |
Definition at line 79 of file bridge-regs.h.
#define CGC_RUNIT (1 << 7) |
Definition at line 69 of file bridge-regs.h.
#define CGC_SATA0 (1 << 14) |
Definition at line 72 of file bridge-regs.h.
#define CGC_SATA1 (1 << 15) |
Definition at line 73 of file bridge-regs.h.
#define CGC_SDIO (1 << 4) |
Definition at line 66 of file bridge-regs.h.
#define CGC_TDM (1 << 20) |
Definition at line 78 of file bridge-regs.h.
#define CGC_TSU (1 << 5) |
Definition at line 67 of file bridge-regs.h.
#define CGC_USB0 (1 << 3) |
Definition at line 65 of file bridge-regs.h.
#define CGC_XOR0 (1 << 8) |
Definition at line 70 of file bridge-regs.h.
#define CGC_XOR1 (1 << 16) |
Definition at line 74 of file bridge-regs.h.
#define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE + 0x11c) |
Definition at line 46 of file bridge-regs.h.
#define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0100) |
Definition at line 16 of file bridge-regs.h.
#define CPU_CONFIG_ERROR_PROP 0x00000004 |
Definition at line 17 of file bridge-regs.h.
#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) |
Definition at line 19 of file bridge-regs.h.
#define CPU_RESET 0x00000002 |
Definition at line 20 of file bridge-regs.h.
#define IRQ_CAUSE_HIGH_OFF 0x0010 |
Definition at line 37 of file bridge-regs.h.
#define IRQ_CAUSE_LOW_OFF 0x0000 |
Definition at line 35 of file bridge-regs.h.
#define IRQ_MASK_HIGH_OFF 0x0014 |
Definition at line 38 of file bridge-regs.h.
#define IRQ_MASK_LOW_OFF 0x0004 |
Definition at line 36 of file bridge-regs.h.
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) |
Definition at line 34 of file bridge-regs.h.
#define L2_CONFIG_REG (BRIDGE_VIRT_BASE + 0x0128) |
Definition at line 43 of file bridge-regs.h.
#define L2_WRITETHROUGH 0x00000010 |
Definition at line 44 of file bridge-regs.h.
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) |
Definition at line 22 of file bridge-regs.h.
#define SOFT_RESET 0x00000001 |
Definition at line 27 of file bridge-regs.h.
#define SOFT_RESET_OUT_EN 0x00000004 |
Definition at line 24 of file bridge-regs.h.
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) |
Definition at line 26 of file bridge-regs.h.
#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300) |
Definition at line 41 of file bridge-regs.h.
#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) |
Definition at line 40 of file bridge-regs.h.
#define WDT_INT_REQ 0x0008 |
Definition at line 30 of file bridge-regs.h.
#define WDT_RESET_OUT_EN 0x00000002 |
Definition at line 23 of file bridge-regs.h.