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mux.h File Reference

Go to the source code of this file.

Data Structures

struct  pin_config
 
struct  omap_mux_cfg
 

Macros

#define PU_PD_SEL_NA   0 /* No pu_pd reg available */
 
#define PULL_DWN_CTRL_NA   0 /* No pull-down control needed */
 
#define MUX_REG(reg, mode_offset, mode)
 
#define PULL_REG(reg, bit, status)
 
#define PU_PD_REG(reg, status)
 
#define MUX_REG_7XX(reg, mode_offset, mode)
 
#define PULL_REG_7XX(reg, bit, status)
 
#define MUX_CFG(desc, mux_reg, mode_offset, mode, pull_reg, pull_bit, pull_status, pu_pd_reg, pu_pd_status, debug_status)
 
#define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, pull_bit, pull_status, debug_status)
 

Enumerations

enum  omap7xx_index {
  E2_7XX_KBR0, J7_7XX_KBR1, E1_7XX_KBR2, F3_7XX_KBR3,
  D2_7XX_KBR4, C2_7XX_KBC0, D3_7XX_KBC1, E4_7XX_KBC2,
  F4_7XX_KBC3, E3_7XX_KBC4, AA17_7XX_USB_DM, W16_7XX_USB_PU_EN,
  W17_7XX_USB_VBUSI, W18_7XX_USB_DMCK_OUT, W19_7XX_USB_DCRST, MMC_7XX_CMD,
  MMC_7XX_CLK, MMC_7XX_DAT0, I2C_7XX_SCL, I2C_7XX_SDA,
  SPI_7XX_1, SPI_7XX_2, SPI_7XX_3, SPI_7XX_4,
  SPI_7XX_5, SPI_7XX_6, UART_7XX_1, UART_7XX_2
}
 
enum  omap1xxx_index {
  UART1_TX = 0, UART1_RTS, UART2_TX, UART2_RX,
  UART2_CTS, UART2_RTS, UART3_TX, UART3_RX,
  UART3_CTS, UART3_RTS, UART3_CLKREQ, UART3_BCLK,
  Y15_1610_UART3_RTS, PWT, PWL, R18_USB_VBUS,
  R18_1510_USB_GPIO0, W4_USB_PUEN, W4_USB_CLKO, W4_USB_HIGHZ,
  W4_GPIO58, USB1_SUSP, USB1_SEO, W13_1610_USB1_SE0,
  USB1_TXEN, USB1_TXD, USB1_VP, USB1_VM,
  USB1_RCV, USB1_SPEED, R13_1610_USB1_SPEED, R13_1710_USB1_SE0,
  USB2_SUSP, USB2_VP, USB2_TXEN, USB2_VM,
  USB2_RCV, USB2_SEO, USB2_TXD, R18_1510_GPIO0,
  R19_1510_GPIO1, M14_1510_GPIO2, P18_1610_GPIO3, Y15_1610_GPIO17,
  R18_1710_GPIO0, V2_1710_GPIO10, N21_1710_GPIO14, W15_1710_GPIO40,
  MPUIO2, N15_1610_MPUIO2, MPUIO4, MPUIO5,
  T20_1610_MPUIO5, W11_1610_MPUIO6, V10_1610_MPUIO7, W11_1610_MPUIO9,
  V10_1610_MPUIO10, W10_1610_MPUIO11, E20_1610_MPUIO13, U20_1610_MPUIO14,
  E19_1610_MPUIO15, MCBSP2_CLKR, MCBSP2_CLKX, MCBSP2_DR,
  MCBSP2_DX, MCBSP2_FSR, MCBSP2_FSX, MCBSP3_CLKX,
  BALLOUT_V8_ARMIO3, N20_HDQ, W8_1610_MMC2_DAT0, V8_1610_MMC2_DAT1,
  W15_1610_MMC2_DAT2, R10_1610_MMC2_DAT3, Y10_1610_MMC2_CLK, Y8_1610_MMC2_CMD,
  V9_1610_MMC2_CMDDIR, V5_1610_MMC2_DATDIR0, W19_1610_MMC2_DATDIR1, R18_1610_MMC2_CLKIN,
  M19_1610_ETM_PSTAT0, L15_1610_ETM_PSTAT1, L18_1610_ETM_PSTAT2, L19_1610_ETM_D0,
  J19_1610_ETM_D6, J18_1610_ETM_D7, P20_1610_GPIO4, V9_1610_GPIO7,
  W8_1610_GPIO9, N20_1610_GPIO11, N19_1610_GPIO13, P10_1610_GPIO22,
  V5_1610_GPIO24, AA20_1610_GPIO_41, W19_1610_GPIO48, M7_1610_GPIO62,
  V14_16XX_GPIO37, R9_16XX_GPIO18, L14_16XX_GPIO49, V19_1610_UWIRE_SCLK,
  U18_1610_UWIRE_SDI, W21_1610_UWIRE_SDO, N14_1610_UWIRE_CS0, P15_1610_UWIRE_CS3,
  N15_1610_UWIRE_CS1, U19_1610_SPIF_SCK, U18_1610_SPIF_DIN, P20_1610_SPIF_DIN,
  W21_1610_SPIF_DOUT, R18_1610_SPIF_DOUT, N14_1610_SPIF_CS0, N15_1610_SPIF_CS1,
  T19_1610_SPIF_CS2, P15_1610_SPIF_CS3, L3_1610_FLASH_CS2B_OE, M8_1610_FLASH_CS2B_WE,
  MMC_CMD, MMC_DAT1, MMC_DAT2, MMC_DAT0,
  MMC_CLK, MMC_DAT3, M15_1710_MMC_CLKI, P19_1710_MMC_CMDDIR,
  P20_1710_MMC_DATDIR0, W9_USB0_TXEN, AA9_USB0_VP, Y5_USB0_RCV,
  R9_USB0_VM, V6_USB0_TXD, W5_USB0_SE0, V9_USB0_SPEED,
  V9_USB0_SUSP, W9_USB2_TXEN, AA9_USB2_VP, Y5_USB2_RCV,
  R9_USB2_VM, V6_USB2_TXD, W5_USB2_SE0, R13_1610_UART1_TX,
  V14_16XX_UART1_RX, R14_1610_UART1_CTS, AA15_1610_UART1_RTS, R9_16XX_UART2_RX,
  L14_16XX_UART3_RX, I2C_SCL, I2C_SDA, F18_1610_KBC0,
  D20_1610_KBC1, D19_1610_KBC2, E18_1610_KBC3, C21_1610_KBC4,
  G18_1610_KBR0, F19_1610_KBR1, H14_1610_KBR2, E20_1610_KBR3,
  E19_1610_KBR4, N19_1610_KBR5, T20_1610_LOW_PWR, V5_1710_MCLK_ON,
  V5_1710_MCLK_OFF, R10_1610_MCLK_ON, R10_1610_MCLK_OFF, P11_1610_CF_CD2,
  R11_1610_CF_IOIS16, V10_1610_CF_IREQ, W10_1610_CF_RESET, W11_1610_CF_CD1,
  J15_1610_CAM_LCLK, J18_1610_CAM_D7, J19_1610_CAM_D6, J14_1610_CAM_D5,
  K18_1610_CAM_D4, K19_1610_CAM_D3, K15_1610_CAM_D2, K14_1610_CAM_D1,
  L19_1610_CAM_D0, L18_1610_CAM_VS, L15_1610_CAM_HS, M19_1610_CAM_RSTZ,
  Y15_1610_CAM_OUTCLK, H19_1610_CAM_EXCLK, Y12_1610_CCP_CLKP, W13_1610_CCP_CLKM,
  W14_1610_CCP_DATAP, Y14_1610_CCP_DATAM
}
 

Functions

int omap2_mux_init (void)
 

Macro Definition Documentation

#define MUX_CFG (   desc,
  mux_reg,
  mode_offset,
  mode,
  pull_reg,
  pull_bit,
  pull_status,
  pu_pd_reg,
  pu_pd_status,
  debug_status 
)
Value:
{ \
.name = desc, \
.debug = debug_status, \
MUX_REG(mux_reg, mode_offset, mode) \
PULL_REG(pull_reg, pull_bit, pull_status) \
PU_PD_REG(pu_pd_reg, pu_pd_status) \
},

Definition at line 88 of file mux.h.

#define MUX_CFG_7XX (   desc,
  mux_reg,
  mode_offset,
  mode,
  pull_bit,
  pull_status,
  debug_status 
)
Value:
{ \
.name = desc, \
.debug = debug_status, \
MUX_REG_7XX(mux_reg, mode_offset, mode) \
PULL_REG_7XX(mux_reg, pull_bit, pull_status) \
PU_PD_REG(NA, 0) \
},

Definition at line 107 of file mux.h.

#define MUX_REG (   reg,
  mode_offset,
  mode 
)
Value:
.mux_reg = FUNC_MUX_CTRL_##reg, \
.mask_offset = mode_offset, \
.mask = mode,

Definition at line 66 of file mux.h.

#define MUX_REG_7XX (   reg,
  mode_offset,
  mode 
)
Value:
.mux_reg = OMAP7XX_IO_CONF_##reg, \
.mask_offset = mode_offset, \
.mask = mode,

Definition at line 77 of file mux.h.

#define PU_PD_REG (   reg,
  status 
)
Value:
.pu_pd_reg = PU_PD_SEL_##reg, \
.pu_pd_val = status,

Definition at line 74 of file mux.h.

#define PU_PD_SEL_NA   0 /* No pu_pd reg available */

Definition at line 36 of file mux.h.

#define PULL_DWN_CTRL_NA   0 /* No pull-down control needed */

Definition at line 37 of file mux.h.

#define PULL_REG (   reg,
  bit,
  status 
)
Value:
.pull_reg = PULL_DWN_CTRL_##reg, \
.pull_bit = bit, \
.pull_val = status,

Definition at line 70 of file mux.h.

#define PULL_REG_7XX (   reg,
  bit,
  status 
)
Value:
.pull_reg = OMAP7XX_IO_CONF_##reg, \
.pull_bit = bit, \
.pull_val = status,

Definition at line 82 of file mux.h.

Enumeration Type Documentation

enum omap1xxx_index
Enumerator:
UART1_TX 
UART1_RTS 
UART2_TX 
UART2_RX 
UART2_CTS 
UART2_RTS 
UART3_TX 
UART3_RX 
UART3_CTS 
UART3_RTS 
UART3_CLKREQ 
UART3_BCLK 
Y15_1610_UART3_RTS 
PWT 
PWL 
R18_USB_VBUS 
R18_1510_USB_GPIO0 
W4_USB_PUEN 
W4_USB_CLKO 
W4_USB_HIGHZ 
W4_GPIO58 
USB1_SUSP 
USB1_SEO 
W13_1610_USB1_SE0 
USB1_TXEN 
USB1_TXD 
USB1_VP 
USB1_VM 
USB1_RCV 
USB1_SPEED 
R13_1610_USB1_SPEED 
R13_1710_USB1_SE0 
USB2_SUSP 
USB2_VP 
USB2_TXEN 
USB2_VM 
USB2_RCV 
USB2_SEO 
USB2_TXD 
R18_1510_GPIO0 
R19_1510_GPIO1 
M14_1510_GPIO2 
P18_1610_GPIO3 
Y15_1610_GPIO17 
R18_1710_GPIO0 
V2_1710_GPIO10 
N21_1710_GPIO14 
W15_1710_GPIO40 
MPUIO2 
N15_1610_MPUIO2 
MPUIO4 
MPUIO5 
T20_1610_MPUIO5 
W11_1610_MPUIO6 
V10_1610_MPUIO7 
W11_1610_MPUIO9 
V10_1610_MPUIO10 
W10_1610_MPUIO11 
E20_1610_MPUIO13 
U20_1610_MPUIO14 
E19_1610_MPUIO15 
MCBSP2_CLKR 
MCBSP2_CLKX 
MCBSP2_DR 
MCBSP2_DX 
MCBSP2_FSR 
MCBSP2_FSX 
MCBSP3_CLKX 
BALLOUT_V8_ARMIO3 
N20_HDQ 
W8_1610_MMC2_DAT0 
V8_1610_MMC2_DAT1 
W15_1610_MMC2_DAT2 
R10_1610_MMC2_DAT3 
Y10_1610_MMC2_CLK 
Y8_1610_MMC2_CMD 
V9_1610_MMC2_CMDDIR 
V5_1610_MMC2_DATDIR0 
W19_1610_MMC2_DATDIR1 
R18_1610_MMC2_CLKIN 
M19_1610_ETM_PSTAT0 
L15_1610_ETM_PSTAT1 
L18_1610_ETM_PSTAT2 
L19_1610_ETM_D0 
J19_1610_ETM_D6 
J18_1610_ETM_D7 
P20_1610_GPIO4 
V9_1610_GPIO7 
W8_1610_GPIO9 
N20_1610_GPIO11 
N19_1610_GPIO13 
P10_1610_GPIO22 
V5_1610_GPIO24 
AA20_1610_GPIO_41 
W19_1610_GPIO48 
M7_1610_GPIO62 
V14_16XX_GPIO37 
R9_16XX_GPIO18 
L14_16XX_GPIO49 
V19_1610_UWIRE_SCLK 
U18_1610_UWIRE_SDI 
W21_1610_UWIRE_SDO 
N14_1610_UWIRE_CS0 
P15_1610_UWIRE_CS3 
N15_1610_UWIRE_CS1 
U19_1610_SPIF_SCK 
U18_1610_SPIF_DIN 
P20_1610_SPIF_DIN 
W21_1610_SPIF_DOUT 
R18_1610_SPIF_DOUT 
N14_1610_SPIF_CS0 
N15_1610_SPIF_CS1 
T19_1610_SPIF_CS2 
P15_1610_SPIF_CS3 
L3_1610_FLASH_CS2B_OE 
M8_1610_FLASH_CS2B_WE 
MMC_CMD 
MMC_DAT1 
MMC_DAT2 
MMC_DAT0 
MMC_CLK 
MMC_DAT3 
M15_1710_MMC_CLKI 
P19_1710_MMC_CMDDIR 
P20_1710_MMC_DATDIR0 
W9_USB0_TXEN 
AA9_USB0_VP 
Y5_USB0_RCV 
R9_USB0_VM 
V6_USB0_TXD 
W5_USB0_SE0 
V9_USB0_SPEED 
V9_USB0_SUSP 
W9_USB2_TXEN 
AA9_USB2_VP 
Y5_USB2_RCV 
R9_USB2_VM 
V6_USB2_TXD 
W5_USB2_SE0 
R13_1610_UART1_TX 
V14_16XX_UART1_RX 
R14_1610_UART1_CTS 
AA15_1610_UART1_RTS 
R9_16XX_UART2_RX 
L14_16XX_UART3_RX 
I2C_SCL 
I2C_SDA 
F18_1610_KBC0 
D20_1610_KBC1 
D19_1610_KBC2 
E18_1610_KBC3 
C21_1610_KBC4 
G18_1610_KBR0 
F19_1610_KBR1 
H14_1610_KBR2 
E20_1610_KBR3 
E19_1610_KBR4 
N19_1610_KBR5 
T20_1610_LOW_PWR 
V5_1710_MCLK_ON 
V5_1710_MCLK_OFF 
R10_1610_MCLK_ON 
R10_1610_MCLK_OFF 
P11_1610_CF_CD2 
R11_1610_CF_IOIS16 
V10_1610_CF_IREQ 
W10_1610_CF_RESET 
W11_1610_CF_CD1 
J15_1610_CAM_LCLK 
J18_1610_CAM_D7 
J19_1610_CAM_D6 
J14_1610_CAM_D5 
K18_1610_CAM_D4 
K19_1610_CAM_D3 
K15_1610_CAM_D2 
K14_1610_CAM_D1 
L19_1610_CAM_D0 
L18_1610_CAM_VS 
L15_1610_CAM_HS 
M19_1610_CAM_RSTZ 
Y15_1610_CAM_OUTCLK 
H19_1610_CAM_EXCLK 
Y12_1610_CCP_CLKP 
W13_1610_CCP_CLKM 
W14_1610_CCP_DATAP 
Y14_1610_CCP_DATAM 

Definition at line 182 of file mux.h.

enum omap7xx_index
Enumerator:
E2_7XX_KBR0 
J7_7XX_KBR1 
E1_7XX_KBR2 
F3_7XX_KBR3 
D2_7XX_KBR4 
C2_7XX_KBC0 
D3_7XX_KBC1 
E4_7XX_KBC2 
F4_7XX_KBC3 
E3_7XX_KBC4 
AA17_7XX_USB_DM 
W16_7XX_USB_PU_EN 
W17_7XX_USB_VBUSI 
W18_7XX_USB_DMCK_OUT 
W19_7XX_USB_DCRST 
MMC_7XX_CMD 
MMC_7XX_CLK 
MMC_7XX_DAT0 
I2C_7XX_SCL 
I2C_7XX_SDA 
SPI_7XX_1 
SPI_7XX_2 
SPI_7XX_3 
SPI_7XX_4 
SPI_7XX_5 
SPI_7XX_6 
UART_7XX_1 
UART_7XX_2 

Definition at line 140 of file mux.h.

Function Documentation

int omap2_mux_init ( void  )
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