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Linux Kernel
3.7.1
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All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
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Linux Kernel
3.7.1
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#include <linux/init.h>#include <linux/irqdomain.h>#include <linux/irq.h>#include <asm/page.h>#include <linux/io.h>#include <linux/bug.h>#include <asm/prom.h>#include <asm/irq.h>Go to the source code of this file.
Macros | |
| #define | INTC_BASE intc_baseaddr |
| #define | ISR 0x00 /* Interrupt Status Register */ |
| #define | IPR 0x04 /* Interrupt Pending Register */ |
| #define | IER 0x08 /* Interrupt Enable Register */ |
| #define | IAR 0x0c /* Interrupt Acknowledge Register */ |
| #define | SIE 0x10 /* Set Interrupt Enable bits */ |
| #define | CIE 0x14 /* Clear Interrupt Enable bits */ |
| #define | IVR 0x18 /* Interrupt Vector Register */ |
| #define | MER 0x1c /* Master Enable Register */ |
| #define | MER_ME (1<<0) |
| #define | MER_HIE (1<<1) |
Functions | |
| unsigned int | get_irq (void) |
| int | xintc_map (struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) |
| void __init | init_IRQ (void) |
The hexagon core comes with a first-level interrupt controller with 32 total possible interrupts. When the core is embedded into different systems/platforms, it is typically wrapped by macro cells that provide one or more second-level interrupt controllers that are cascaded into one or more of the first-level interrupts handled here. The precise wiring of these other irqs varies from platform to platform, and are set up & configured in the platform-specific files.
The first-level interrupt controller is wrapped by the VM, which virtualizes the interrupt controller for us. It provides a very simple, fast & efficient API, and so the fasteoi handler is appropriate for this case.
| int xintc_map | ( | struct irq_domain * | d, |
| unsigned int | irq, | ||
| irq_hw_number_t | hw | ||
| ) |
1.8.2