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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Go to the source code of this file.
Data Structures | |
| union | int_ptr |
Macros | |
| #define | DEC_IRQ_CASCADE 0 /* cascade from CSR or I/O ASIC */ |
| #define | DEC_IRQ_AB_RECV 1 /* ACCESS.bus receive */ |
| #define | DEC_IRQ_AB_XMIT 2 /* ACCESS.bus transmit */ |
| #define | DEC_IRQ_DZ11 3 /* DZ11 (DC7085) serial */ |
| #define | DEC_IRQ_ASC 4 /* ASC (NCR53C94) SCSI */ |
| #define | DEC_IRQ_FLOPPY 5 /* 82077 FDC */ |
| #define | DEC_IRQ_FPU 6 /* R3k FPU */ |
| #define | DEC_IRQ_HALT 7 /* HALT button or from ACCESS.Bus */ |
| #define | DEC_IRQ_ISDN 8 /* Am79C30A ISDN */ |
| #define | DEC_IRQ_LANCE 9 /* LANCE (Am7990) Ethernet */ |
| #define | DEC_IRQ_BUS 10 /* memory, I/O bus read/write errors */ |
| #define | DEC_IRQ_PSU 11 /* power supply unit warning */ |
| #define | DEC_IRQ_RTC 12 /* DS1287 RTC */ |
| #define | DEC_IRQ_SCC0 13 /* SCC (Z85C30) serial #0 */ |
| #define | DEC_IRQ_SCC1 14 /* SCC (Z85C30) serial #1 */ |
| #define | DEC_IRQ_SII 15 /* SII (DC7061) SCSI */ |
| #define | DEC_IRQ_TC0 16 /* TURBOchannel slot #0 */ |
| #define | DEC_IRQ_TC1 17 /* TURBOchannel slot #1 */ |
| #define | DEC_IRQ_TC2 18 /* TURBOchannel slot #2 */ |
| #define | DEC_IRQ_TIMER 19 /* ARC periodic timer */ |
| #define | DEC_IRQ_VIDEO 20 /* framebuffer */ |
| #define | DEC_IRQ_ASC_MERR 21 /* ASC memory read error */ |
| #define | DEC_IRQ_ASC_ERR 22 /* ASC page overrun */ |
| #define | DEC_IRQ_ASC_DMA 23 /* ASC buffer pointer loaded */ |
| #define | DEC_IRQ_FLOPPY_ERR 24 /* FDC error */ |
| #define | DEC_IRQ_ISDN_ERR 25 /* ISDN memory read/overrun error */ |
| #define | DEC_IRQ_ISDN_RXDMA 26 /* ISDN recv buffer pointer loaded */ |
| #define | DEC_IRQ_ISDN_TXDMA 27 /* ISDN xmit buffer pointer loaded */ |
| #define | DEC_IRQ_LANCE_MERR 28 /* LANCE memory read error */ |
| #define | DEC_IRQ_SCC0A_RXERR 29 /* SCC0A (printer) receive overrun */ |
| #define | DEC_IRQ_SCC0A_RXDMA 30 /* SCC0A receive half page */ |
| #define | DEC_IRQ_SCC0A_TXERR 31 /* SCC0A xmit memory read/overrun */ |
| #define | DEC_IRQ_SCC0A_TXDMA 32 /* SCC0A transmit page end */ |
| #define | DEC_IRQ_AB_RXERR 33 /* ACCESS.bus receive overrun */ |
| #define | DEC_IRQ_AB_RXDMA 34 /* ACCESS.bus receive half page */ |
| #define | DEC_IRQ_AB_TXERR 35 /* ACCESS.bus xmit memory read/ovrn */ |
| #define | DEC_IRQ_AB_TXDMA 36 /* ACCESS.bus transmit page end */ |
| #define | DEC_IRQ_SCC1A_RXERR 37 /* SCC1A (modem) receive overrun */ |
| #define | DEC_IRQ_SCC1A_RXDMA 38 /* SCC1A receive half page */ |
| #define | DEC_IRQ_SCC1A_TXERR 39 /* SCC1A xmit memory read/overrun */ |
| #define | DEC_IRQ_SCC1A_TXDMA 40 /* SCC1A transmit page end */ |
| #define | DEC_IRQ_TC5 DEC_IRQ_ASC /* virtual PMAZ-AA */ |
| #define | DEC_IRQ_TC6 DEC_IRQ_LANCE /* virtual PMAD-AA */ |
| #define | DEC_NR_INTS 41 |
| #define | DEC_MAX_CPU_INTS 6 |
| #define | DEC_MAX_ASIC_INTS 9 |
| #define | DEC_CPU_INR_FPU 7 /* R3k FPU */ |
| #define | DEC_CPU_INR_SW1 1 /* software #1 */ |
| #define | DEC_CPU_INR_SW0 0 /* software #0 */ |
| #define | DEC_CPU_IRQ_BASE MIPS_CPU_IRQ_BASE /* first IRQ assigned to CPU */ |
| #define | DEC_CPU_IRQ_NR(n) ((n) + DEC_CPU_IRQ_BASE) |
| #define | DEC_CPU_IRQ_MASK(n) (1 << ((n) + CAUSEB_IP)) |
| #define | DEC_CPU_IRQ_ALL (0xff << CAUSEB_IP) |
Functions | |
| void | kn02_io_int (void) |
| void | kn02xa_io_int (void) |
| void | kn03_io_int (void) |
| void | asic_dma_int (void) |
| void | asic_all_int (void) |
| void | kn02_all_int (void) |
| void | cpu_all_int (void) |
| void | dec_intr_unimplemented (void) |
| void | asic_intr_unimplemented (void) |
Variables | |
| int | dec_interrupt [DEC_NR_INTS] |
| int_ptr | cpu_mask_nr_tbl [DEC_MAX_CPU_INTS][2] |
| int_ptr | asic_mask_nr_tbl [DEC_MAX_ASIC_INTS][2] |
| int | cpu_fpu_mask |
| #define DEC_CPU_INR_FPU 7 /* R3k FPU */ |
Definition at line 87 of file interrupts.h.
| #define DEC_CPU_INR_SW0 0 /* software #0 */ |
Definition at line 89 of file interrupts.h.
| #define DEC_CPU_INR_SW1 1 /* software #1 */ |
Definition at line 88 of file interrupts.h.
| #define DEC_CPU_IRQ_ALL (0xff << CAUSEB_IP) |
Definition at line 95 of file interrupts.h.
| #define DEC_CPU_IRQ_BASE MIPS_CPU_IRQ_BASE /* first IRQ assigned to CPU */ |
Definition at line 91 of file interrupts.h.
Definition at line 94 of file interrupts.h.
| #define DEC_CPU_IRQ_NR | ( | n | ) | ((n) + DEC_CPU_IRQ_BASE) |
Definition at line 93 of file interrupts.h.
| #define DEC_IRQ_AB_RECV 1 /* ACCESS.bus receive */ |
Definition at line 28 of file interrupts.h.
| #define DEC_IRQ_AB_RXDMA 34 /* ACCESS.bus receive half page */ |
Definition at line 63 of file interrupts.h.
| #define DEC_IRQ_AB_RXERR 33 /* ACCESS.bus receive overrun */ |
Definition at line 62 of file interrupts.h.
| #define DEC_IRQ_AB_TXDMA 36 /* ACCESS.bus transmit page end */ |
Definition at line 65 of file interrupts.h.
| #define DEC_IRQ_AB_TXERR 35 /* ACCESS.bus xmit memory read/ovrn */ |
Definition at line 64 of file interrupts.h.
| #define DEC_IRQ_AB_XMIT 2 /* ACCESS.bus transmit */ |
Definition at line 29 of file interrupts.h.
Definition at line 31 of file interrupts.h.
Definition at line 52 of file interrupts.h.
Definition at line 51 of file interrupts.h.
Definition at line 37 of file interrupts.h.
Definition at line 25 of file interrupts.h.
| #define DEC_IRQ_DZ11 3 /* DZ11 (DC7085) serial */ |
Definition at line 30 of file interrupts.h.
| #define DEC_IRQ_FLOPPY 5 /* 82077 FDC */ |
Definition at line 32 of file interrupts.h.
Definition at line 53 of file interrupts.h.
| #define DEC_IRQ_FPU 6 /* R3k FPU */ |
Definition at line 33 of file interrupts.h.
Definition at line 34 of file interrupts.h.
| #define DEC_IRQ_ISDN 8 /* Am79C30A ISDN */ |
Definition at line 35 of file interrupts.h.
Definition at line 54 of file interrupts.h.
Definition at line 55 of file interrupts.h.
Definition at line 56 of file interrupts.h.
| #define DEC_IRQ_LANCE 9 /* LANCE (Am7990) Ethernet */ |
Definition at line 36 of file interrupts.h.
Definition at line 57 of file interrupts.h.
Definition at line 38 of file interrupts.h.
| #define DEC_IRQ_RTC 12 /* DS1287 RTC */ |
Definition at line 39 of file interrupts.h.
Definition at line 40 of file interrupts.h.
Definition at line 59 of file interrupts.h.
| #define DEC_IRQ_SCC0A_RXERR 29 /* SCC0A (printer) receive overrun */ |
Definition at line 58 of file interrupts.h.
Definition at line 61 of file interrupts.h.
Definition at line 60 of file interrupts.h.
Definition at line 41 of file interrupts.h.
Definition at line 67 of file interrupts.h.
| #define DEC_IRQ_SCC1A_RXERR 37 /* SCC1A (modem) receive overrun */ |
Definition at line 66 of file interrupts.h.
Definition at line 69 of file interrupts.h.
Definition at line 68 of file interrupts.h.
| #define DEC_IRQ_SII 15 /* SII (DC7061) SCSI */ |
Definition at line 42 of file interrupts.h.
| #define DEC_IRQ_TC0 16 /* TURBOchannel slot #0 */ |
Definition at line 43 of file interrupts.h.
| #define DEC_IRQ_TC1 17 /* TURBOchannel slot #1 */ |
Definition at line 44 of file interrupts.h.
| #define DEC_IRQ_TC2 18 /* TURBOchannel slot #2 */ |
Definition at line 45 of file interrupts.h.
| #define DEC_IRQ_TC5 DEC_IRQ_ASC /* virtual PMAZ-AA */ |
Definition at line 72 of file interrupts.h.
| #define DEC_IRQ_TC6 DEC_IRQ_LANCE /* virtual PMAD-AA */ |
Definition at line 73 of file interrupts.h.
Definition at line 46 of file interrupts.h.
| #define DEC_IRQ_VIDEO 20 /* framebuffer */ |
Definition at line 47 of file interrupts.h.
| #define DEC_MAX_ASIC_INTS 9 |
Definition at line 81 of file interrupts.h.
| #define DEC_MAX_CPU_INTS 6 |
Definition at line 79 of file interrupts.h.
| #define DEC_NR_INTS 41 |
Definition at line 75 of file interrupts.h.
| int_ptr asic_mask_nr_tbl[DEC_MAX_ASIC_INTS][2] |
| int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2] |
| int dec_interrupt[DEC_NR_INTS] |
1.8.2