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Macros
intr.h File Reference

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Macros

#define N_INTPEND_BITS   64
 
#define INT_PEND0_BASELVL   0
 
#define INT_PEND1_BASELVL   64
 
#define N_INTPENDJUNK_BITS   8
 
#define INTPENDJUNK_CLRBIT   0x80
 
#define LOCAL_HUB_SEND_INTR(level)   LOCAL_HUB_S(PI_INT_PEND_MOD, (0x100 | (level)))
 
#define REMOTE_HUB_SEND_INTR(hub, level)   REMOTE_HUB_S((hub), PI_INT_PEND_MOD, (0x100 | (level)))
 
#define LOCAL_HUB_CLR_INTR(level)
 
#define REMOTE_HUB_CLR_INTR(hub, level)
 
#define RESERVED_INTR   0 /* What is this bit? */
 
#define GFX_INTR_A   1
 
#define GFX_INTR_B   2
 
#define PG_MIG_INTR   3
 
#define UART_INTR   4
 
#define CC_PEND_A   5
 
#define CC_PEND_B   6
 
#define CPU_RESCHED_A_IRQ   7
 
#define CPU_RESCHED_B_IRQ   8
 
#define CPU_CALL_A_IRQ   9
 
#define CPU_CALL_B_IRQ   10
 
#define MSC_MESG_INTR   11
 
#define BASE_PCI_IRQ   12
 
#define SDISK_INTR   63 /* SABLE name */
 
#define IP_PEND0_6_63   63 /* What is this bit? */
 
#define NI_BRDCAST_ERR_A   39
 
#define NI_BRDCAST_ERR_B   40
 
#define LLP_PFAIL_INTR_A   41 /* see ml/SN/SN0/sysctlr.c */
 
#define LLP_PFAIL_INTR_B   42
 
#define TLB_INTR_A   43 /* used for tlb flush random */
 
#define TLB_INTR_B   44
 
#define IP27_INTR_0   45 /* Reserved for PROM use */
 
#define IP27_INTR_1   46 /* do not use in Kernel */
 
#define IP27_INTR_2   47
 
#define IP27_INTR_3   48
 
#define IP27_INTR_4   49
 
#define IP27_INTR_5   50
 
#define IP27_INTR_6   51
 
#define IP27_INTR_7   52
 
#define BRIDGE_ERROR_INTR   53 /* Setup by PROM to catch */
 
#define DEBUG_INTR_A   54
 
#define DEBUG_INTR_B   55 /* Used by symmon to stop all cpus */
 
#define IO_ERROR_INTR   57 /* Setup by PROM */
 
#define CLK_ERR_INTR   58
 
#define COR_ERR_INTR_A   59
 
#define COR_ERR_INTR_B   60
 
#define MD_COR_ERR_INTR   61
 
#define NI_ERROR_INTR   62
 
#define MSC_PANIC_INTR   63
 

Macro Definition Documentation

#define BASE_PCI_IRQ   12

Definition at line 88 of file intr.h.

#define BRIDGE_ERROR_INTR   53 /* Setup by PROM to catch */

Definition at line 117 of file intr.h.

#define CC_PEND_A   5

Definition at line 77 of file intr.h.

#define CC_PEND_B   6

Definition at line 78 of file intr.h.

#define CLK_ERR_INTR   58

Definition at line 122 of file intr.h.

#define COR_ERR_INTR_A   59

Definition at line 123 of file intr.h.

#define COR_ERR_INTR_B   60

Definition at line 124 of file intr.h.

#define CPU_CALL_A_IRQ   9

Definition at line 85 of file intr.h.

#define CPU_CALL_B_IRQ   10

Definition at line 86 of file intr.h.

#define CPU_RESCHED_A_IRQ   7

Definition at line 83 of file intr.h.

#define CPU_RESCHED_B_IRQ   8

Definition at line 84 of file intr.h.

#define DEBUG_INTR_A   54

Definition at line 119 of file intr.h.

#define DEBUG_INTR_B   55 /* Used by symmon to stop all cpus */

Definition at line 120 of file intr.h.

#define GFX_INTR_A   1

Definition at line 73 of file intr.h.

#define GFX_INTR_B   2

Definition at line 74 of file intr.h.

#define INT_PEND0_BASELVL   0

Definition at line 14 of file intr.h.

#define INT_PEND1_BASELVL   64

Definition at line 15 of file intr.h.

#define INTPENDJUNK_CLRBIT   0x80

Definition at line 18 of file intr.h.

#define IO_ERROR_INTR   57 /* Setup by PROM */

Definition at line 121 of file intr.h.

#define IP27_INTR_0   45 /* Reserved for PROM use */

Definition at line 108 of file intr.h.

#define IP27_INTR_1   46 /* do not use in Kernel */

Definition at line 109 of file intr.h.

#define IP27_INTR_2   47

Definition at line 110 of file intr.h.

#define IP27_INTR_3   48

Definition at line 111 of file intr.h.

#define IP27_INTR_4   49

Definition at line 112 of file intr.h.

#define IP27_INTR_5   50

Definition at line 113 of file intr.h.

#define IP27_INTR_6   51

Definition at line 114 of file intr.h.

#define IP27_INTR_7   52

Definition at line 115 of file intr.h.

#define IP_PEND0_6_63   63 /* What is this bit? */

Definition at line 94 of file intr.h.

#define LLP_PFAIL_INTR_A   41 /* see ml/SN/SN0/sysctlr.c */

Definition at line 102 of file intr.h.

#define LLP_PFAIL_INTR_B   42

Definition at line 103 of file intr.h.

#define LOCAL_HUB_CLR_INTR (   level)
Value:
do { \
LOCAL_HUB_S(PI_INT_PEND_MOD, (level)); \
LOCAL_HUB_L(PI_INT_PEND0); \
} while (0);

Definition at line 35 of file intr.h.

#define LOCAL_HUB_SEND_INTR (   level)    LOCAL_HUB_S(PI_INT_PEND_MOD, (0x100 | (level)))

Definition at line 24 of file intr.h.

#define MD_COR_ERR_INTR   61

Definition at line 125 of file intr.h.

#define MSC_MESG_INTR   11

Definition at line 87 of file intr.h.

#define MSC_PANIC_INTR   63

Definition at line 127 of file intr.h.

#define N_INTPEND_BITS   64

Definition at line 12 of file intr.h.

#define N_INTPENDJUNK_BITS   8

Definition at line 17 of file intr.h.

#define NI_BRDCAST_ERR_A   39

Definition at line 99 of file intr.h.

#define NI_BRDCAST_ERR_B   40

Definition at line 100 of file intr.h.

#define NI_ERROR_INTR   62

Definition at line 126 of file intr.h.

#define PG_MIG_INTR   3

Definition at line 75 of file intr.h.

#define REMOTE_HUB_CLR_INTR (   hub,
  level 
)
Value:
do { \
nasid_t __hub = (hub); \
REMOTE_HUB_L(__hub, PI_INT_PEND0); \
} while (0);

Definition at line 41 of file intr.h.

#define REMOTE_HUB_SEND_INTR (   hub,
  level 
)    REMOTE_HUB_S((hub), PI_INT_PEND_MOD, (0x100 | (level)))

Definition at line 26 of file intr.h.

#define RESERVED_INTR   0 /* What is this bit? */

Definition at line 72 of file intr.h.

#define SDISK_INTR   63 /* SABLE name */

Definition at line 93 of file intr.h.

#define TLB_INTR_A   43 /* used for tlb flush random */

Definition at line 105 of file intr.h.

#define TLB_INTR_B   44

Definition at line 106 of file intr.h.

#define UART_INTR   4

Definition at line 76 of file intr.h.