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mscan.c
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1 /*
2  * CAN bus driver for the alone generic (as possible as) MSCAN controller.
3  *
4  * Copyright (C) 2005-2006 Andrey Volkov <[email protected]>,
5  * Varma Electronics Oy
6  * Copyright (C) 2008-2009 Wolfgang Grandegger <[email protected]>
7  * Copyright (C) 2008-2009 Pengutronix <[email protected]>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the version 2 of the GNU General Public License
11  * as published by the Free Software Foundation
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21  */
22 
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/interrupt.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/if_arp.h>
29 #include <linux/if_ether.h>
30 #include <linux/list.h>
31 #include <linux/can/dev.h>
32 #include <linux/can/error.h>
33 #include <linux/io.h>
34 
35 #include "mscan.h"
36 
37 static const struct can_bittiming_const mscan_bittiming_const = {
38  .name = "mscan",
39  .tseg1_min = 4,
40  .tseg1_max = 16,
41  .tseg2_min = 2,
42  .tseg2_max = 8,
43  .sjw_max = 4,
44  .brp_min = 1,
45  .brp_max = 64,
46  .brp_inc = 1,
47 };
48 
49 struct mscan_state {
53 };
54 
55 static enum can_state state_map[] = {
60 };
61 
62 static int mscan_set_mode(struct net_device *dev, u8 mode)
63 {
64  struct mscan_priv *priv = netdev_priv(dev);
65  struct mscan_regs __iomem *regs = priv->reg_base;
66  int ret = 0;
67  int i;
68  u8 canctl1;
69 
70  if (mode != MSCAN_NORMAL_MODE) {
71  if (priv->tx_active) {
72  /* Abort transfers before going to sleep */#
73  out_8(&regs->cantarq, priv->tx_active);
74  /* Suppress TX done interrupts */
75  out_8(&regs->cantier, 0);
76  }
77 
78  canctl1 = in_8(&regs->canctl1);
79  if ((mode & MSCAN_SLPRQ) && !(canctl1 & MSCAN_SLPAK)) {
80  setbits8(&regs->canctl0, MSCAN_SLPRQ);
81  for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
82  if (in_8(&regs->canctl1) & MSCAN_SLPAK)
83  break;
84  udelay(100);
85  }
86  /*
87  * The mscan controller will fail to enter sleep mode,
88  * while there are irregular activities on bus, like
89  * somebody keeps retransmitting. This behavior is
90  * undocumented and seems to differ between mscan built
91  * in mpc5200b and mpc5200. We proceed in that case,
92  * since otherwise the slprq will be kept set and the
93  * controller will get stuck. NOTE: INITRQ or CSWAI
94  * will abort all active transmit actions, if still
95  * any, at once.
96  */
97  if (i >= MSCAN_SET_MODE_RETRIES)
98  netdev_dbg(dev,
99  "device failed to enter sleep mode. "
100  "We proceed anyhow.\n");
101  else
102  priv->can.state = CAN_STATE_SLEEPING;
103  }
104 
105  if ((mode & MSCAN_INITRQ) && !(canctl1 & MSCAN_INITAK)) {
106  setbits8(&regs->canctl0, MSCAN_INITRQ);
107  for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
108  if (in_8(&regs->canctl1) & MSCAN_INITAK)
109  break;
110  }
111  if (i >= MSCAN_SET_MODE_RETRIES)
112  ret = -ENODEV;
113  }
114  if (!ret)
115  priv->can.state = CAN_STATE_STOPPED;
116 
117  if (mode & MSCAN_CSWAI)
118  setbits8(&regs->canctl0, MSCAN_CSWAI);
119 
120  } else {
121  canctl1 = in_8(&regs->canctl1);
122  if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) {
123  clrbits8(&regs->canctl0, MSCAN_SLPRQ | MSCAN_INITRQ);
124  for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
125  canctl1 = in_8(&regs->canctl1);
126  if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK)))
127  break;
128  }
129  if (i >= MSCAN_SET_MODE_RETRIES)
130  ret = -ENODEV;
131  else
132  priv->can.state = CAN_STATE_ERROR_ACTIVE;
133  }
134  }
135  return ret;
136 }
137 
138 static int mscan_start(struct net_device *dev)
139 {
140  struct mscan_priv *priv = netdev_priv(dev);
141  struct mscan_regs __iomem *regs = priv->reg_base;
142  u8 canrflg;
143  int err;
144 
145  out_8(&regs->canrier, 0);
146 
147  INIT_LIST_HEAD(&priv->tx_head);
148  priv->prev_buf_id = 0;
149  priv->cur_pri = 0;
150  priv->tx_active = 0;
151  priv->shadow_canrier = 0;
152  priv->flags = 0;
153 
154  if (priv->type == MSCAN_TYPE_MPC5121) {
155  /* Clear pending bus-off condition */
156  if (in_8(&regs->canmisc) & MSCAN_BOHOLD)
157  out_8(&regs->canmisc, MSCAN_BOHOLD);
158  }
159 
160  err = mscan_set_mode(dev, MSCAN_NORMAL_MODE);
161  if (err)
162  return err;
163 
164  canrflg = in_8(&regs->canrflg);
165  priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
166  priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg),
167  MSCAN_STATE_TX(canrflg))];
168  out_8(&regs->cantier, 0);
169 
170  /* Enable receive interrupts. */
172 
173  return 0;
174 }
175 
176 static int mscan_restart(struct net_device *dev)
177 {
178  struct mscan_priv *priv = netdev_priv(dev);
179 
180  if (priv->type == MSCAN_TYPE_MPC5121) {
181  struct mscan_regs __iomem *regs = priv->reg_base;
182 
183  priv->can.state = CAN_STATE_ERROR_ACTIVE;
184  WARN(!(in_8(&regs->canmisc) & MSCAN_BOHOLD),
185  "bus-off state expected\n");
186  out_8(&regs->canmisc, MSCAN_BOHOLD);
187  /* Re-enable receive interrupts. */
189  } else {
190  if (priv->can.state <= CAN_STATE_BUS_OFF)
191  mscan_set_mode(dev, MSCAN_INIT_MODE);
192  return mscan_start(dev);
193  }
194 
195  return 0;
196 }
197 
198 static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)
199 {
200  struct can_frame *frame = (struct can_frame *)skb->data;
201  struct mscan_priv *priv = netdev_priv(dev);
202  struct mscan_regs __iomem *regs = priv->reg_base;
203  int i, rtr, buf_id;
204  u32 can_id;
205 
206  if (can_dropped_invalid_skb(dev, skb))
207  return NETDEV_TX_OK;
208 
209  out_8(&regs->cantier, 0);
210 
211  i = ~priv->tx_active & MSCAN_TXE;
212  buf_id = ffs(i) - 1;
213  switch (hweight8(i)) {
214  case 0:
215  netif_stop_queue(dev);
216  netdev_err(dev, "Tx Ring full when queue awake!\n");
217  return NETDEV_TX_BUSY;
218  case 1:
219  /*
220  * if buf_id < 3, then current frame will be send out of order,
221  * since buffer with lower id have higher priority (hell..)
222  */
223  netif_stop_queue(dev);
224  case 2:
225  if (buf_id < priv->prev_buf_id) {
226  priv->cur_pri++;
227  if (priv->cur_pri == 0xff) {
228  set_bit(F_TX_WAIT_ALL, &priv->flags);
229  netif_stop_queue(dev);
230  }
231  }
232  set_bit(F_TX_PROGRESS, &priv->flags);
233  break;
234  }
235  priv->prev_buf_id = buf_id;
236  out_8(&regs->cantbsel, i);
237 
238  rtr = frame->can_id & CAN_RTR_FLAG;
239 
240  /* RTR is always the lowest bit of interest, then IDs follow */
241  if (frame->can_id & CAN_EFF_FLAG) {
242  can_id = (frame->can_id & CAN_EFF_MASK)
243  << (MSCAN_EFF_RTR_SHIFT + 1);
244  if (rtr)
245  can_id |= 1 << MSCAN_EFF_RTR_SHIFT;
246  out_be16(&regs->tx.idr3_2, can_id);
247 
248  can_id >>= 16;
249  /* EFF_FLAGS are between the IDs :( */
250  can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0)
251  | MSCAN_EFF_FLAGS;
252  } else {
253  can_id = (frame->can_id & CAN_SFF_MASK)
254  << (MSCAN_SFF_RTR_SHIFT + 1);
255  if (rtr)
256  can_id |= 1 << MSCAN_SFF_RTR_SHIFT;
257  }
258  out_be16(&regs->tx.idr1_0, can_id);
259 
260  if (!rtr) {
261  void __iomem *data = &regs->tx.dsr1_0;
262  u16 *payload = (u16 *)frame->data;
263 
264  for (i = 0; i < frame->can_dlc / 2; i++) {
265  out_be16(data, *payload++);
266  data += 2 + _MSCAN_RESERVED_DSR_SIZE;
267  }
268  /* write remaining byte if necessary */
269  if (frame->can_dlc & 1)
270  out_8(data, frame->data[frame->can_dlc - 1]);
271  }
272 
273  out_8(&regs->tx.dlr, frame->can_dlc);
274  out_8(&regs->tx.tbpr, priv->cur_pri);
275 
276  /* Start transmission. */
277  out_8(&regs->cantflg, 1 << buf_id);
278 
279  if (!test_bit(F_TX_PROGRESS, &priv->flags))
280  dev->trans_start = jiffies;
281 
282  list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head);
283 
284  can_put_echo_skb(skb, dev, buf_id);
285 
286  /* Enable interrupt. */
287  priv->tx_active |= 1 << buf_id;
288  out_8(&regs->cantier, priv->tx_active);
289 
290  return NETDEV_TX_OK;
291 }
292 
293 /* This function returns the old state to see where we came from */
294 static enum can_state check_set_state(struct net_device *dev, u8 canrflg)
295 {
296  struct mscan_priv *priv = netdev_priv(dev);
297  enum can_state state, old_state = priv->can.state;
298 
299  if (canrflg & MSCAN_CSCIF && old_state <= CAN_STATE_BUS_OFF) {
300  state = state_map[max(MSCAN_STATE_RX(canrflg),
301  MSCAN_STATE_TX(canrflg))];
302  priv->can.state = state;
303  }
304  return old_state;
305 }
306 
307 static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame)
308 {
309  struct mscan_priv *priv = netdev_priv(dev);
310  struct mscan_regs __iomem *regs = priv->reg_base;
311  u32 can_id;
312  int i;
313 
314  can_id = in_be16(&regs->rx.idr1_0);
315  if (can_id & (1 << 3)) {
316  frame->can_id = CAN_EFF_FLAG;
317  can_id = ((can_id << 16) | in_be16(&regs->rx.idr3_2));
318  can_id = ((can_id & 0xffe00000) |
319  ((can_id & 0x7ffff) << 2)) >> 2;
320  } else {
321  can_id >>= 4;
322  frame->can_id = 0;
323  }
324 
325  frame->can_id |= can_id >> 1;
326  if (can_id & 1)
327  frame->can_id |= CAN_RTR_FLAG;
328 
329  frame->can_dlc = get_can_dlc(in_8(&regs->rx.dlr) & 0xf);
330 
331  if (!(frame->can_id & CAN_RTR_FLAG)) {
332  void __iomem *data = &regs->rx.dsr1_0;
333  u16 *payload = (u16 *)frame->data;
334 
335  for (i = 0; i < frame->can_dlc / 2; i++) {
336  *payload++ = in_be16(data);
337  data += 2 + _MSCAN_RESERVED_DSR_SIZE;
338  }
339  /* read remaining byte if necessary */
340  if (frame->can_dlc & 1)
341  frame->data[frame->can_dlc - 1] = in_8(data);
342  }
343 
344  out_8(&regs->canrflg, MSCAN_RXF);
345 }
346 
347 static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame,
348  u8 canrflg)
349 {
350  struct mscan_priv *priv = netdev_priv(dev);
351  struct mscan_regs __iomem *regs = priv->reg_base;
352  struct net_device_stats *stats = &dev->stats;
353  enum can_state old_state;
354 
355  netdev_dbg(dev, "error interrupt (canrflg=%#x)\n", canrflg);
356  frame->can_id = CAN_ERR_FLAG;
357 
358  if (canrflg & MSCAN_OVRIF) {
359  frame->can_id |= CAN_ERR_CRTL;
360  frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
361  stats->rx_over_errors++;
362  stats->rx_errors++;
363  } else {
364  frame->data[1] = 0;
365  }
366 
367  old_state = check_set_state(dev, canrflg);
368  /* State changed */
369  if (old_state != priv->can.state) {
370  switch (priv->can.state) {
372  frame->can_id |= CAN_ERR_CRTL;
373  priv->can.can_stats.error_warning++;
374  if ((priv->shadow_statflg & MSCAN_RSTAT_MSK) <
375  (canrflg & MSCAN_RSTAT_MSK))
376  frame->data[1] |= CAN_ERR_CRTL_RX_WARNING;
377  if ((priv->shadow_statflg & MSCAN_TSTAT_MSK) <
378  (canrflg & MSCAN_TSTAT_MSK))
379  frame->data[1] |= CAN_ERR_CRTL_TX_WARNING;
380  break;
382  frame->can_id |= CAN_ERR_CRTL;
383  priv->can.can_stats.error_passive++;
384  frame->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
385  break;
386  case CAN_STATE_BUS_OFF:
387  frame->can_id |= CAN_ERR_BUSOFF;
388  /*
389  * The MSCAN on the MPC5200 does recover from bus-off
390  * automatically. To avoid that we stop the chip doing
391  * a light-weight stop (we are in irq-context).
392  */
393  if (priv->type != MSCAN_TYPE_MPC5121) {
394  out_8(&regs->cantier, 0);
395  out_8(&regs->canrier, 0);
396  setbits8(&regs->canctl0,
397  MSCAN_SLPRQ | MSCAN_INITRQ);
398  }
399  can_bus_off(dev);
400  break;
401  default:
402  break;
403  }
404  }
405  priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
406  frame->can_dlc = CAN_ERR_DLC;
407  out_8(&regs->canrflg, MSCAN_ERR_IF);
408 }
409 
410 static int mscan_rx_poll(struct napi_struct *napi, int quota)
411 {
412  struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi);
413  struct net_device *dev = napi->dev;
414  struct mscan_regs __iomem *regs = priv->reg_base;
415  struct net_device_stats *stats = &dev->stats;
416  int npackets = 0;
417  int ret = 1;
418  struct sk_buff *skb;
419  struct can_frame *frame;
420  u8 canrflg;
421 
422  while (npackets < quota) {
423  canrflg = in_8(&regs->canrflg);
424  if (!(canrflg & (MSCAN_RXF | MSCAN_ERR_IF)))
425  break;
426 
427  skb = alloc_can_skb(dev, &frame);
428  if (!skb) {
429  if (printk_ratelimit())
430  netdev_notice(dev, "packet dropped\n");
431  stats->rx_dropped++;
432  out_8(&regs->canrflg, canrflg);
433  continue;
434  }
435 
436  if (canrflg & MSCAN_RXF)
437  mscan_get_rx_frame(dev, frame);
438  else if (canrflg & MSCAN_ERR_IF)
439  mscan_get_err_frame(dev, frame, canrflg);
440 
441  stats->rx_packets++;
442  stats->rx_bytes += frame->can_dlc;
443  npackets++;
444  netif_receive_skb(skb);
445  }
446 
447  if (!(in_8(&regs->canrflg) & (MSCAN_RXF | MSCAN_ERR_IF))) {
448  napi_complete(&priv->napi);
449  clear_bit(F_RX_PROGRESS, &priv->flags);
450  if (priv->can.state < CAN_STATE_BUS_OFF)
451  out_8(&regs->canrier, priv->shadow_canrier);
452  ret = 0;
453  }
454  return ret;
455 }
456 
457 static irqreturn_t mscan_isr(int irq, void *dev_id)
458 {
459  struct net_device *dev = (struct net_device *)dev_id;
460  struct mscan_priv *priv = netdev_priv(dev);
461  struct mscan_regs __iomem *regs = priv->reg_base;
462  struct net_device_stats *stats = &dev->stats;
463  u8 cantier, cantflg, canrflg;
464  irqreturn_t ret = IRQ_NONE;
465 
466  cantier = in_8(&regs->cantier) & MSCAN_TXE;
467  cantflg = in_8(&regs->cantflg) & cantier;
468 
469  if (cantier && cantflg) {
470  struct list_head *tmp, *pos;
471 
472  list_for_each_safe(pos, tmp, &priv->tx_head) {
473  struct tx_queue_entry *entry =
474  list_entry(pos, struct tx_queue_entry, list);
475  u8 mask = entry->mask;
476 
477  if (!(cantflg & mask))
478  continue;
479 
480  out_8(&regs->cantbsel, mask);
481  stats->tx_bytes += in_8(&regs->tx.dlr);
482  stats->tx_packets++;
483  can_get_echo_skb(dev, entry->id);
484  priv->tx_active &= ~mask;
485  list_del(pos);
486  }
487 
488  if (list_empty(&priv->tx_head)) {
489  clear_bit(F_TX_WAIT_ALL, &priv->flags);
490  clear_bit(F_TX_PROGRESS, &priv->flags);
491  priv->cur_pri = 0;
492  } else {
493  dev->trans_start = jiffies;
494  }
495 
496  if (!test_bit(F_TX_WAIT_ALL, &priv->flags))
497  netif_wake_queue(dev);
498 
499  out_8(&regs->cantier, priv->tx_active);
500  ret = IRQ_HANDLED;
501  }
502 
503  canrflg = in_8(&regs->canrflg);
504  if ((canrflg & ~MSCAN_STAT_MSK) &&
506  if (canrflg & ~MSCAN_STAT_MSK) {
507  priv->shadow_canrier = in_8(&regs->canrier);
508  out_8(&regs->canrier, 0);
509  napi_schedule(&priv->napi);
510  ret = IRQ_HANDLED;
511  } else {
512  clear_bit(F_RX_PROGRESS, &priv->flags);
513  }
514  }
515  return ret;
516 }
517 
518 static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode)
519 {
520  struct mscan_priv *priv = netdev_priv(dev);
521  int ret = 0;
522 
523  if (!priv->open_time)
524  return -EINVAL;
525 
526  switch (mode) {
527  case CAN_MODE_START:
528  ret = mscan_restart(dev);
529  if (ret)
530  break;
531  if (netif_queue_stopped(dev))
532  netif_wake_queue(dev);
533  break;
534 
535  default:
536  ret = -EOPNOTSUPP;
537  break;
538  }
539  return ret;
540 }
541 
542 static int mscan_do_set_bittiming(struct net_device *dev)
543 {
544  struct mscan_priv *priv = netdev_priv(dev);
545  struct mscan_regs __iomem *regs = priv->reg_base;
546  struct can_bittiming *bt = &priv->can.bittiming;
547  u8 btr0, btr1;
548 
549  btr0 = BTR0_SET_BRP(bt->brp) | BTR0_SET_SJW(bt->sjw);
550  btr1 = (BTR1_SET_TSEG1(bt->prop_seg + bt->phase_seg1) |
552  BTR1_SET_SAM(priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES));
553 
554  netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1);
555 
556  out_8(&regs->canbtr0, btr0);
557  out_8(&regs->canbtr1, btr1);
558 
559  return 0;
560 }
561 
562 static int mscan_get_berr_counter(const struct net_device *dev,
563  struct can_berr_counter *bec)
564 {
565  struct mscan_priv *priv = netdev_priv(dev);
566  struct mscan_regs __iomem *regs = priv->reg_base;
567 
568  bec->txerr = in_8(&regs->cantxerr);
569  bec->rxerr = in_8(&regs->canrxerr);
570 
571  return 0;
572 }
573 
574 static int mscan_open(struct net_device *dev)
575 {
576  int ret;
577  struct mscan_priv *priv = netdev_priv(dev);
578  struct mscan_regs __iomem *regs = priv->reg_base;
579 
580  /* common open */
581  ret = open_candev(dev);
582  if (ret)
583  return ret;
584 
585  napi_enable(&priv->napi);
586 
587  ret = request_irq(dev->irq, mscan_isr, 0, dev->name, dev);
588  if (ret < 0) {
589  netdev_err(dev, "failed to attach interrupt\n");
590  goto exit_napi_disable;
591  }
592 
593  priv->open_time = jiffies;
594 
595  if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
596  setbits8(&regs->canctl1, MSCAN_LISTEN);
597  else
598  clrbits8(&regs->canctl1, MSCAN_LISTEN);
599 
600  ret = mscan_start(dev);
601  if (ret)
602  goto exit_free_irq;
603 
604  netif_start_queue(dev);
605 
606  return 0;
607 
608 exit_free_irq:
609  priv->open_time = 0;
610  free_irq(dev->irq, dev);
611 exit_napi_disable:
612  napi_disable(&priv->napi);
613  close_candev(dev);
614  return ret;
615 }
616 
617 static int mscan_close(struct net_device *dev)
618 {
619  struct mscan_priv *priv = netdev_priv(dev);
620  struct mscan_regs __iomem *regs = priv->reg_base;
621 
622  netif_stop_queue(dev);
623  napi_disable(&priv->napi);
624 
625  out_8(&regs->cantier, 0);
626  out_8(&regs->canrier, 0);
627  mscan_set_mode(dev, MSCAN_INIT_MODE);
628  close_candev(dev);
629  free_irq(dev->irq, dev);
630  priv->open_time = 0;
631 
632  return 0;
633 }
634 
635 static const struct net_device_ops mscan_netdev_ops = {
636  .ndo_open = mscan_open,
637  .ndo_stop = mscan_close,
638  .ndo_start_xmit = mscan_start_xmit,
639 };
640 
641 int register_mscandev(struct net_device *dev, int mscan_clksrc)
642 {
643  struct mscan_priv *priv = netdev_priv(dev);
644  struct mscan_regs __iomem *regs = priv->reg_base;
645  u8 ctl1;
646 
647  ctl1 = in_8(&regs->canctl1);
648  if (mscan_clksrc)
649  ctl1 |= MSCAN_CLKSRC;
650  else
651  ctl1 &= ~MSCAN_CLKSRC;
652 
653  if (priv->type == MSCAN_TYPE_MPC5121) {
654  priv->can.do_get_berr_counter = mscan_get_berr_counter;
655  ctl1 |= MSCAN_BORM; /* bus-off recovery upon request */
656  }
657 
658  ctl1 |= MSCAN_CANE;
659  out_8(&regs->canctl1, ctl1);
660  udelay(100);
661 
662  /* acceptance mask/acceptance code (accept everything) */
663  out_be16(&regs->canidar1_0, 0);
664  out_be16(&regs->canidar3_2, 0);
665  out_be16(&regs->canidar5_4, 0);
666  out_be16(&regs->canidar7_6, 0);
667 
668  out_be16(&regs->canidmr1_0, 0xffff);
669  out_be16(&regs->canidmr3_2, 0xffff);
670  out_be16(&regs->canidmr5_4, 0xffff);
671  out_be16(&regs->canidmr7_6, 0xffff);
672  /* Two 32 bit Acceptance Filters */
673  out_8(&regs->canidac, MSCAN_AF_32BIT);
674 
675  mscan_set_mode(dev, MSCAN_INIT_MODE);
676 
677  return register_candev(dev);
678 }
679 
681 {
682  struct mscan_priv *priv = netdev_priv(dev);
683  struct mscan_regs __iomem *regs = priv->reg_base;
684  mscan_set_mode(dev, MSCAN_INIT_MODE);
685  clrbits8(&regs->canctl1, MSCAN_CANE);
686  unregister_candev(dev);
687 }
688 
690 {
691  struct net_device *dev;
692  struct mscan_priv *priv;
693  int i;
694 
695  dev = alloc_candev(sizeof(struct mscan_priv), MSCAN_ECHO_SKB_MAX);
696  if (!dev)
697  return NULL;
698  priv = netdev_priv(dev);
699 
700  dev->netdev_ops = &mscan_netdev_ops;
701 
702  dev->flags |= IFF_ECHO; /* we support local echo */
703 
704  netif_napi_add(dev, &priv->napi, mscan_rx_poll, 8);
705 
706  priv->can.bittiming_const = &mscan_bittiming_const;
707  priv->can.do_set_bittiming = mscan_do_set_bittiming;
708  priv->can.do_set_mode = mscan_do_set_mode;
709  priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |
711 
712  for (i = 0; i < TX_QUEUE_SIZE; i++) {
713  priv->tx_queue[i].id = i;
714  priv->tx_queue[i].mask = 1 << i;
715  }
716 
717  return dev;
718 }
719 
720 MODULE_AUTHOR("Andrey Volkov <[email protected]>");
721 MODULE_LICENSE("GPL v2");
722 MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips");