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ni_660x.c File Reference
#include <linux/interrupt.h>
#include "../comedidev.h"
#include "mite.h"
#include "ni_tio.h"

Go to the source code of this file.

Data Structures

struct  NI_660xRegisterData
 
struct  ni_660x_board
 
struct  ni_660x_private
 

Macros

#define NUM_PFI_CHANNELS   40
 
#define MAX_DMA_CHANNEL   4
 
#define NI_660X_MAX_NUM_CHIPS   2
 
#define NI_660X_MAX_NUM_COUNTERS   (NI_660X_MAX_NUM_CHIPS * counters_per_chip)
 

Enumerations

enum  ni_660x_constants { min_counter_pfi_chan = 8, max_dio_pfi_chan = 31, counters_per_chip = 4 }
 
enum  NI_660x_Register {
  G0InterruptAcknowledge, G0StatusRegister, G1InterruptAcknowledge, G1StatusRegister,
  G01StatusRegister, G0CommandRegister, STCDIOParallelInput, G1CommandRegister,
  G0HWSaveRegister, G1HWSaveRegister, STCDIOOutput, STCDIOControl,
  G0SWSaveRegister, G1SWSaveRegister, G0ModeRegister, G01JointStatus1Register,
  G1ModeRegister, STCDIOSerialInput, G0LoadARegister, G01JointStatus2Register,
  G0LoadBRegister, G1LoadARegister, G1LoadBRegister, G0InputSelectRegister,
  G1InputSelectRegister, G0AutoincrementRegister, G1AutoincrementRegister, G01JointResetRegister,
  G0InterruptEnable, G1InterruptEnable, G0CountingModeRegister, G1CountingModeRegister,
  G0SecondGateRegister, G1SecondGateRegister, G0DMAConfigRegister, G0DMAStatusRegister,
  G1DMAConfigRegister, G1DMAStatusRegister, G2InterruptAcknowledge, G2StatusRegister,
  G3InterruptAcknowledge, G3StatusRegister, G23StatusRegister, G2CommandRegister,
  G3CommandRegister, G2HWSaveRegister, G3HWSaveRegister, G2SWSaveRegister,
  G3SWSaveRegister, G2ModeRegister, G23JointStatus1Register, G3ModeRegister,
  G2LoadARegister, G23JointStatus2Register, G2LoadBRegister, G3LoadARegister,
  G3LoadBRegister, G2InputSelectRegister, G3InputSelectRegister, G2AutoincrementRegister,
  G3AutoincrementRegister, G23JointResetRegister, G2InterruptEnable, G3InterruptEnable,
  G2CountingModeRegister, G3CountingModeRegister, G3SecondGateRegister, G2SecondGateRegister,
  G2DMAConfigRegister, G2DMAStatusRegister, G3DMAConfigRegister, G3DMAStatusRegister,
  DIO32Input, DIO32Output, ClockConfigRegister, GlobalInterruptStatusRegister,
  DMAConfigRegister, GlobalInterruptConfigRegister, IOConfigReg0_1, IOConfigReg2_3,
  IOConfigReg4_5, IOConfigReg6_7, IOConfigReg8_9, IOConfigReg10_11,
  IOConfigReg12_13, IOConfigReg14_15, IOConfigReg16_17, IOConfigReg18_19,
  IOConfigReg20_21, IOConfigReg22_23, IOConfigReg24_25, IOConfigReg26_27,
  IOConfigReg28_29, IOConfigReg30_31, IOConfigReg32_33, IOConfigReg34_35,
  IOConfigReg36_37, IOConfigReg38_39, NumRegisters
}
 
enum  ni_660x_register_width { DATA_1B, DATA_2B, DATA_4B }
 
enum  ni_660x_register_direction { NI_660x_READ, NI_660x_WRITE, NI_660x_READ_WRITE }
 
enum  ni_660x_pfi_output_select { pfi_output_select_high_Z = 0, pfi_output_select_counter = 1, pfi_output_select_do = 2, num_pfi_output_selects }
 
enum  ni_660x_subdevices { NI_660X_DIO_SUBDEV = 1, NI_660X_GPCT_SUBDEV_0 = 2 }
 
enum  clock_config_register_bits { CounterSwap = 0x1 << 21 }
 
enum  dma_selection { dma_selection_none = 0x1f }
 
enum  global_interrupt_status_register_bits {
  Counter_0_Int_Bit = 0x100, Counter_1_Int_Bit = 0x200, Counter_2_Int_Bit = 0x400, Counter_3_Int_Bit = 0x800,
  Cascade_Int_Bit = 0x20000000, Global_Int_Bit = 0x80000000
}
 
enum  global_interrupt_config_register_bits { Cascade_Int_Enable_Bit = 0x20000000, Global_Int_Polarity_Bit = 0x40000000, Global_Int_Enable_Bit = 0x80000000 }
 

Functions

 MODULE_DEVICE_TABLE (pci, ni_660x_pci_table)
 
 module_comedi_pci_driver (ni_660x_driver, ni_660x_pci_driver)
 
 MODULE_AUTHOR ("Comedi http://www.comedi.org")
 
 MODULE_DESCRIPTION ("Comedi low-level driver")
 
 MODULE_LICENSE ("GPL")
 

Macro Definition Documentation

#define MAX_DMA_CHANNEL   4

Definition at line 57 of file ni_660x.c.

#define NI_660X_MAX_NUM_CHIPS   2

Definition at line 419 of file ni_660x.c.

#define NI_660X_MAX_NUM_COUNTERS   (NI_660X_MAX_NUM_CHIPS * counters_per_chip)

Definition at line 420 of file ni_660x.c.

#define NUM_PFI_CHANNELS   40

Definition at line 54 of file ni_660x.c.

Enumeration Type Documentation

Enumerator:
CounterSwap 

Definition at line 307 of file ni_660x.c.

Enumerator:
dma_selection_none 

Definition at line 349 of file ni_660x.c.

Enumerator:
Cascade_Int_Enable_Bit 
Global_Int_Polarity_Bit 
Global_Int_Enable_Bit 

Definition at line 379 of file ni_660x.c.

Enumerator:
Counter_0_Int_Bit 
Counter_1_Int_Bit 
Counter_2_Int_Bit 
Counter_3_Int_Bit 
Cascade_Int_Bit 
Global_Int_Bit 

Definition at line 370 of file ni_660x.c.

Enumerator:
min_counter_pfi_chan 
max_dio_pfi_chan 
counters_per_chip 

Definition at line 48 of file ni_660x.c.

Enumerator:
pfi_output_select_high_Z 
pfi_output_select_counter 
pfi_output_select_do 
num_pfi_output_selects 

Definition at line 181 of file ni_660x.c.

Enumerator:
G0InterruptAcknowledge 
G0StatusRegister 
G1InterruptAcknowledge 
G1StatusRegister 
G01StatusRegister 
G0CommandRegister 
STCDIOParallelInput 
G1CommandRegister 
G0HWSaveRegister 
G1HWSaveRegister 
STCDIOOutput 
STCDIOControl 
G0SWSaveRegister 
G1SWSaveRegister 
G0ModeRegister 
G01JointStatus1Register 
G1ModeRegister 
STCDIOSerialInput 
G0LoadARegister 
G01JointStatus2Register 
G0LoadBRegister 
G1LoadARegister 
G1LoadBRegister 
G0InputSelectRegister 
G1InputSelectRegister 
G0AutoincrementRegister 
G1AutoincrementRegister 
G01JointResetRegister 
G0InterruptEnable 
G1InterruptEnable 
G0CountingModeRegister 
G1CountingModeRegister 
G0SecondGateRegister 
G1SecondGateRegister 
G0DMAConfigRegister 
G0DMAStatusRegister 
G1DMAConfigRegister 
G1DMAStatusRegister 
G2InterruptAcknowledge 
G2StatusRegister 
G3InterruptAcknowledge 
G3StatusRegister 
G23StatusRegister 
G2CommandRegister 
G3CommandRegister 
G2HWSaveRegister 
G3HWSaveRegister 
G2SWSaveRegister 
G3SWSaveRegister 
G2ModeRegister 
G23JointStatus1Register 
G3ModeRegister 
G2LoadARegister 
G23JointStatus2Register 
G2LoadBRegister 
G3LoadARegister 
G3LoadBRegister 
G2InputSelectRegister 
G3InputSelectRegister 
G2AutoincrementRegister 
G3AutoincrementRegister 
G23JointResetRegister 
G2InterruptEnable 
G3InterruptEnable 
G2CountingModeRegister 
G3CountingModeRegister 
G3SecondGateRegister 
G2SecondGateRegister 
G2DMAConfigRegister 
G2DMAStatusRegister 
G3DMAConfigRegister 
G3DMAStatusRegister 
DIO32Input 
DIO32Output 
ClockConfigRegister 
GlobalInterruptStatusRegister 
DMAConfigRegister 
GlobalInterruptConfigRegister 
IOConfigReg0_1 
IOConfigReg2_3 
IOConfigReg4_5 
IOConfigReg6_7 
IOConfigReg8_9 
IOConfigReg10_11 
IOConfigReg12_13 
IOConfigReg14_15 
IOConfigReg16_17 
IOConfigReg18_19 
IOConfigReg20_21 
IOConfigReg22_23 
IOConfigReg24_25 
IOConfigReg26_27 
IOConfigReg28_29 
IOConfigReg30_31 
IOConfigReg32_33 
IOConfigReg34_35 
IOConfigReg36_37 
IOConfigReg38_39 
NumRegisters 

Definition at line 60 of file ni_660x.c.

Enumerator:
NI_660x_READ 
NI_660x_WRITE 
NI_660x_READ_WRITE 

Definition at line 175 of file ni_660x.c.

Enumerator:
DATA_1B 
DATA_2B 
DATA_4B 

Definition at line 169 of file ni_660x.c.

Enumerator:
NI_660X_DIO_SUBDEV 
NI_660X_GPCT_SUBDEV_0 

Definition at line 188 of file ni_660x.c.

Function Documentation

MODULE_AUTHOR ( "Comedi http://www.comedi.org"  )
module_comedi_pci_driver ( ni_660x_driver  ,
ni_660x_pci_driver   
)
MODULE_DESCRIPTION ( "Comedi low-level driver )
MODULE_DEVICE_TABLE ( pci  ,
ni_660x_pci_table   
)
MODULE_LICENSE ( "GPL"  )