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nlm_hal.c
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1 /*
2  * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3  * reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses. You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the NetLogic
9  * license below:
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  *
15  * 1. Redistributions of source code must retain the above copyright
16  * notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  * notice, this list of conditions and the following disclaimer in
19  * the documentation and/or other materials provided with the
20  * distribution.
21  *
22  * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
31  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
32  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <linux/types.h>
36 #include <linux/kernel.h>
37 #include <linux/mm.h>
38 #include <linux/delay.h>
39 
40 #include <asm/mipsregs.h>
41 #include <asm/time.h>
42 
43 #include <asm/netlogic/haldefs.h>
44 #include <asm/netlogic/xlp-hal/iomap.h>
45 #include <asm/netlogic/xlp-hal/xlp.h>
46 #include <asm/netlogic/xlp-hal/pic.h>
47 #include <asm/netlogic/xlp-hal/sys.h>
48 
49 /* These addresses are computed by the nlm_hal_init() */
50 uint64_t nlm_io_base;
51 uint64_t nlm_sys_base;
52 uint64_t nlm_pic_base;
53 
54 /* Main initialization */
55 void nlm_hal_init(void)
56 {
57  nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
58  nlm_sys_base = nlm_get_sys_regbase(0); /* node 0 */
59  nlm_pic_base = nlm_get_pic_regbase(0); /* node 0 */
60 }
61 
62 int nlm_irq_to_irt(int irq)
63 {
64  if (!PIC_IRQ_IS_IRT(irq))
65  return -1;
66 
67  switch (irq) {
68  case PIC_UART_0_IRQ:
69  return PIC_IRT_UART_0_INDEX;
70  case PIC_UART_1_IRQ:
71  return PIC_IRT_UART_1_INDEX;
72  case PIC_PCIE_LINK_0_IRQ:
73  return PIC_IRT_PCIE_LINK_0_INDEX;
74  case PIC_PCIE_LINK_1_IRQ:
75  return PIC_IRT_PCIE_LINK_1_INDEX;
76  case PIC_PCIE_LINK_2_IRQ:
77  return PIC_IRT_PCIE_LINK_2_INDEX;
78  case PIC_PCIE_LINK_3_IRQ:
79  return PIC_IRT_PCIE_LINK_3_INDEX;
80  case PIC_EHCI_0_IRQ:
81  return PIC_IRT_EHCI_0_INDEX;
82  case PIC_EHCI_1_IRQ:
83  return PIC_IRT_EHCI_1_INDEX;
84  case PIC_OHCI_0_IRQ:
85  return PIC_IRT_OHCI_0_INDEX;
86  case PIC_OHCI_1_IRQ:
87  return PIC_IRT_OHCI_1_INDEX;
88  case PIC_OHCI_2_IRQ:
89  return PIC_IRT_OHCI_2_INDEX;
90  case PIC_OHCI_3_IRQ:
91  return PIC_IRT_OHCI_3_INDEX;
92  case PIC_MMC_IRQ:
93  return PIC_IRT_MMC_INDEX;
94  case PIC_I2C_0_IRQ:
95  return PIC_IRT_I2C_0_INDEX;
96  case PIC_I2C_1_IRQ:
97  return PIC_IRT_I2C_1_INDEX;
98  default:
99  return -1;
100  }
101 }
102 
103 int nlm_irt_to_irq(int irt)
104 {
105  switch (irt) {
106  case PIC_IRT_UART_0_INDEX:
107  return PIC_UART_0_IRQ;
108  case PIC_IRT_UART_1_INDEX:
109  return PIC_UART_1_IRQ;
110  case PIC_IRT_PCIE_LINK_0_INDEX:
111  return PIC_PCIE_LINK_0_IRQ;
112  case PIC_IRT_PCIE_LINK_1_INDEX:
113  return PIC_PCIE_LINK_1_IRQ;
114  case PIC_IRT_PCIE_LINK_2_INDEX:
115  return PIC_PCIE_LINK_2_IRQ;
116  case PIC_IRT_PCIE_LINK_3_INDEX:
117  return PIC_PCIE_LINK_3_IRQ;
118  case PIC_IRT_EHCI_0_INDEX:
119  return PIC_EHCI_0_IRQ;
120  case PIC_IRT_EHCI_1_INDEX:
121  return PIC_EHCI_1_IRQ;
122  case PIC_IRT_OHCI_0_INDEX:
123  return PIC_OHCI_0_IRQ;
124  case PIC_IRT_OHCI_1_INDEX:
125  return PIC_OHCI_1_IRQ;
126  case PIC_IRT_OHCI_2_INDEX:
127  return PIC_OHCI_2_IRQ;
128  case PIC_IRT_OHCI_3_INDEX:
129  return PIC_OHCI_3_IRQ;
130  case PIC_IRT_MMC_INDEX:
131  return PIC_MMC_IRQ;
132  case PIC_IRT_I2C_0_INDEX:
133  return PIC_I2C_0_IRQ;
134  case PIC_IRT_I2C_1_INDEX:
135  return PIC_I2C_1_IRQ;
136  default:
137  return -1;
138  }
139 }
140 
141 unsigned int nlm_get_core_frequency(int core)
142 {
143  unsigned int pll_divf, pll_divr, dfs_div, ext_div;
144  unsigned int rstval, dfsval, denom;
145  uint64_t num;
146 
147  rstval = nlm_read_sys_reg(nlm_sys_base, SYS_POWER_ON_RESET_CFG);
148  dfsval = nlm_read_sys_reg(nlm_sys_base, SYS_CORE_DFS_DIV_VALUE);
149  pll_divf = ((rstval >> 10) & 0x7f) + 1;
150  pll_divr = ((rstval >> 8) & 0x3) + 1;
151  ext_div = ((rstval >> 30) & 0x3) + 1;
152  dfs_div = ((dfsval >> (core * 4)) & 0xf) + 1;
153 
154  num = 800000000ULL * pll_divf;
155  denom = 3 * pll_divr * ext_div * dfs_div;
156  do_div(num, denom);
157  return (unsigned int)num;
158 }
159 
160 unsigned int nlm_get_cpu_frequency(void)
161 {
162  return nlm_get_core_frequency(0);
163 }
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